KR20050118851A - Plasma display device and driving method thereof - Google Patents

Abstract

The present invention relates to a plasma display device and a driving method thereof. In particular, the driving method of the plasma display device according to the present invention detects the frequency of the input vertical synchronization signal, compares the detected frequency of the vertical synchronization signal with a reference frequency stored in advance, The number of subfields is adjusted to drive the plasma display device.

Description

Plasma Display and Driving Method {PLASMA DISPLAY DEVICE AND DRIVING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device and a driving method thereof, and more particularly, to a plasma display device and a driving method thereof capable of driving normally even when a vertical synchronization signal Vsync having an abnormal period is input.

Recently, the plasma display device has been in the spotlight as a flat panel display device because of the advantages of higher luminance and luminous efficiency and wider viewing angle than other display devices.

Plasma display devices are flat display devices that display characters or images using plasma generated by gas discharge, and dozens to millions of pixels are arranged in a matrix form according to their size.

The plasma display device includes two glass substrates coated with appropriate electrodes and phosphors on each substrate, and plasma formed in the space therebetween while maintaining a distance between the two substrates.

1 is a plan view illustrating a plasma display device.

As shown in FIG. 1, in the plasma display device, the X electrodes 2 and the Y electrodes 6 disposed in parallel form a pair and constitute one display line. Hereinafter, the X electrode is referred to as a sustain electrode and the Y electrode is called a scan electrode.

The address electrode 4 is arranged to be orthogonal to the sustain electrode 2 and the scan electrode 4, and each cross region forms a discharge cell (first discharge cell to last discharge cell). Specifically, the address electrodes 4 are arranged in the column direction, and the plurality of sustain electrodes 2 and the scan electrodes 6 are arranged in a zigzag in the row direction.

As described above, ADS (Address Display Seperating) driving is widely used as a driving method of a PDP in which discharge cells are formed in respective crossing regions.

The ADS driving method basically consists of a reset, an address, and a sustain period.

In detail, one frame is divided into a plurality of sub-fields, and each of the subfields is divided into the reset period, the address period, and the sustain period. In general, 8 to 12 subfields form one frame and implement one image using the subfield having the above-described configuration as a basic unit.

Here, the reset period initializes the state of each cell in order to perform the addressing operation smoothly.

The address period selects the desired cell by scanning line by line to select cells that are turned on and cells that are not on the panel. At this time, wall charges are formed in the selected cell by address discharge.

The sustain period performs a discharge for actually displaying an image on the addressed (selected) cell.

Each of the 8 to 12 subfields in one frame displays a desired image (luminance) by adjusting the number of sustain pulses. That is, 8 to 12 subfields having different weights are sequentially operated.

When gray levels are expressed using a plurality of subfields having different weights as described above, the frequency of the vertical synchronization signal (hereinafter referred to as Vsync) is a very important factor. 2 shows a configuration of one frame composed of a plurality of subfields when Vsync occurs.

As illustrated in FIG. 2, an example in which 10 subfields form one frame during one frame of Vsync is used to implement one image. Here, the number of subfields is not limited to the number of subfields shown in FIG. 2.

Referring to (a) of FIG. 2, when the subfields of one frame are arranged in ascending order, one frame includes ten subfields SF0 to SF9 arranged in ascending order according to the idle period and the subfield weights located at the beginning of the Vsync frequency. ) And Vsync frequency margin. In addition, referring to FIG. 2B, when the subfields of one frame are arranged in descending order, the subfields are configured in ten subfields SF0 to SF9 arranged in descending order according to the subfield weight and Vsync frequency margin. In both cases, there is an absolutely required time t for driving a plurality of subfields except for the Vsync margin.

Vsync of a typical video signal has a Vsync cycle of 16.67ms (= 1s / 60) for NTSC (National Television System Committee) and 20ms for Phase Alternate Line (PAL).

The driving control circuit of the plasma display device receives the Vsync of the image signal and uses it as a reference signal to generate a control signal necessary to control the driving circuit.

Therefore, when Vsync having a normal period is input, the driving control circuit of the plasma display device operates normally. However, when a Vsync having an abnormal period is input, the driving control circuit of the plasma display device performs an abnormal operation.

For example, when a transitional state of a channel is switched when a broadcast channel is switched or when an automatic channel is searched, or when a fast frequency such as a REW mode or an FF mode of a video is input, an input Vsync cycle is performed by one frame as shown in FIG. 2. There is a case where the period is shorter than the absolute time required for driving the plurality of subfields. If Vsync with abnormal period is input, the following problem occurs.

For example, when the driving state is in the reset state, when Vsync of an abnormal period is input and the driving control circuit of the plasma display device is immediately initialized, the control circuit disappears because the FET of the driving circuit is turned on. Enters an abnormal state and the driving FET is destroyed by the displacement current due to the charge charged in the panel.

The present invention is to solve the above problems, the present invention is to secure a safe driving area when the vertical synchronization signal (Vsync) having an abnormal period, the plasma display device and to minimize the loss of gradation expression and its It is to provide a driving method.

In order to achieve the above object, the driving method of the plasma display device according to an aspect of the present invention,

A method of driving a plasma display device which divides an image of each field displayed on a plasma panel in response to an input video signal into a plurality of subfields, and displays a gray level corresponding to the combination of these subfields to display an image corresponding to the video signal. To

(a) detecting the frequency of the vertical synchronization signal;

(b) comparing the frequency detected in step (a) with a preset reference frequency; And

(c) adjusting the number of subfields according to the comparison result in step (b).

At this time, if the comparison result in the step (b), it is characterized in that the number of the subfield is adjusted if it is shorter than the reference frequency period.

In addition, the period of the reference frequency is characterized in that the minimum time required to drive the subfield of the image signal frame.

Further, when the comparison result in step (b) is shorter than the period of the reference frequency,

At least one subfield of the subfield of the image signal frame input from the outside is removed.

The subfield removal may be sequentially performed from the minimum weighted subfield to the weighted subfield.

Plasma display device according to another aspect of the present invention

A plasma panel having a plurality of address electrodes arranged in a column direction and a plurality of scan electrodes and sustain electrodes arranged in a row direction;

A control unit which adjusts the number of subfields constituting one frame according to the frequency change of the vertical synchronization signal input from the outside, and generates and outputs a control signal according thereto;

An address driver which receives the control signal from the controller and applies a display data signal to the address electrode to select a discharge cell to be displayed;

A sustain driver which receives the control signal from the controller and applies a driving voltage to the sustain electrode; And

And a scan driver configured to receive the control signal from the controller and apply a driving voltage to the scan electrode.

At this time, the control unit,

A frame memory unit which stores a frame for an R.G.B video signal input from the outside;

A memory unit storing a reference frequency of the vertical synchronization signal;

A vertical frequency detector detecting a frequency of the vertical synchronization signal input from the outside;

A vertical sync signal (Vsync) determination unit for comparing the frequency detected by the vertical frequency detector with a reference frequency stored in the memory unit;

And a driving signal controller configured to generate and output a control signal for adjusting the number of subfields of the image signal frame according to a result of the determination unit.

In this case, the driving signal controller determines that the frequency period of the input vertical synchronization signal is shorter than the reference frequency period as a result of the determination of the vertical synchronization signal Vsync determination unit.

At least one subfield of the video signal frame input from the outside may be removed.

The subfield removal may be performed sequentially from the minimum weight subfield.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

3 is a schematic block diagram illustrating a configuration of a plasma display device according to an exemplary embodiment of the present invention.

Referring to FIG. 3, a plasma display device according to an exemplary embodiment of the present invention includes a plasma panel 100, an address driver 200, a sustain driver 300, a scan driver 500, and a controller 400.

The plasma panel 100 includes a plurality of address electrodes A1-Am arranged in the column direction, and a plurality of scan electrodes Y1-Yn and sustain electrodes X1-Xn arranged in a zigzag manner in the row direction. .

The address driver 200 receives an address driving control signal from the controller 400 and applies a display data signal for selecting a discharge cell to be displayed to each address electrode A1-Am.

The sustain driver 300 receives the sustain electrode driving control signal from the controller 400 and applies a driving voltage to the sustain electrodes X1-Xn. The scan driver 500 receives a scan electrode driving control signal from the controller 400 and applies a driving voltage to the scan electrode. At this time, the sustain driver 300 and the scan driver 500 which receive the control signal from the controller 400 respectively apply the sustain discharge voltage to the scan electrodes Y1-Yn and the sustain electrodes X1-Xn in the sustain period. Sustain discharge is applied to the selected discharge cells.

The controller 400 receives the R, G, and B image signals and the vertical synchronization signal Vsync from the outside, and outputs an address driving control signal, a sustain electrode driving control signal, and a scan electrode driving control signal to drive the plasma panel 100. do. At this time, the controller 400 adjusts the number of subfields constituting one frame according to the frequency change of the vertical synchronization signal (Vsync hereinafter, referred to as Vsync) input from the outside, and generates a control signal according to the address driver. It supplies to the 200, the holding | maintenance drive part 300, and the scan drive part 500. FIG.

Each driving unit applies a final driving signal corresponding to the control signal of the controller 400 to the panel 100.

The controller 400 in the plasma display device will be described in more detail with reference to FIG. 4.

4 is a block diagram illustrating a configuration of the controller of FIG. 3.

As shown in FIG. 4, the controller 400 includes a vertical frequency detector 410, a memory 430, a vertical sync signal Vsync determiner 450, a frame memory 470, and a drive signal controller 490. It includes.

The vertical frequency detector 410 receives Vsync among synchronization signals input from the outside and detects a period thereof.

The memory unit 430 stores a reference frequency for normal operation control according to the frequency of Vsync. The period of the Vsync having the reference frequency includes an absolute time required for driving a plurality of subfields constituting one frame, a Vsync frequency margin, and a pause.

The vertical synchronization signal Vsync determiner 450 compares the reference frequency stored in the memory unit 430 with the frequency detected by the vertical frequency detector 410 to convert the input Vsync period information to the driving signal controller 490. To pass.

The driving signal controller 490 performs the following operation according to the period information of the input Vsync transmitted from the vertical synchronization signal Vsync determination unit 450.

First, if the input Vsync period is the same as the reference frequency period or belongs to the Vsync frequency margin of one frame, that is, if the period is shorter than the reference frequency period but absolute subfield driving time can be obtained, no other adjustment operation is performed. , Normal operation.

On the other hand, when the period of the input Vsync is shorter than the reference frequency period, in particular, when the absolute time required for driving a plurality of subfields constituting one frame cannot be secured, the minimum of the plurality of subfields according to the Vsync period By sequentially removing the weight subfield, a stable driving area can be secured.

Accordingly, the driving signal controller 490 according to the exemplary embodiment of the present invention outputs a frame of the image data from the frame memory 470 and forms a frame of the image data according to the result of the Vsync determination unit 450. Adjust the number, and generate and output the driving control signal accordingly.

The frame memory 470 stores a frame for the R.G.B video signal from the outside.

An operation process of the controller 400 of the plasma display device configured as described above will be described in detail with reference to FIGS. 5 to 6.

5 is a diagram illustrating a frame of an image signal according to a normal Vsync output of NTSC according to an embodiment of the present invention.

During one frame of Vsync, 8 to 12 subfields form one frame and implement one image. FIG. 5 illustrates an embodiment in which ten subfields constitute one frame and implement one image. The number of subfields constituting one frame is not limited to the number of subfields shown as the embodiment of FIG. 5.

The Vsync of a normal video signal has a Vsync period of 16.67 ms (= 1 s / 60) in the case of the NTSC (National Television System Committee).

As shown in FIG. 5, when a normal Vsync frequency is input, a frame of an image signal input to one frame (16.67ms) of Vsync includes a pause at the beginning of Vsync and 10 subfields SF0 to SF9 and a Vsync frequency. It consists of Vsync frequency margin located at the end of a single picture.

The subfields SF0 to SF9 of one frame are arranged in ascending order according to the subfield weight, so that the subfield after the pause is the minimum weight subfield (LSB subfield) and the last subfield is the maximum weight subfield (MSB subfield). )to be.

In the embodiment of the present invention, the ascending order has been described, but the subfield arrangement is not limited thereto and may be changed.

When the normal Vsync frequency is input as described above, the driving circuit of the plasma display device performs a normal operation.

6 is a diagram illustrating a method of driving a plasma display device according to an exemplary embodiment of the present invention in the case of a Vsync output having an abnormal period.

The values of the Vsync period 16.67ms and the reference frequency 60Hz, the Psync 20ms and the reference frequency 50Hz in the NTSC used in the following description are previously stored in the memory unit 430.

As shown in FIG. 6A, in the case of the NTSC (National Television System Committee), the Vsync period is 16.67 ms (= 1 s / 60) and the reference frequency is 60 Hz.

When the vertical frequency detector 410 detects an input Vsync and compares the vertical synchronization signal Vsync determination unit 450 with a reference frequency period previously stored in the memory unit 430, Vsync having a period shorter than the reference frequency period is Specifically, when the absolute time required for subfield driving cannot be secured, the PDP driving circuit is not normally driven. Therefore, in this case, the driving signal controller 490 sequentially removes the minimum weight subfield (LSB subfield) according to the input Vsync period to adjust the number of subfields constituting one frame, thereby securing a stable driving region. Do it.

FIG. 6B illustrates the structure of a frame in which the number of subfields constituting one frame according to the operation of the driving signal controller 490 is adjusted.

As the minimum weight subfield (LSB subfield) is removed according to the Vsync cycle according to the operation of the driving signal controller 490, an absolute time T necessary for driving the subfield may be secured even in a frame having an abnormal Vsync cycle. This makes it possible to secure driving stability of the plasma display device.

Also, as in the plasma display device according to an exemplary embodiment of the present invention, when gray scales are expressed using a plurality of subfields having different weights, the loss of gray scale expression is eliminated by removing the minimum weight subfield (LSB subfield). It can be minimized.

In the embodiment of the present invention, for example, when one Vsync having an abnormal period is input, one minimum weight subfield is removed. However, the number of subfields removed in one frame may be adjusted according to the input Vsync period.

Also, in the case of PAL, the same control operation is performed to normally operate the plasma display device driving circuit according to the Vsync output having an abnormal period in the NTSC.

The above embodiments are intended to illustrate the present invention, the scope of the present invention is not limited to the embodiments, it can be modified or modified by those skilled in the art within the scope of the invention defined by the appended claims. .

According to the present invention, when the vertical synchronization signal Vsync having an abnormal period is input, the subfields constituting one frame are sequentially removed from the minimum weight subfields to adjust the number of subfields constituting one frame. The plasma display device can be stably driven during the Vsync cycle. In addition, the loss of the gradation representation can be minimized by removing the minimum weight subfield first.

1 is a plan view illustrating a plasma display device.

2 is a waveform diagram of a scan electrode of a first subfield after Vsync output according to the ADS driving method of a plasma display device according to the related art.

3 is a block diagram of a plasma display device according to an exemplary embodiment of the present invention.

4 is a schematic block diagram of a controller according to an exemplary embodiment of the present invention in FIG. 3.

5 is a diagram illustrating a frame of an image signal according to a normal Vsync output according to an embodiment of the present invention.

6 is a diagram illustrating a method of driving a plasma display device according to an exemplary embodiment of the present invention in the case of a Vsync output having an abnormal period.

Claims (9)

Driving a plasma display device for dividing an image of each field displayed on the plasma display panel into a plurality of subfields in response to an input video signal, and displaying a gray level according to the combination of the subfields to display an image corresponding to the video signal. In the method, (a) detecting the frequency of the vertical synchronization signal; (b) comparing the frequency detected in step (a) with a preset reference frequency; And (c) adjusting the number of subfields according to the comparison result in step (b) Method of driving a plasma display device comprising a. The method of claim 1, And the number of the subfields is adjusted if the comparison frequency is shorter than the reference frequency period. The method of claim 2, And the period of the reference frequency is the minimum time required to drive the subfield of the image signal frame. The method of claim 2, When the comparison result in step (b) is shorter than the period of the reference frequency, And removing at least one subfield from among the subfields of the image signal frame input from the outside. The method of claim 4, wherein And removing the subfields sequentially from the minimum weight subfield to the weighted subfield. A plasma panel having a plurality of address electrodes arranged in a column direction and a plurality of scan electrodes and sustain electrodes arranged in a row direction; A control unit which adjusts the number of subfields constituting one frame according to the frequency change of the vertical synchronization signal input from the outside, and generates and outputs a control signal according thereto; An address driver which receives the control signal from the controller and applies a display data signal to the address electrode to select a discharge cell to be displayed; A sustain driver which receives the control signal from the controller and applies a driving voltage to the sustain electrode; And A scan driver which receives the control signal from the controller and applies a driving voltage to the scan electrode Plasma display device comprising a. The method of claim 6, The control unit, A frame memory unit which stores a frame for an R.G.B video signal input from the outside; A memory unit storing a reference frequency of the vertical synchronization signal; A vertical frequency detector detecting a frequency of the vertical synchronization signal input from the outside; A vertical sync signal (Vsync) determination unit for comparing the frequency detected by the vertical frequency detector with a reference frequency stored in the memory unit; A driving signal controller configured to generate and output a control signal for adjusting the number of subfields of the image signal frame according to a result of the determination unit; Plasma display device comprising a. The method of claim 7, wherein If the frequency waveform of the input vertical synchronization signal is shorter than the reference frequency period as a result of the determination of the vertical synchronization signal (Vsync) determination unit, And removing at least one subfield of the image signal frame input from the outside. The method of claim 8, And removing the subfields sequentially from the minimum weight subfield.