KR20050112902A - Field sequential color liquid crystal display device - Google Patents

Abstract

The present invention provides a time division type color liquid crystal display device suitable for solving the problem of deterioration in image quality due to the difference in width of the black matrix in the divided area. And a division driving time division type color liquid crystal display in which a general region is defined, comprising: a common gate line arranged in one direction on a lower substrate of the division region; First and second data lines arranged in a direction perpendicular to the common gate line to define first and second pixel areas; First and second thin film transistors formed in one region of the first and second pixel regions, respectively; First and second pixel electrodes formed in the first and second pixel regions, respectively; An upper substrate facing the lower substrate; And a black matrix layer formed on the upper substrate corresponding to the common gate line, the first and second data lines, and the first and second thin film transistors. The width of the black matrix layer is the same in the divided area and the general area.

Description

Time division color liquid crystal display {FIELD SEQUENTIAL COLOR LIQUID CRYSTAL DISPLAY DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a time-division color (FSC) liquid crystal display device capable of realizing high resolution.

CRT (Cathode Ray Tube), one of the commonly used display devices, is mainly used for monitors such as TVs, measuring devices, and information terminal devices.However, due to the weight and size of the CRT itself, Could not respond actively to demands.

Therefore, in the trend of miniaturization and weight reduction of various electronic products, CRT has a certain limit in weight and size, and is expected to replace the liquid crystal display (LCD) and gas using an electro-optic effect. Plasma display panels (PDPs) using discharges and EL display devices (ELDs) using electroluminescent effects have been studied. Among them, researches on liquid crystal displays have been actively conducted.

In order to replace the CRT, liquid crystal display devices having advantages such as small size, light weight, and low power consumption have been actively developed. Recently, the liquid crystal display device has been developed enough to perform a role as a flat panel display device. In addition, the demand for the liquid crystal display device is continuously increasing as it is used for a monitor and a large information display device of a desktop computer.

The driving principle of the liquid crystal display device uses the optical anisotropy and polarization property of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Accordingly, when the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal due to optical anisotropy to express image information.

Currently, active matrix LCDs (AM-LCDs) in which a thin film transistor, which is a switching element, and pixel electrodes connected to the thin film transistor are arranged in a matrix manner, are attracting the most attention due to their excellent resolution and ability to implement video.

Hereinafter, a general liquid crystal display device implementing a screen based on the driving principle will be described.

1 is a schematic cross-sectional view of a general liquid crystal display.

As shown in FIG. 1, a general liquid crystal display device includes a transparent first and second glass substrates 1 and 10 bonded to each other with a predetermined space therebetween, and between the first, second and glass substrates 1 and 10. It consists of a liquid crystal panel composed of a filled liquid crystal layer 15 and a backlight 16 positioned on the rear surface of the first glass substrate 1 to supply light to the liquid crystal panel.

Here, the first glass substrate 1, which is a TFT array substrate, includes a plurality of gate lines (not shown) arranged in one direction at a predetermined interval, and a plurality of data arranged at regular intervals in a direction perpendicular to the gate lines. A line (not shown), a plurality of pixel electrodes 2 formed in a matrix form in each pixel region defined by crossing each of the gate lines and the data lines, and switched by a signal of the gate lines to A plurality of thin film transistors (T) 3 for transmitting a signal to each pixel electrode is formed.

On the second glass substrate 10, which is a color filter substrate, a black matrix layer 11 for blocking light except for the pixel region, R (Red) for transmitting only light of a specific wavelength band and absorbing the remaining light, A color filter layer 12 composed of G (Green) and B (Blue) cells and a common electrode 14 for realizing an image are formed.

Reference numeral 13 is an overcoat layer.

The first and second glass substrates 1 and 10 are bonded to each other by a seal material having a predetermined space by a spacer and having a liquid crystal injection hole, so that the liquid crystal is injected between the two substrates.

1 shows only one pixel area on the first and second glass substrates 1 and 10 for convenience.

However, the general liquid crystal display device having such a structure has the following problems.

First, since the light transmittance of the color filter is 33% or less at a maximum, the loss of light reaching the color filter is large, so that the backlight needs to be brightened to increase the brightness, thereby increasing the power consumption.

Second, such a color filter is very expensive compared to other materials of the liquid crystal display device, thus increasing the manufacturing cost of the liquid crystal display device.

In order to solve the problem of the liquid crystal display device, a proposed time-division liquid crystal display device capable of realizing full-color without a color filter is proposed.

In general, a backlight of a liquid crystal display device supplies a white light to a liquid crystal panel while it is always turned on, but a time division type liquid crystal display device sequentially fixes the R, G, and B light sources of R, G, and B backlight units for one frame. It is a method of displaying color image by lighting at time interval.

This time-division method was introduced in about 1960, but it was difficult to realize because the technology for a liquid crystal mode having a high response speed and a light source corresponding to the response speed of the liquid crystal must be followed.

However, in recent years, due to the remarkable development of the liquid crystal display technology, ferroelectric liquid crystal (FLC), optically-compensated bend (OCB) or twisted nematic (TN) liquid crystal mode having high-speed response characteristics and high-speed R A time division type liquid crystal display using a G, B backlight has been proposed.

In particular, the OCB mode is mainly used as the liquid crystal mode for the time division type liquid crystal display device. The OCB cell is subjected to a rubbing treatment in the same direction on opposite sides of the upper and lower substrates, and then a constant voltage is applied to the band. By forming a (bend) structure, the liquid crystal molecules move rapidly when voltage is applied, and the time taken for the liquid crystal to be rearranged, that is, the response time is very fast within approximately 5 msec. Therefore, the liquid crystal cell of the OCB mode is very suitable for a time division type liquid crystal display device because it has almost no afterimage on the screen due to its high-speed response characteristic.

2 is a schematic cross-sectional view of a general time division type liquid crystal display device.

As shown in FIG. 2, a general time division type liquid crystal display device includes an upper substrate 20 and a lower substrate 25 as an array substrate, and a liquid crystal layer 28 filled between upper and lower substrates 20 and 25. And an R, G, and B three-color backlight 29 for supplying light to the liquid crystal panel including the upper and lower substrates 20 and 25 and the liquid crystal layer 28.

On the surface facing the liquid crystal layer 28 of the upper and lower substrates 20 and 25, the common electrode 22 and the pixel electrode 26 are formed to serve as electrodes for applying a voltage to the liquid crystal layer 28. Formed.

A black matrix 21 is formed between the upper substrate 20 and the common electrode 22 to block light in a region other than the pixel electrode 26 of the lower substrate 25.

On the lower substrate 25, a thin film transistor T 27, which is a switching element electrically connected to the pixel electrode 26, is formed at a position corresponding to the black matrix 21 of the upper substrate 20.

The thin film transistor (T) 27 is composed of a gate electrode, a source, and a drain electrode, not shown.

Reference numeral '19' is an overcoat layer.

2 illustrates only one pixel area on the upper and lower substrates 20 and 25 for convenience.

The above-mentioned time division type liquid crystal display device is distinguished from the general liquid crystal display device by the fact that it does not need a color filter and the structure which turns on the R, G, B light source of a backlight unit separately.

However, each subframe time of the FSC liquid crystal display device having the above-described configuration is, as shown in FIG. 3, two thin film transistor (TFT) scan times, a liquid crystal drive time, and a backlight (B / L) It consists of scan time.

When one sub frame is 5.56 ms, the TFT needs to be scanned twice within 5.56 ms, and the scan time of the TFT must be reduced in order to proceed at the time required for the liquid crystal drive time and the backlight scan.

At this time, the backlight (B / L) scan time is fixed as 2ms as a factor directly related to the brightness of the FSC LCD. In addition, the driving time of the liquid crystal is a factor indicating the response time of the liquid crystal after application of voltage, and in the case of the OCB mode, about 1 to 3 ms is required. Therefore, except for the backlight scan time and the liquid crystal drive time, about 2.4 ms is devoted to the TFT scan.

In a time-division color liquid crystal display for achieving a high resolution of VGA (640 × 480) or higher, one gate line on time (ie, TFT charging time) is 2.5 s because 480 gate lines must be scanned twice within 2.4 ms. . Simulation of charge characteristics of the TFT shows that the gate-on time must be over 3.8µs for 99% charge. Therefore, in order to drive the high resolution (VGA or higher), as shown in FIG.

As shown in FIG. 4, the time-division type liquid crystal display 40 which is divided into two parts and simultaneously driven is opposed to the upper substrate 41 and the upper substrate 41 and has a plurality of gate lines G. As shown in FIG. A lower substrate 42 having a pixel region in a matrix form and the data lines D are arranged in a direction perpendicular to each other, a liquid crystal layer (not shown) filled between the upper and lower substrates 41 and 42; First and second gates configured in one region of the lower substrate 42 to divide the plurality of gate lines of the lower substrate 42 into upper and lower portions and apply gate driving pulses to upper and lower gate lines, respectively. Driver ICs 43 and 44 and first and second source driver ICs 45 and 46 provided above and below the lower substrate 42 to input data signals to the data lines.

As described above, the split driving is performed using the first and second gate driver ICs 43 and 44 and the first and second source driver ICs 45 and 46 so that 480 gate lines can be divided into two lines within 2.4 ms of one subframe. Can be scanned once.

The time division type liquid crystal display configured as described above is driven by scanning the 480th gate line when scanning the first gate line.

As described above, two division parts, that is, the 240 th gate line and the 241 th gate line, are arranged adjacent to each other during the division driving.

Hereinafter, a time division type color liquid crystal display according to the related art will be described with reference to the accompanying drawings.

5 is an enlarged layout view of an adjacent pixel area of a divided part of a time division type color liquid crystal display according to the related art, and FIG. 6 is a cross-sectional view of the structure taken along the line II ′ of FIG. 5.

For example, assuming that a time division type color liquid crystal display device driving two divisions is composed of n gate lines, the n / 2th gate lines and (n / 2) + 1st columns formed at the upper and lower portions of the boundary region divided by two are divided. The configuration of each of the first and second pixel regions adjacent to the gate line, that is, the divided region will be described below.

First, as illustrated in FIGS. 5 and 6, the first pixel region is formed horizontally and horizontally to define a first pixel region, a first gate line 51 and a first data line 54, and the first gate. The gate insulating layer 52 formed of a material such as SiNx or SiOx on the entire surface of the first gate electrode 51a protruding upwardly of the line 51 and the lower substrate 50 including the first gate electrode 51a. And a first active layer 53a formed in an island shape on the gate insulating layer 52 on the first gate electrode 51a and protruding from the first data line 54. The first source electrode 54a overlapped with an upper portion of one side of the 53a, and the first drain electrode 54b spaced apart from the first source electrode 54a by a predetermined interval and overlapped with the other side of the first active layer 53a. And the lower substrate 5 to have the first contact hole 56 so that the first drain electrode 54b is exposed. An interlayer insulating film 55 formed on the entire surface of the substrate 0, a first pixel electrode 57 formed on the pixel region to be in contact with the first drain electrode 54b through the first contact hole 56, and the first The first storage upper electrode 57a extends from the pixel electrode 57 and overlaps one region of the gate line of the previous stage of the first gate line 51. In this case, one region of the gate line at the previous stage of the first gate line 51 is defined as a first storage lower electrode, between the first source electrode 54a and the first active layer 53a and the first drain electrode. A first ohmic contact layer 53b is formed between 54b and the first active layer 53a. The first thin film including the first gate electrode 51a, the first source electrode 54a, and the first drain electrode 54b is formed at the intersection of the first gate line 51 and the first data line 54. The transistor is constructed.

5 and 6, the second pixel area adjacent to the first pixel area has a symmetrical configuration with respect to the first pixel area based on the x-axis.

That is, the second gate electrode 71a which is formed in the vertical direction and protrudes downwardly from the second gate line 71 and the second data line 74 to define the second pixel region, and the second gate line 71. ), A gate insulating film 52 formed of a material such as SiNx or SiOx on the entire surface of the lower substrate 50 including the second gate electrode 71a, and the gate insulating film (above the second gate electrode 71a). 52, a second active layer 73a formed in an island shape, and a second source electrode 74a protruding from the second data line 74 and overlapping an upper portion of one side of the second active layer 73a. And a second contact hole spaced apart from the second source electrode 74a by a predetermined interval and overlapping the other side of the second active layer 73a and the second drain electrode 74b. An interlayer insulating film 55 formed on the entire surface of the lower substrate 50 to have 76, and the second cone The second pixel electrode 77 formed on the second pixel region to contact the second drain electrode 74b through the hole 76 and the second gate line 71 extending from the second pixel electrode 77. And a second storage upper electrode 77a overlapping one region of the gate line at the subsequent stage. In this case, one region of the gate line after the second gate line 71 is defined as a second storage lower electrode, between the second source electrode 74a and the second active layer 73a and the second drain electrode. A second ohmic contact layer 73b is formed between the 74b and the second active layer 73a. The second thin film including the second gate electrode 71a, the second source electrode 74a, and the second drain electrode 74b is formed at a portion where the second gate line 71 and the second data line 74 cross each other. The transistor is constructed.

As described above, in the divided region, the first and second gate lines 51 and 71 are arranged in parallel and spaced apart from each other at regular intervals.

The n / 2th gate line has been described as the first gate line 51, and the (n / 2) + 1st gate line has been described as the second gate line 71.

In addition, a black matrix layer 61, a common electrode 62, and an overcoat layer 63 are formed on the upper substrate 60 that is opposed to and bonded to the lower substrate 50 at a predetermined interval. In this case, the black matrix layer 61 may include the first and second gate lines 51 and 71, the first and second data lines 54 and 74, the first and second thin film transistors formed adjacent to the divided portion. It is formed in an upper region corresponding to other gate lines in the upper and lower general regions.

Since the width of the black matrix layer 61 formed in the divided region should cover the upper portion including the first and second gate lines 51 and 71, the black matrix layer 61 covering one gate line in the general region is provided. Wider than)

As described above, when the width of the black matrix layer 61 in the divided region and the general region is different, a problem of deterioration in image quality in which black lines appear in the divided region in the entire LCD screen occurs.

In order to prevent black lines from appearing in the divided region, the width of the black matrix layer in the general region may be the same as the divided region. However, when the black matrix layer of the general region is increased in accordance with the divided region, another problem occurs that the aperture ratio is reduced.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a time division type color liquid crystal display device suitable for solving the problem of deterioration in image quality due to the difference in the width of the black matrix in the divided region.

In order to achieve the above object, a time division type color liquid crystal display device according to the present invention is a division drive time division type color liquid crystal display device in which a divided area and a general area are defined, and are arranged in one direction on a lower substrate of the divided area. A gate line; First and second data lines arranged in a direction perpendicular to the common gate line to define first and second pixel areas; First and second thin film transistors formed in one region of the first and second pixel regions, respectively; First and second pixel electrodes formed in the first and second pixel regions, respectively; An upper substrate facing the lower substrate; And a black matrix layer formed on the upper substrate corresponding to the common gate line, the first and second data lines, and the first and second thin film transistors.

The width of the black matrix layer is the same in the divided area and the general area.

The first thin film transistor of the first pixel region may include a first gate electrode protruding in an upper direction of the common gate line, a gate insulating film formed on an entire surface of the lower substrate including the first gate electrode, and the first gate. A first active layer formed in an island shape on the gate insulating layer above the electrode, a first source electrode protruding from the first data line and overlapping an upper portion of one side of the first active layer, and the first source electrode And a first drain electrode spaced apart from each other and overlapping the upper portion of the first active layer.

The second thin film transistor of the second pixel region may include a second gate electrode protruding downwardly from the common gate line, a gate insulating film formed on an entire surface of the lower substrate including the second gate electrode, and the second gate electrode. A second active layer formed in an island shape on the gate insulating layer above the gate electrode, a second source electrode protruding from the second data line and overlapping an upper portion of the second active layer, and the second source electrode; And a second drain electrode spaced apart at a predetermined interval and overlapping the other upper portion of the second active layer.

The time-division type color liquid crystal display device further comprises an interlayer insulating film on the entire surface of the lower substrate so that the first and second drain electrodes are exposed to have first and second contact holes.

The first and second pixel electrodes are in contact with the first and second drain electrodes through the first and second contact holes.

The first and second storage electrodes may extend from the first and second pixel electrodes to overlap the first and second storage upper electrodes in one region of the gate line before and after the common gate line.

The first ohmic contact layer may be further formed between the first source electrode and the first active layer and between the first drain electrode and the first active layer.

The second ohmic contact layer may be further formed between the second source electrode and the second active layer and between the second drain electrode and the second active layer.

The black matrix layer, the common electrode and the overcoat layer are formed on the upper substrate.

The black matrix layer is formed in an upper region corresponding to the common gate line formed adjacent to the divided region, the first and second data lines, the first and second thin film transistors, and other gate lines of the general region. It is done.

Hereinafter, a time division type color liquid crystal display device according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 7 is an enlarged layout view of an adjacent pixel area of a divided part of a time division type color liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 8 is a cross-sectional view of the structure taken along line II-II ′ of FIG. 7.

The time division color liquid crystal display according to the present invention performs two thin film transistor (TFT) scans, liquid crystal drive and backlight (B / L) scans during each subframe.

At this time, in order to scan the TFT twice within each sub frame time, the division driving is performed as described above with reference to FIGS. 3 and 4.

In the following description, assuming that the time division type color liquid crystal display for split driving is composed of n gate lines, the n / 2th gate lines and ((n / 2) +1) formed on the upper and lower portions of the split boundary region for split driving are ((n / 2) +1). The configuration of each of the first and second pixel regions adjacent to the (th) th gate line, that is, the divided region, will be described.

The time division type color liquid crystal display device according to the present invention is applied to a time division type color liquid crystal display device having a high resolution of VGA (640 × 480) or higher. A division area and a general area are defined, and the division area shares a gate line. The compositional feature is that the widths of the black matrix layers in the general region and the divided region are the same. The detailed description is as follows.

As shown in FIG. 7 and FIG. 8, in a time division type color liquid crystal display device which is divided-driving, a common gate line 81 is arranged in one direction in a divided region, and the image is formed around the common gate line 81. The first and second data lines 84 and 104 are arranged in the lower portion of the first and second data lines 84 in a direction perpendicular to the common gate line 81, respectively.

In the first pixel region, SiNx or SiOx is formed on the entire surface of the lower substrate 80 including the first gate electrode 81a protruding upward from the common gate line 81 and the first gate electrode 81a. A gate insulating film 82 formed of a material such as a first material, a first active layer 83a formed in an island shape on the gate insulating film 82 on the first gate electrode 81a, and the first data line ( A first source electrode 84a protruding from the first active layer 83a and overlapping an upper portion of the first active layer 83a, and spaced apart from the first source electrode 84a by a predetermined interval, and the other side of the first active layer 83a. An interlayer insulating film 85 formed on the entire surface of the lower substrate 80 such that the first drain electrode 84b overlapped with the first drain electrode 84b, the first drain electrode 84b is exposed, and the first contact hole 86 is exposed. On the pixel region to be in contact with the first drain electrode 84b through the contact hole 86. Extends from the formed first pixel electrode 87 and the first pixel electrode 87 is a first storage upper electrode (87a) is overlap in one region of the previous-stage gate line of the common gate line 81. In this case, one region of the gate line before the common gate line 81 is defined as a first storage lower electrode, between the first source electrode 84a and the first active layer 83a, and the first drain electrode 84b. ) And a first ohmic contact layer 83b are formed between the first active layer 83a and the first active layer 83a. The common gate electrode 81, the first source electrode 84a, and the first drain electrode 84b form a first thin film transistor.

SiNx or SiOx is formed on the entire surface of the lower substrate 80 including the second gate electrode 101a protruding downward from the common gate line 81 and the second gate electrode 101a in the second pixel area. A gate insulating layer 82 formed of the same material, a second active layer 103a formed in an island shape on the gate insulating layer 102 on the second gate electrode 101a, and the second data line 104. The second source electrode 104a protrudes from the second active layer 103a and overlaps the upper portion of the second active layer 103a, and is spaced apart from the second source electrode 104a by a predetermined interval and is located on the other side of the second active layer 103a. An interlayer insulating film 85 formed on the entire surface of the lower substrate 80 such that the overlapped second drain electrode 104b, the second drain electrode 104b, and the second contact hole 106 are exposed, and the second contact. The pixel region is in contact with the second drain electrode 104b through the hole 106. The can 2 extending from the pixel electrode 107 and the second pixel electrode 107 is a second storage upper electrode (107a) is overlapped on the stage gate line work area since the common gate line 81 formed on. In this case, one region of the gate line after the common gate line 81 is defined as a second storage lower electrode, between the second source electrode 104a and the second active layer 103a and the second drain electrode 104b. ) And a second ohmic contact layer 103b is formed between the second active layer 103a. The common gate electrode 81, the second source electrode 104a, and the second drain electrode 104b constitute a second thin film transistor.

In addition, the upper substrate 90 is opposed to the lower substrate 80 to have a predetermined distance, and the black matrix layer 91, the common electrode 92, and the overcoat layer 93 are disposed on the upper substrate 90. Formed.

In this case, the black matrix layer 91 is a common region except for the common gate line 81 formed adjacent to the divided region, the first and second data lines 84 and 104, and the first and second thin film transistors and the divided region. It is formed in the upper region corresponding to the other gate line of.

As described above, since the common gate line 81 is formed in the divided region, the widths of the black matrix layer 91 formed above the respective gate lines of the divided region and the general region are the same.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the above embodiments, but should be defined by the claims.

The time division type color liquid crystal display device according to the present invention as described above has the following effects.

Since the gate lines are shared by the divided regions in the time division type liquid crystal display device which is divided and driven, the widths of the black matrix layers in the divided region and the normal region can be made the same.

Accordingly, it is possible to prevent the problem of deterioration in image quality due to the difference in width of the black matrix layer in the divided region and the general region.

1 is a schematic cross-sectional view of a general liquid crystal display device

2 is a schematic cross-sectional view of a general time division type liquid crystal display device.

3 is a driving configuration for improving mixed color characteristics of a general time division type color liquid crystal display device;

4 is a schematic plan view of a time division type color liquid crystal display device for general division driving;

5 is an enlarged layout view of neighboring pixel areas of a divided portion of a time division type color liquid crystal display according to the related art.

6 is a cross-sectional view taken along line II ′ of FIG. 5.

7 is an enlarged layout view of neighboring pixel areas of a divided portion of a time division type color liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 8 is a cross-sectional view taken along line II-II ′ of FIG. 7.

Explanation of symbols on the main parts of the drawings

80: lower substrate 81: common gate line

81a: first gate electrode 82: gate insulating film

83a: first active layer 83b: first ohmic contact layer

84: first data line 84a: first source electrode

84b: first drain electrode 85: interlayer insulating film

86: first contact hole 87: first pixel electrode

90: upper substrate 91: black matrix layer

92: common electrode 93: overcoat layer

101a: second gate electrode 103a: second active layer

103b: second ohmic contact layer 104: second data line

104a: second source electrode 104b: second drain electrode

106: second contact hole 107: second pixel electrode

Claims (11)

In the divided driving time division type color liquid crystal display in which a divided region and a general region are defined, A common gate line arranged in one direction on the lower substrate of the divided region; First and second data lines arranged in a direction perpendicular to the common gate line to define first and second pixel areas; First and second thin film transistors formed in one region of the first and second pixel regions, respectively; First and second pixel electrodes formed in the first and second pixel regions, respectively; An upper substrate facing the lower substrate; And a black matrix layer formed on the upper substrate corresponding to the common gate line, the first and second data lines, and the first and second thin film transistors. The method of claim 1, And the width of the black matrix layer is the same in the divided area and the general area. The method of claim 1, The first thin film transistor of the first pixel region may be A first gate electrode protruding in an upward direction of the common gate line; A gate insulating film formed on an entire surface of the lower substrate including the first gate electrode; A first active layer formed in an island shape on the gate insulating layer on the first gate electrode; A first source electrode protruding from the first data line and overlapping an upper portion of one side of the first active layer; And a first drain electrode spaced apart from the first source electrode at a predetermined interval and overlapped on the other side of the first active layer. The method of claim 1, The second thin film transistor of the second pixel region may be A second gate electrode protruding downward from the common gate line; A gate insulating film formed on an entire surface of the lower substrate including the second gate electrode; A second active layer formed in an island shape on the gate insulating layer on the second gate electrode; A second source electrode protruding from the second data line and overlapping an upper portion of one side of the second active layer; And a second drain electrode spaced apart from the second source electrode at a predetermined interval and overlapped on the other side of the second active layer. The method according to claim 3 or 4, The time division type color liquid crystal display device further comprises an interlayer insulating layer on the entire surface of the lower substrate such that the first and second drain electrodes expose the first and second contact holes. The method of claim 5, And the first and second pixel electrodes are in contact with the first and second drain electrodes through the first and second contact holes. The method of claim 1, A time division type color liquid crystal further comprising an overlap between the first and second storage upper electrodes extending from the first and second pixel electrodes to overlap one region of the gate line before and after the common gate line; Display. The method of claim 3, wherein And the first ohmic contact layer is further formed between the first source electrode and the first active layer and between the first drain electrode and the first active layer. The method of claim 4, wherein And a second ohmic contact layer is further formed between the second source electrode and the second active layer, and between the second drain electrode and the second active layer. The method of claim 1, And a black matrix layer, a common electrode, and an overcoat layer formed on the upper substrate. The method of claim 1, The black matrix layer is formed in an upper region corresponding to the common gate line formed adjacent to the divided region, the first and second data lines, the first and second thin film transistors, and other gate lines of the general region. Time division type color liquid crystal display device.