KR20050069257A - Method for exposing edge shot in photo-lithography process - Google Patents

Method for exposing edge shot in photo-lithography process Download PDF

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KR20050069257A
KR20050069257A KR1020030101223A KR20030101223A KR20050069257A KR 20050069257 A KR20050069257 A KR 20050069257A KR 1020030101223 A KR1020030101223 A KR 1020030101223A KR 20030101223 A KR20030101223 A KR 20030101223A KR 20050069257 A KR20050069257 A KR 20050069257A
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shot
edge
wafer
exposure
chip
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KR1020030101223A
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KR100598254B1 (en
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이동진
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동부아남반도체 주식회사
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003Alignment type or strategy, e.g. leveling, global alignment
    • G03F9/7023Aligning or positioning in direction perpendicular to substrate surface
    • G03F9/7026Focusing
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003Alignment type or strategy, e.g. leveling, global alignment
    • G03F9/7023Aligning or positioning in direction perpendicular to substrate surface
    • G03F9/7034Leveling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

본 발명은 반도체 포토리소그라피 공정에서 웨이퍼 표면상 토폴로지에 의한 에지부분에서의 노광에러를 감쇄시키는 향상된 에지샷 노광방법에 관한 것이다. 즉, 본 발명은 스텝퍼에서의 노광공정 수행시 웨이퍼 에지 샷에서 칩이 형성되는 부분에 대해서만 자동 블라인드를 셋팅하여 블레이드 샷을 형성함으로서, 웨이퍼 에지부분의 칩이 형성되는 부분에 대한 노광시 포커스 및 레벨링 에러 발생을 감소시켜 칩 생산성을 높이게 된다.The present invention relates to an improved edge shot exposure method for attenuating exposure errors at edge portions due to the topology on the wafer surface in a semiconductor photolithography process. That is, the present invention forms a blade shot by setting an automatic blind only on a portion where a chip is formed in a wafer edge shot when performing an exposure process in a stepper, thereby focusing and leveling during exposure to a portion where a chip is formed on a wafer edge portion. This reduces chip errors and increases chip productivity.

Description

반도체 포토리소그라피 공정에서 에지 샷 노광방법{METHOD FOR EXPOSING EDGE SHOT IN PHOTO-LITHOGRAPHY PROCESS}Edge shot exposure method in semiconductor photolithography process {METHOD FOR EXPOSING EDGE SHOT IN PHOTO-LITHOGRAPHY PROCESS}

본 발명은 반도체 소자 제조 방법에 관한 것으로, 특히 반도체 포토리소그라피 공정에서 웨이퍼 표면상 토폴로지에 의한 에지부분에서의 노광에러를 감쇄시키는 향상된 에지샷 노광방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to an improved edge shot exposure method for attenuating exposure errors at edge portions due to a topology on a wafer surface in a semiconductor photolithography process.

통상적으로 반도체 포토리소그라피 공정에서는 웨이퍼 에지부분에 여러 단계의 층이 겹치면서 EBR, WEE 등으로 인하여 토폴로지가 크게 발생된다.In general, a semiconductor photolithography process generates a large topology due to EBR, WEE, etc. as layers of several layers overlap on a wafer edge.

이에 따라 스텝퍼에서의 노광시 상기 웨이퍼 에지부분의 토폴로지 발생에 대한 고려없이 그대로 노광공정을 진행하는 경우 에지부분의 토폴로지에 따른 난반사 등으로 인해 에지의 불완전한 샷의 포커스와 레벨링이 맞지 않게 되어 생산성이 저하되는 문제점이 있었다.As a result, when the exposure process is performed without considering the topology of the wafer edge portion during exposure on the stepper, the focus and leveling of the incomplete shot of the edge are not matched due to the diffuse reflection according to the topology of the edge portion. There was a problem.

즉, 노광공정을 위한 웨이퍼상 샷영역 예시도를 도시한 도 1에서 보여지는 바와 같이 종래에는 웨이퍼 에지부분(100)에 칩이 형성 안되는 웨이퍼 영역에도 노광공정을 샷이 수행되는데, 이때 칩이 형성되지 않는 웨이퍼 에지부분에서 토폴로지가 심하게 발생하는 경우 토폴로지에 따른 난반사가 발생하여 칩이 형성되는 웨이퍼 영역에 대한 포커싱에도 영향을 미치게 되는 문제점이 있었다.That is, as illustrated in FIG. 1, which illustrates an example of an on-wafer shot region for an exposure process, a shot is performed in an exposure process even on a wafer region where a chip is not formed on the wafer edge portion 100. If the topology is severely generated at the non-wafer edge part, diffuse reflection occurs according to the topology, which affects the focusing on the wafer area where the chip is formed.

따라서, 본 발명의 목적은 반도체 포토리소그라피 공정에서 웨이퍼 표면상 토폴로지에 의한 에지부분에서의 노광에러를 감쇄시키는 향상된 에지샷 노광방법을 제공함에 있다.Accordingly, it is an object of the present invention to provide an improved edge shot exposure method for attenuating exposure errors in edge portions due to the topology on the wafer surface in a semiconductor photolithography process.

상술한 목적을 달성하기 위한 본 발명은 반도체 포토리소그라피 공정시 웨이퍼 에지영역의 토폴로지에 의한 포커스 에러를 감쇄시키기 위한 스텝퍼에서의 향상된 에지 샷 노광방법으로서, (a)반도체 소자 제조를 위한 리소그라피 공정시 웨이퍼상에 포토레지스트를 도포시키는 단계와, (b)토폴로지가 존재하는 에지부분을 제외한 웨이퍼 영역에 대한 전체 노광을 수행시키는 단계와, (c)에지부분에 대한 노광을 위해 전체적인 포커스와 레벨링값을 측정하는 단계와, (d)웨이퍼 에지부분 중 칩이 형성되는 부분에 대해서만 블라인드를 셋팅시키고, 블레이드 샷을 형성시키는 단계와, (e)측정된 포커스와 레벨링값을 이용하여 칩이 형성되는 에지부분에 대한 노광을 수행시키는 단계,를 포함하는 것을 특징으로 한다.The present invention for achieving the above object is an improved edge shot exposure method in a stepper to reduce the focus error due to the topology of the wafer edge region during the semiconductor photolithography process, (a) a wafer during the lithography process for semiconductor device manufacturing Applying photoresist onto the substrate, (b) performing a full exposure of the wafer area except for the edge portion where the topology is present, and (c) measuring the overall focus and leveling values for exposure to the edge portion. (D) setting the blind only for the portion of the wafer edge where the chip is formed, forming a blade shot, and (e) using the measured focus and leveling values at the edge portion where the chip is formed. Performing exposure to the light, characterized in that it comprises a.

이하, 첨부된 도면을 참조하여 본 발명에 따른 바람직한 실시 예의 동작을 상세하게 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail the operation of the preferred embodiment according to the present invention.

도 2는 본 발명의 실시 예에 따른 포토리소그라피 공정에서 웨이퍼 에지부분에서 토폴로지에 의한 디포커싱 에러를 감소시키는 웨이퍼상 노광수행 처리 개념을 도시한 것이다. 이하 상기 도 2를 참조하면, FIG. 2 illustrates a concept of an on-wafer exposure process for reducing a defocusing error due to topology at a wafer edge in a photolithography process according to an embodiment of the present invention. Referring to FIG. 2 below,

본 발명에서는 에이퍼 에지부분에서 EBR(Edge Bead Remove), WEE(Wafer Edge Expose) 등으로 인하여 여러 단계의 층이 겹치면서 토폴로지(200)가 크게 발생하는 경우 스텝퍼에서는 노광수행시 토폴로지에 의한 난반사를 방지시키기 위해 칩이 형성되지 않는 토폴로지가 심한 영역(202)을 블라인드(Blind)시킨 후, 칩이 형성되는 에지 영역(204)에 대한 블레이드 샷(Blade shot)을 수행하게 된다. In the present invention, when the topology 200 is generated largely due to overlapping of various layers due to edge bead removal (EBR), wafer edge expose (WEE), etc. at the aper edge part, the stepper prevents diffuse reflection due to the topology during exposure. In order to blind the blind area 202 where the chip is not formed, the blade shot is performed on the edge area 204 where the chip is formed.

도 3에는 칩이 형성되는 에지영역(204)을 제외한 나머지 부분을 블라인드 처리하여, 칩이 형성된 에지영역(204)에 대해서만 블레이드 샷을 수행하는 것을 도시하였다. 상기 블레이드 샷은 최적화된 샷을 의미하는 것으로 에지샷마다 블라인드 시키는 범위는 다르게 설정될 수 있다.FIG. 3 illustrates that the blade shot is performed only on the edge region 204 where the chip is formed by blind processing the remaining portions except the edge region 204 where the chip is formed. The blade shot means an optimized shot, and the range of blinding for each edge shot may be set differently.

즉, 스텝퍼에서의 노광동작을 보다 상세히 설명하면, 먼저 웨이퍼 전체 샷을 노광하는 경우 에지 샷은 노광을 수행하지 않고, 웨이퍼 전체적인 포커스와 레벨링값을 측정한다. 그런 후, 전체 노광이 끝날 때 상기 도 3에서와 같이 최적화된 블레이드 샷으로 스텝퍼가 자동으로 블라인드 설정을 하고, 다시 에지 부분에 이중 노광을 수행한다. 이때 블레이드 샷에서의 최상의 포커스와 레벨렝에서 노광을 수행하게 되는 것이다. 또한 트윈 스테이지를 적용하는 경우에는 스테이지1이 노광할 때, 스테이지2에서 웨이퍼에 대한 토폴로지 정보를 미리 검사하고, 다음 노광단계에서 자동적으로 블레이드 샷을 적용하여 이중 노광을 수행한다. That is, when the exposure operation in the stepper is described in more detail, first, when the entire wafer is exposed, the edge shot does not perform exposure and measures the entire wafer focus and leveling values. Then, at the end of the entire exposure, the stepper automatically sets the blind with the optimized blade shot as shown in FIG. 3, and performs double exposure on the edge part again. At this point, exposure is performed at the best focus and level in the blade shot. In the case of applying the twin stage, when the stage 1 is exposed, the topology information on the wafer is inspected in advance in the stage 2, and the blade shot is automatically applied in the next exposure stage to perform the double exposure.

상기한 바와 같이 본 발명에서는 노광공정 수행시 웨이퍼 에지 샷에서 칩이 형성되는 부분에 대해서만 자동 블라인드를 셋팅하여 블레이드 샷을 형성함으로서, 웨이퍼 에지부분의 칩이 형성되는 부분에 대한 노광시 포커스 및 레벨링 에러의 발생을 감소시키게 되어 생산성을 향상시킨다.As described above, in the present invention, a blade shot is formed by setting an automatic blind only for a portion where a chip is formed in the wafer edge shot during the exposure process, thereby focusing and leveling errors during exposure of the portion where the chip is formed in the wafer edge portion. It reduces the occurrence of the and improves the productivity.

한편 상술한 본 발명의 설명에서는 구체적인 실시 예에 관해 설명하였으나, 여러 가지 변형이 본 발명의 범위에서 벗어나지 않고 실시될 수 있다. 따라서 발명의 범위는 설명된 실시 예에 의하여 정할 것이 아니고 특허청구범위에 의해 정하여져야 한다.Meanwhile, in the above description of the present invention, specific embodiments have been described, but various modifications may be made without departing from the scope of the present invention. Therefore, the scope of the invention should be determined by the claims rather than by the described embodiments.

이상에서 설명한 바와 같이, 본 발명은 스텝퍼에서의 노광공정 수행시 웨이퍼 에지 샷에서 칩이 형성되는 부분에 대해서만 자동 블라인드를 셋팅하여 블레이드 샷을 형성함으로서, 웨이퍼 에지부분의 칩이 형성되는 부분에 대한 노광시 토폴로지에 의한 포커스 및 레벨링 에러 발생을 최소 최적화하여 생산성을 높이는 이점이 있다.As described above, the present invention forms the blade shot by setting the automatic blind only for the portion where the chip is formed in the wafer edge shot during the exposure process in the stepper, thereby exposing the portion where the chip is formed in the wafer edge portion. The productivity is improved by minimizing the occurrence of focus and leveling errors due to the time topology.

도 1은 일반적인 스텝퍼에서의 노광공정을 위한 웨이퍼 샷 상태 예시도,1 is a view illustrating a wafer shot state for an exposure process in a general stepper;

도 2는 본 발명의 실시 예에 따른 웨이퍼 에지영역의 토폴로지에 대응된 블레이드 샷 예시도,2 is a diagram illustrating a blade shot corresponding to a topology of a wafer edge area according to an embodiment of the present invention;

도 3은 본 발명의 실시 예에 따른 블레드 샷을 형성하기 위한 블라인드 셋팅 예시도. 3 is an exemplary blind setting for forming a blind shot according to an embodiment of the present invention.

Claims (1)

반도체 포토리소그라피 공정시 웨이퍼 에지영역의 토폴로지에 의한 포커스 에러를 감쇄시키기 위한 스텝퍼에서의 향상된 에지 샷 노광방법으로서,An improved edge shot exposure method in a stepper for attenuating a focus error caused by a topology of a wafer edge region in a semiconductor photolithography process, (a)반도체 소자 제조를 위한 리소그라피 공정시 웨이퍼상에 포토레지스트를 도포시키는 단계와,(a) applying a photoresist on a wafer in a lithography process for manufacturing a semiconductor device, (b)토폴로지가 존재하는 에지부분을 제외한 웨이퍼 영역에 대한 전체 노광을 수행시키는 단계와,(b) performing full exposure to the wafer region except for the edge portion where the topology is present; (c)상기 에지부분에 대한 노광을 위해 전체적인 포커스와 레벨링값을 측정하는 단계와,(c) measuring an overall focus and leveling value for exposing the edge portion; (d)상기 웨이퍼 에지부분 중 칩이 형성되는 부분에 대해서만 블라인드를 셋팅시키고, 블레이드 샷을 형성시키는 단계와,(d) setting blinds only for the portion where the chip is formed in the wafer edge portion, and forming a blade shot; (e)상기 측정된 포커스와 레벨링값을 이용하여 칩이 형성되는 에지부분에 대한 노광을 수행시키는 단계,(e) performing exposure on the edge portion where the chip is formed using the measured focus and leveling values, 를 포함하는 반도체 포토리소그라피 공정에서 에지 샷 노광방법.Edge shot exposure method in a semiconductor photolithography process comprising a.
KR1020030101223A 2003-12-31 2003-12-31 Method for exposing edge shot in photo-lithography process KR100598254B1 (en)

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
KR100607789B1 (en) * 2004-12-29 2006-08-02 동부일렉트로닉스 주식회사 Exposure method for photolithography process

Cited By (1)

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KR100607789B1 (en) * 2004-12-29 2006-08-02 동부일렉트로닉스 주식회사 Exposure method for photolithography process

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