KR20050061754A - Vertical-bell laboratories layered space-time apparatus using simplified multipliers for implementing new calculation scheme, and method thereof - Google Patents

Abstract

Disclosed are a V-BLAST device and a method embodied in a simplified multiplier for reducing the amount of calculation. The V-BLAST device of the mobile communication receiver receives a channel information vector and calculates an output cofactor and a determinant constituting a pseudo inverse by using a Jacobian value calculation present when calculating a pseudo inverse of the channel information vector. Outputting pseudo inverse calculator; A NORM and minimum value determiner for calculating a NORM using Jacobian value calculation in each row of the output cofactor, and extracting and outputting an index indicating a row having a minimum value among row-specific NORM values; A ZF vector selector for selecting and outputting a ZF vector, which is a row vector corresponding to the index, from the output cofactor; A matrix reducer for generating a reduction matrix from which the column vector corresponding to the index is removed from the channel information vector and re-input as the channel information vector; And a decision statistical calculator for multiplying the received symbol and the ZF vector by using a Jacobian value calculation, dividing the first multiplication result by the determinant, and outputting the result.

Description

Vertical-Bell laboratories layered space-time apparatus using simplified multipliers for implementing new calculation scheme, and method

The present invention relates to a multiple input multiple output (MIMO) mobile communication system, and more particularly, to a vertical-bell laboratories layered space-time (V-BLAST) apparatus and a method of a MIMO mobile communication receiver.

High speed transmission is an essential element in a mobile communication system for supporting multimedia. In the 3rd generation and later communication, a plan for realizing this has been studied in various ways, one of which is the MIMO communication system. In recent years, research for high speed communication has found that a radio channel having a multipath has a large amount of channel capacity. And scattering was recognized as abundant on multipath communication channels. Using this property, a communication processing method for high speed communication has been studied. In 1996 Foschini introduced the method of Diagonal-Bell Laboratories Layered Space-Time (D-BLAST). That is, when a plurality of antenna arrays are used in a transceiver and communication is performed using a diagonally arranged code structure, each code block propagates diagonally in space-time. In this case, when the channel environment is Rayleigh scattering environment and the number of antennas of the transceiver is the same, the transmission rate increases linearly with the number of antennas. Finally, the transmission rate approaches 90% of Shannon's channel capacity. However, the implementation of this method has a disadvantage of great complexity. In addition, in 1998, Wolniansky proposed the V-BLAST method, which has a hardware disadvantage compared to the existing D-BLAST, but has a disadvantage in that performance cannot be obtained because maximum diversity cannot be obtained.

1 is a block diagram illustrating a general MIMO mobile communication system. Referring to FIG. 1, a general MIMO mobile communication system includes an encoder 110 for encoding Tx data, a modulator 120 for modulating the encoded data by quadrature phase shift keying (QPSK), and a channel. A channel estimator 130 for extracting a channel information vector from a signal received from the signal, a V-BLAST device 140 for compensating and outputting distortion of a received signal, a demodulator 150 such as a QPSK format, a deinterleaver or a decoder 160. It is provided. The deinterleaver or decoder 160 outputs Rx data. The V-BLAST algorithm performed by the V-BLAST apparatus 140 includes various matrix calculations such as matrix addition, matrix multiplication, inverse matrix calculation, and so on. Implementing this in hardware using the usual methods requires a significant amount of hardware.

To implement the V-BLAST algorithm proposed by Wolniansky in 1998, we need a way to reduce the size of hardware. First, the V-BLAST algorithm is outlined. V-BLAST's algorithm performs an iterative procedure that includes determining the optimal order.

Hereinafter, for the sake of simplicity of the algorithm, the vector H indicating the channel information vector received by the V-BLAST device 140 and the reception symbol vector r are described as examples of being a 4x4 matrix.

First, as shown in Equation 1, the pseudo inverse of the first received channel information vector H is represented by G _{i = 1} . In Equation 1, H ⁺ denotes a Moore-Penrose pseudo-inverse matrix for H.

[Equation 1]

Next, as shown in Equation 2 below, for each row of G ₁ , NORM, which is the sum of the squares of the elements, is calculated and the smallest value is k ₁ . At this time, the row having the smallest value k ₁ is called a ZF (zero forcing) vector w _ki and is represented by Equation 3 below.

[Equation 2]

[Equation 3]

Next, decision statistic y _ki is obtained by multiplying the transpose of the received symbol ri by the ZF vector w _ki as shown in [Equation 4]. The decision container y _ki is input to a slicer and is used as a boundary condition, thereby estimating symbol information as shown in [Equation 5]. Is obtained.

[Equation 4]

[Equation 5]

At this time, the estimated symbol information as shown in [Equation 6] When multiplying by the corresponding channel vector of the channel information vector H and removing from the originally received symbol signal r _i , the component of the symbol is lost and only the component r _{i + 1} of the remaining components remains in the received symbol. That is, in [Equation 6] Is estimated symbol information Of the symbols received by the product of (H) _{ki which} is the k _i th vector of the received channel information vector H The amount by which components affect received symbols via the channel. Therefore, the newly calculated r _{i + 1} is It is a received symbol of the remaining components except for the component.

[Equation 6]

Therefore, in order to detect the remaining symbols with r _{i + 1} , the above process is repeated except for the k _i th channel vector in the originally received channel information vector H. That is, the channel information vector except for the k _i th channel vector is Let us calculate its pseudo inverse G _{i + 1} as shown in [Equation 7]. Are the columns k1, k2,. . is a matrix with ki as "0".

[Equation 7]

Next, the same process as described above is performed by finding the NORM of each row of the matrix and finding the minimum value as shown in [Equation 8] in the same manner as described above. In Equation 8, (G _i ) _j represents the j th row of G _i .

[Equation 8]

A block diagram showing a conventional V-BLAST field 140 value for implementing the V-BLAST algorithm described above is shown in FIG. Referring to FIG. 2, the received channel information vector H is input to the pseudo inverse matrix calculator 200, and the NORM and minimum value determiner 201 calculates the NORM and the minimum value based on each row of the inverse matrix and has a minimum value. Get the index of a row. The ZF vector selector 202 selects a row corresponding to the minimum index among the rows of the inverse matrix and outputs a ZF vector. This minimum index is also passed to matrix reducer 203 to create a new matrix that removes the column component corresponding to the index from the current matrix. The next iteration calculation proceeds with respect to the new reduction matrix under control of the first switch 208.

On the other hand, the first multiplier 204 multiplies the received symbol r received at each antenna by the ZF vector selected by the minimum index, and the result is demodulated by the demapper 205 into the first symbol. The demodulated symbols r 'are transferred to a deinterleaver or decoder. The second multiplier 204 multiplies the column corresponding to the minimum index among the symbols obtained from the demapper 205 and the channel information vector H, and regenerates and outputs the symbols corresponding to the minimum component among the symbols received at each antenna. do. The subtractor 207 subtracts a symbol corresponding to the minimum component among the received symbols from the received symbol, and generates and outputs new received symbols from which the minimum component has been removed. The next iterative calculation is performed on new received symbols with the minimum component removed under the control of the second switch 209. This process is repeated until the last symbol is demodulated.

The pseudo inverse calculator 200 calculates a pseudo inverse H ⁺ for the channel information vector, which can be expressed by Equation (9). In Equation 9, H ^H means a hermitian of H. In Equation 9, even if H is not a square matrix, H ^H * H forms a square matrix. Therefore, the pseudo inverse matrix can be obtained by obtaining the inverse of the square matrix and multiplying it by the hermitian of the original matrix. It can be seen that.

[Equation 9]

In the V-BLAST algorithm, a pseudo inverse matrix calculator 200 for obtaining a pseudo inverse and a NORM and a minimum value determiner 201 for finding a minimum row in the pseudo inverse occupy most of the hardware. Each element of the channel matrix is a complex value, and accordingly, a large amount of hardware is required to calculate a pseudo inverse by calculating these plurality of matrices in a general manner. For example, in the case of obtaining a pseudo inverse of a matrix of 4x4, 96 complex multipliers and a large number of complex adders are required for simple inverse calculation, and 32 complexes for multiplication of two cases of matrix included in the pseudo inverse calculation Multipliers and multiple complex adders are required. Thus, a total of 128 complex multipliers and a plurality of complex adders are needed. Performing this calculation with a real operator requires a total of 512 multipliers and a large amount of adders for each real and imaginary number. Therefore, it is necessary to reduce the burden on hardware and further develop an efficient structure for pseudo inverse calculation and NORM and minimum value determination.

Accordingly, the present invention has been made to solve the above problems, and the technical problem to be achieved by the present invention is a simplified complex multiplier for reducing the amount of calculation and V-BLAST of a multi-input multiple output mobile communication receiver implemented using the same An apparatus and a method thereof are provided.

The V-BLAST device of the mobile communication receiver according to the present invention for achieving the above technical problem, receives a channel information vector, by using a pseudo inverse matrix calculation using the Jacobian value present in the calculation of the pseudo inverse of the channel information vector A pseudo inverse matrix calculator for calculating and outputting an output cofactor and a determinant; A NORM and minimum value determiner for calculating a NORM using Jacobian value calculation in each row of the output cofactor, and extracting and outputting an index indicating a row having a minimum value among row-specific NORM values; A ZF vector selector for selecting and outputting a ZF vector, which is a row vector corresponding to the index, from the output cofactor; A matrix reducer for generating a reduction matrix from which the column vector corresponding to the index is removed from the channel information vector and re-input as the channel information vector; And a decision statistic calculator for multiplying the received symbol and the ZF vector by using a Jacobian value calculation and dividing the first multiplication result by the determinant to output the result. The V-BLAST device of the mobile communication receiver may further include a demapper for demapping and outputting the divided result. The V-BLAST device of the mobile communication receiver regenerates the minimum component symbol by second multiplying the demapper output by the column vector corresponding to the index in the channel information vector, and regenerating the minimum component symbol in the received symbol. The received symbol from which the minimum component generated by subtracting the symbol is removed is re-input as the received symbol.

According to an aspect of the present invention, a serial Jacobian multiplier receives two elements and two signs, classifies and outputs the maximum and minimum values of the two elements, and outputs the codes of the maximum and minimum values, respectively. Output comparator; XOR logic for performing an exclusive AND on the two numbers of codes to generate a mux control signal corresponding to each of the same and different cases; A subtractor which subtracts the minimum value from the maximum value and outputs the subtracted value; A negative Jacobian table unit generating and outputting a negative Jacobian value corresponding to the subtraction result; A positive Jacobian table unit generating and outputting a positive Jacobian value corresponding to the subtraction result; A mux for selectively outputting the negative Jacobian value or the positive Jacobian value in response to the mux control signal; And a summer for summing and outputting the MUX output to the maximum value.

According to another aspect of the present invention, a parallel Jacobian multiplier receives two elements and two signs, outputs a maximum value of two elements classified into integers and decimals, and outputs a minimum value of two elements. And a comparator which classifies and outputs a decimal number, and outputs a sign of each of the maximum value and the minimum value. An exponential power of 2 for calculating and outputting an exponential power of 2 of the maximum value integer; 2 ^{− (CMi-Cmi)} × 2 ^Cmf (where C _Mi is an integer of the maximum value, Cmi is an integer of the minimum value, Cmf is a decimal of the minimum value), and 2 for the first calculation result A binary exponential calculator for calculating the complement of the second output unit, and outputting the first calculation result if the signs of the maximum value and the minimum value are the same, and outputting the two's complement value if the signs of the maximum value and the minimum value are different; A first adder for first summing and outputting the exponential power output of 2 and the binary power calculator; A log table unit for calculating and outputting a binary log value corresponding to the first sum result; And a second adder configured to secondly add the maximum value integer and the binary log value to output the second sum value.

According to another aspect of the present invention, there is provided a V-BLAST driving method of a mobile communication receiver, which receives a channel information vector and uses calculation of a Jacobian value present when calculating a pseudo inverse of the channel information vector. Calculating and outputting an output cofactor and a determinant constituting a pseudo inverse; Calculating NORM using Jacobian value calculation in each row of the output cofactor, and extracting and outputting an index indicating a row having a minimum value among row-specific NORM values; Selecting and outputting a ZF vector which is a row vector corresponding to the index from the output cofactor; Generating a reduction matrix from which the column vector corresponding to the index is removed from the channel information vector and re-input as the channel information vector; And multiplying the received symbol by the ZF vector using a Jacobian value calculation, and dividing the first multiplication result by the determinant to output the result. The V-BLAST method of the mobile communication receiver may further include demapping and outputting the divided result. The V-BLAST method of the mobile communication receiver regenerates the minimum component symbol by second multiplying the demapping result by the column vector corresponding to the index in the channel information vector, and regenerating the minimum component symbol in the received symbol. The received symbol from which the minimum component generated by subtracting the symbol is removed is re-input as the received symbol.

In accordance with another aspect of the present invention, a serial Jacobian multiplication method receives two elements and two signs, classifies and outputs a maximum value and a minimum value of two elements, respectively. Outputting a sign; Performing an exclusive AND on the two numbers of codes to generate a control signal corresponding to each of the same and different cases; Subtracting and outputting the minimum value from the maximum value; Generating and outputting a negative Jacobian value corresponding to the subtraction result; Generating and outputting a positive Jacobian value corresponding to the subtraction result; Selectively outputting the negative Jacobian value or the positive Jacobian value in response to the control signal; And summing and outputting the selectively output value to the maximum value.

According to another aspect of the present invention, there is provided a parallel Jacobian multiplication method, which receives two elements and two signs, classifies the maximum value of two elements into integers and decimals, and outputs the minimum value of two elements. Dividing the integer into integers and decimals, and outputting a sign of each of the maximum value and the minimum value; Calculating and outputting an exponential power of 2 of the maximum integer; 2 ^{− (CMi-Cmi)} × 2 ^Cmf (where C _Mi is an integer of the maximum value, Cmi is an integer of the minimum value, Cmf is a decimal of the minimum value), and 2 for the first calculation result Calculating a complement of the second output unit and outputting the first calculation result if the signs of the maximum value and the minimum value are the same and outputting the complementary value of 2 if the signs of the maximum value and the minimum value are different; First summating and outputting either the first calculated result or the complementary value of 2 to an exponential power of two of the maximum integer; Calculating and outputting a binary log value corresponding to the first sum result; And summing and outputting the maximum value integer and the binary log value to a second sum.

In order to fully understand the present invention, the operational advantages of the present invention, and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings which illustrate preferred embodiments of the present invention and the contents described in the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals in the drawings denote like elements.

In the conventional V-BLAST algorithm, since the cofactors are transferred in a determinant in a part of obtaining an inverse matrix, a large number of dividers are required, resulting in waste of hardware. Therefore, in the present invention, a cofactor pseudo-inverse matrix is calculated without obtaining a complete inverse matrix, and the result of the inverse matrix is separated into a determinant and cofactors, and the values are transferred to a subsequent stage.

First, the pseudo inverse of the conventional V-BLAST algorithm was obtained by using the equation as shown in [Equation 9]. In Equation 9, even if H is not a square matrix, H ^H * H forms a square matrix. Therefore, the pseudo inverse matrix can be obtained by obtaining the inverse of the square matrix and multiplying it by the hermition of the original matrix. have. Here, if the result of the inverse of the square matrix (H ^H * H) ^-1 is separated into the determinant Δ and cofactors A, it can be expressed as shown in [Equation 10]. At this time, Equations 11 to 13 are satisfied.

[Equation 10]

[Equation 11]

[Equation 12]

[Equation 13]

In this result, since the determinant Δ is a common factor for each row, there is no need to perform an operation, and the NORM calculation need only be performed on a matrix consisting of the remaining cofactors. The row vector having the smallest value is a ZF (zero forcing) vector (w _ki ), and is represented by Equation (14). Since the determinant value can be calculated by adding it to the end of the calculation, in the real hardware implementation, the ZF vector (w _ki ) performs an operation with only rows extracted from the product of the cofactor and the hermition matrix of H. Then we implement them in the order of multiplying the inverse of the determinant at the end. Subsequently, a decision statistic (y _ki ) is obtained by multiplying the received symbol by the transpose matrix of the ZF vector (w _ki ) as shown in [Equation 15].

[Equation 14]

[Equation 15]

As in the conventional algorithm, w _ki ^T is the transpose matrix of the ZF vector (w _ki ), r _i is the received symbol, and the value obtained by multiplying them becomes the input of the rear slicer and detects it using the boundary condition. If the estimated symbol information as shown in [Equation 5] Can be obtained. As a result, symbol information estimated as in the conventional algorithm Multiplying the corresponding channel vector of the channel information vector (H) to remove it from the originally received symbol signal, the component of the symbol is lost and only the remaining components remain in the received symbol. The rest of the process is similar to the conventional algorithm described above.

Performing the above operation reduces the number of dividers needed to divide the cofactor values into a determinant when obtaining an inverse matrix, and in the case of 4x4, the number of dividers required is 16 to one. You will lose. In addition, in the case of obtaining a pseudo inverse of Moore-Penrose, overlapping patterns occur. Eliminating this can further reduce the amount of hardware required. In the calculation of [Equation 9], which represents Moore-Penrose's pseudo inverse, we first calculate the hermitity of H and multiply the result by the original H. Next, find the inverse of the product and multiply the result by the result of the error of the original matrix. Here, H ^H * H is always a square matrix, and a circuit for obtaining an inverse of the square matrix is required. When the inverse of the matrix H is directly obtained (direct inversion), a cofactor is developed for one element of each row as shown in Equation 16. However, all h is a complex number.

[Equation 16]

Here, the determinant is a value that results in the same result even when developed in the row or column direction, and the determinant in [Equation 16] is developed for the first row. After developing Equation 16 and removing the overlapping portion, the number of necessary operators requires 36 two-input complex multiplications and 18 two-input complex subtractions. The number of operators considered here is considered only for the square matrix, and since the process of multiplying the inverse matrix of H ^H * H and the hermit is a common part, the number of operators for this process is not included.

Since the entire V-BLAST algorithm is applied repeatedly, the operation is reduced, so that the first 4x4 matrix is reduced to 3x3 matrix and then to 2x2 matrix, and continues to shrink until it becomes a vector. Thus, when reduced to a 3x3 matrix, taking into account the portion that does not overlap 4x4, 12 complex multipliers and 6 complex subtractors are added, so the total amount of required operators is 48 two input complex multipliers, 24 2 An input complex subtractor is required. Since one complex multiplier consists of four multipliers, one subtractor, and two adders in the real operation area, the number of multipliers required for the actual implementation is quadrupled, requiring 192 multipliers. However, in Equation 16, each element is arranged symmetrically. A _1x and A _2x of the cofactor matrix perform cofactor decomposition on one row and A _3x and A _4x When cofactor decomposition is performed on four rows, many parts are overlapped. For example, in the case of 4x4, the repeated pattern disappears as shown in [Example 1] and [Example 2] below. In [Example 1] and [Example 2], the underlined parts are overlapped with the upper part.

[Example 1]

[Example 2]

In the case of cofactor decomposition for 1 and 4 rows in this way, the number of 2-input complex multipliers required is 24, and 12 2-input complex subtractors are required. In addition, considering the case of 3x3, the overlapping parts are different, but the same number of operators are required as in the above case, and as shown in Table 1, the total number of operators is 36 two-input multipliers and 18 two-input complex subtractors. Will be needed. In this case, the number of multipliers actually required is 144, which can reduce 52 multipliers compared to deploying only one row, which can reduce the number of multipliers by about 26%. In addition, the number of six complex subtractors can be reduced, reducing the overall amount of hardware required. However, since a large number of complex multipliers and adders / subtractors are still required, a large amount of hardware consumption is expected if the hardware is implemented as it is. Therefore, if the calculation is performed by moving to the log domain without performing calculation in the real domain, the multiplication and division of the real domain are expressed as addition and subtraction, and the real and Subtraction is implemented with Jacobian operations, which further reduces the amount of hardware required for the implementation.

TABLE 1

division If you deployed to row 1 If you deployed to rows 1 and 4 Difference 2-input complex multiplier 48 36 12 (25%) 2-input complex subtractor 24 18 6 (25%)

First, the calculation method in the log area is described. If A is the binary log of the value of positive a, then A = log ₂ a or a = 2 ^A holds. In the real domain, in order to emphasize the real domain, an arbitrary number a will be denoted as R (a). If you define a log domain as a domain that handles the value obtained by taking a log of the real domain value, log ₂ R (a) = R (log ₂ a). Since log ₂ a is A, we define A as L (A) to emphasize the log area. In general, the value of a is a fractional value. Therefore, the value of A is negative if a has only a fractional part.

Let's look at the negative log range notation. In general, taking a log of negative numbers is not mathematically defined. Therefore, in order to extend the above expression method to have a negative number, if a value is divided into a sign and a size, the notation defined above may be extended to include a sign. In other words, the notation of a negative number in the real area is the same as R (-, a) when the sign and the positive value a at that time. In addition, a change in the expression of the negative area in the same way as positive, the log area, log ₂ R holds a _{- - (, log 2 a)} (, a) = L. Here, log ₂ a is A, so if the log area is highlighted, negative A is defined as L (-, A). Therefore, the relationship shown in [Equation 17] holds in each of the following areas. That is, the sign in the log area is the same as the sign in the real area, and the size in the log area is equal to the log taken at the absolute value of the size of the real area. Here, the letters R and L represent real and log areas each having a sign and a size. For example, if a is 4, it can be written as R (-, 4) by the method defined above. A becomes 2 and the sign at that time becomes negative and is represented as L (-, 2) by the method defined above.

[Equation 17]

If the notation defined in this way is expanded to a general expression including negative and positive numbers, Equation 18 is used. As can be seen in [Equation 18], the value of the log area can be obtained by taking a binary logarithm of the value of the real area. Can be. The sign of the real area is the same as the sign of the log area. Where A is a real number with both negative and positive values, and a is always a positive real number.

Equation 18

Based on this notation, let's look at addition and subtraction in the logarithmic domain . Looking at the sum of the two numbers, first, the result of adding any two numbers R (±, a) and R (±, b) in the real area is classified into four cases as shown in [Equation 19]. In the case of subtraction, it is the same as adding after changing the sign of the number b afterwards.

[Equation 19]

Taking the logarithm of the two numbers summed as above, we can write: Here, assume that a ≧ b ≧ 0. As shown in [Equation 20], the sum of elements a and b in the real area is represented by Jacobian of elements A and B in the log area. If the inverse log-in exponential multiplier is taken for C, the final result in [Equation 20], the same result as the calculation of the real area is obtained as shown in [Equation 21].

[Equation 20]

[Equation 21]

 Therefore, as above, the binary log is taken to the real area value and converted to the log area, and the result is obtained by taking the exponential power of inverse binary log, that is, the power of 2. You get the same results as you did. The sum in the real area becomes more complicated when converted to the log area, but the multiplication in the real area, which will be described later, is simply converted to the sum when the log area is changed, thereby reducing the overall number of hardware. For example, the sum of two numbers 4 and -0.25 in the real area is the same as in [Example 3]. In [Example 3], if the log area calculation is performed and then converted to the real area again, a natural result is obtained as shown in [Example 4]. The calculation of the logarithm and the calculation of the exponential power are handled using a precalculated table.

Example 3

Example 4

For addition and subtraction in the logarithmic domain, the general expression is given by Equation 22. When the value of Equation 22 is divided into a sign and a size and converted into a simplified Jacobian, Equation 23 is obtained. Here, the sign S _c takes the sign of the larger value of a and b, and the size C extracts the larger value out of the logarithm of A and B as shown in [Equation 23], and the Jacobian for the difference between A and B. Get the value (Jacobian). If the two signs are the same, a commonly used Jacobian table (JT) is used. Otherwise, if there is a negative sign in the log, the negative Jacobian table (NJT :) is newly defined as negative Jacobian. Negative Jacobian Table).

[Equation 22]

[Equation 23]

Jacobian values for all cases that can have for two numbers are shown in Table 2. In Table 2, if the sign is the same, including the operator, it is a positive Jacobian value. If the sign is different, it is a negative Jacobian value.

TABLE 2

Operator S _a S _b Sign Jacobian value + + + + + + + - + @ a≥b /-@ a <b -/- + - + -@ a≥b / + @ a <b -/- + - - - + - + + + @ a≥b /-@ a <b -/- - + - + + - - + - + - - - -@ a≥b / + @ a <b

In general, the nature of positive Jacobian is well known, so the explanation is omitted, and the newly defined negative Jacobian is described here. As shown in [Equation 24], the calculation result of the exponent term of 2 always has a negative value and has a maximum of 0 when A and B are equal. Therefore, the range of binary logarithm of Equation 24 may range from 0 to negative infinity.

 [Equation 24]

For example, the calculation results for various cases of real and log areas are shown in Table 3. In Table 3, the sign follows the sign of a large value after considering the operator. The sign in Jacobian is positive if the signs are the same after considering the operator and negative if they are different. In particular, when two numbers to be calculated are the same, negative infinity occurs in the calculation of negative Jacobian as shown in [Table 4]. In Table 4, +/- b is the value after considering the sign of the operation. The sign in Jacobian is negative if the signs that consider the operators are equal to each other and positive if they are different. Negative infinity is set to the maximum negative value that a hardware implementation can have, and values below it are treated as saturation errors.

 TABLE 3

Real area calculation Calculation of log area a B +/- C sign A B maximum Jacobian value C c +4 +2 + +6 + +2 +1 +2 Pos, + 0.586 2.585 +6 +4 +2 - +2 + +2 +1 +2 Neg, -1 One +2 +4 -2 + +2 + +2 +1 +2 Neg, -1 One +2 +4 -2 - +6 + +2 +1 +2 Pos, + 0.586 2.585 +6 -4 +2 + -2 - +2 +1 +2 Neg, -1 One -2 -4 +2 - -6 - +2 +1 +2 Pos, + 0.586 2.585 -6 -4 -2 + -6 - +2 +1 +2 Pos, + 0.586 2.585 -6 -4 -2 - -2 - +2 +1 +2 Neg, -1 One -2 +0.25 +0.5 + +0.75 + -2 -One -One Pos, + 0.586 -0.414 +0.75 +0.25 +0.5 - -0.25 - -2 -One -One Neg, -1 -2 -0.25 +0.25 -0.5 + -0.25 - -2 -One -One Neg, -1 -2 -0.25 +0.25 -0.5 - +0.75 + -2 -One -One Pos, + 0.586 -0.414 +0.75 -0.25 +0.5 + +0.25 + -2 -One -One Neg, -1 -2 -0.25 -0.25 +0.5 - -0.75 - -2 -One -One Pos, + 0.586 -0.414 -0.75 -0.25 -0.5 + -0.75 - -2 -One -One Pos, + 0.586 -0.414 -0.75 -0.25 -0.5 - +0.25 + -2 -One -One Neg, -1 -2 +0.25

 TABLE 4

Real area calculation Calculation of log area A +/- b C sign A B maximum Jacobian Price C c +4 +4 +8 + +2 +2 +2 Pos, + 1 +3 +8 +4 -4 0 + +2 +2 +2 Neg, negative Indefinite 0 -4 +4 0 + +2 +2 +2 Neg, negative Indefinite 0 -4 -4 -8 - +2 +2 +2 Pos, + 1 +3 -8 +0.5 +0.5 +1 + -One -One -One Pos, + 1 0 +1 +0.5 -0.5 0 + -One -One -One Neg, negative Indefinite 0 -0.5 +0.5 0 + -One -One -One Neg, negative Indefinite 0 -0.5 -0.5 -One - -One -One -One Pos, + 1 0 -One

Next, let's look at the multiplication of two numbers in the log area . First, the result of multiplying any two numbers R (±, a) and R (±, b) in the real area may be represented by four cases as shown in Equation 25. Taking the logarithm of the two numbers multiplied as above, we can write: As shown in Equation 26, the multiplication of the elements a and b in the real area is represented by the sum of the elements A and B in the log area, and the sign is represented by the multiplication of the sign of a and the sign of b. The multiplication for this sign is easily calculated with the logical operator exclusive logical product (XOR).

[Equation 25]

[Equation 26]

In Equation 26, if the inverse logarithm to the C value, that is, the exponential power, the same result as in the calculation of the real area can be obtained as shown in Equation 27. In Equation 27, the sign is negative.

[Equation 27]

In this way, the operation is performed by converting the value of the real area into a binary log and converting the result to a log area. The result obtained by taking the exponential power of 2, the inverse binary log, is calculated in the real area. You get the same results as you did. The multiplication in this real area is simply converted to a sum when converted to a log area, thereby reducing the overall number of hardware. For example, the multiplication of the two numbers 4 and -0.25 in the real area is calculated as shown in [Example 5]. If the equation in [Example 5] is converted to the real area after performing the log area calculation, it is as in [Example 6]. Here, the logarithm calculation and the exponential power calculation use a precalculated table.

Example 5

Example 6

The general formula for multiplication and division in the logarithmic domain can be expressed as L (S _c , C) = L (S _a S _b , A ± B). That is, the multiplication is replaced by a sum, the division is replaced by a subtraction, and the sign is the product of the sign of two real values. As described above, performing the operation in the log area and performing the operation in the real area can obtain the same operation result, but designing hardware using the operation of the log area can reduce the size and the power consumption thereof. This effect is more pronounced as the operation becomes more complex and the allocation of hardware bits increases.

Hereinafter, according to the newly defined new V-BLAST algorithm as described above, the V-BLAST device is implemented by applying the sum, multiplication, and Jacobian calculation methods in real or log domains to complex multiplication and complex matrix multiplication. Let's look at the process. However, the addition and subtraction of complex numbers or complex matrices is performed by separating the real part and the imaginary part, but the JT (Jacobian Table) and the NJT (Negative) are performed in the same way as the above summation and subtraction. Implemented using Jacobian Table).

First, the multiplication of a complex number consists of a multiplication and a sum, as shown in Equation 28, in the real area. Where S _ar , S _br , and S _cr are signs and a _r , a _r , and a _r are each the magnitude of the real part of the complex numbers a, b, and c. And, S _ar S _br means the product of the sign bits S _ar and S _br . If the same sign is used, the result is +. This is easily implemented as an exclusive logical product (XOR) by mapping + to logical value 0 and-to logical value 1 when implemented in hardware.

[Equation 28]

If the operation process corresponding to the operation process of the real area as described above is performed in the log area, a logarithm to a complex number is generated and an unintended complex expression occurs. Therefore, the change to the complex logarithmic area is performed separately from the real part and the imaginary part. If you separate the real part and the imaginary part, and take the logarithm of each, you can see Equation 29 or Equation 30.

[Equation 29]

Equation 30

Calculation of Equation 30 is performed by dividing the sign and the magnitude. Change the magnitude of the above values to A _r + B _r = C _rr , A _i + B _i = C _ii , A _r + B _i = C _ri , and A _i + B _r = C _ir , and change the sign to s _ar s When _br = _crr s, substituted with -s _{ai bi} s = s _cii, s _{ar bi} = s s _cri, s _ai and _bi = s s _cii, expression is as shown in [equation 31]. _Cr where S is the sign selection of what the size of the L (S _crr, 2 ^Crr) and L (S _cii, 2 ^Cii) greater, and is also selected in the same S _ci. The size C _r is calculated by log2 | 2Crr ± 2Cii |, and the sign in the Jacobian operation is determined by the signs of S _crr and S _cii , which are + if they are the same and-if they are different. The calculation of C _i is performed in the same way.

Equation 31

3 is a block diagram illustrating a complex multiplier according to an embodiment of the present invention. Referring to FIG. 3, an example in which the complex multiplication process described above is implemented in hardware is illustrated. In FIG. 3, a complex multiplier according to an embodiment of the present invention includes a log converter 310, a code determiner and log adder 320, a comparison and inverse log converter 330, and a real adder 340. , And the final decision unit 340. The log converter 310 calculates a value of the log area by taking a binary log on each value of the real area as shown in Equation 32 with respect to the complex number input as shown in FIG. 3. Here, a log table (LT) 311, which is a table that logs a mistake, is used.

Equation 32

The sign determination and a log summation unit 320, the sign bit of each real area and then the sign bit in the log domain from the coded bit through the XOR (321) S _crr, S _cii, S is obtained _cri, and S _cir. In addition, the sign determination and log summing unit 320, through the summers 322, C _rr , C _ii , C _ri , C _ir, which are values in the log area (values corresponding to multiplication in the real area), are obtained. Obtain The comparison and inverse log converter 330 obtains an exponential power of the value using an inverse log table (ILT) 332 and converts the log area value back to the real area. The result S _cr of the final sign is determined as the sign of the larger of the values C _rr and C _ii input through the comparator (CMP) 331 and the selector (Mux: Multiplexor) 352. Similarly, the result S _ci of the final sign is determined as the sign of the greater of the values C _ri and C _ir input through the comparator (CMP) 332 and the selector (Mux: Multiplexor) 353. Further, the value C _r of the magnitude real area is obtained by subtracting min (C _rr , C _ii ) from max (C _rr , C _ii ), which is a two's complement (2's) provided in the real summing unit 340. It can be seen that it is easily obtained through the unit 341, the selector 342, and the summer 343 to find the complement. If the next stage is a real area, the calculation ends here, but if it is a log area, the final decision unit 340 uses the log tables (LT) 352 and 354 to change the value of the log area. The above process shows that only multiplication is performed in the log area, and the sum is performed in the real area. This structure is effective for complex complex multipliers but is not suitable for the V-BLAST algorithm, which requires many calculations in the log domain. Perform in the area.

In the log area improved using the Jacobian method defined above, the complex multiplication is transformed as follows. First, the method of calculating Jacobian in series is explained. The resulting equation for C _r mentioned above is shown in [Equation 33]. Equation (33) is divided into a sign and a size to change to simplified Jacobian as shown in [Equation 34]. Where S _cr is the sign of the final result and is the sign of the larger value among C _rr and C _ii . Then, the size is calculated by adding the Jacobian of the two values to the value of the larger value among C _rr and C _ii . At this time, the sign in the log becomes + when the sign of C _rr and C _ii is the same, indicating a general amount of Jacobian. On the other hand, if the sign of C _rr and C _ii is different, it becomes-and does not become Jacobian. In this case, we use the negative Jacobian described above, and in hardware implementation, it is a negative Jacobian table as the operation of Jacobian. Negative Jacobian Table (NJT) is used.

[Equation 33]

[Equation 34]

4 is a block diagram illustrating a serial Jacobian complex multiplier according to an embodiment of the present invention. FIG. 5 is a detailed block diagram of the serial Jacobian complex multiplier of FIG. 4. 4 and 5 illustrate a serial Jacobian complex multiplier using positive and negative Jacobian calculations in accordance with one embodiment of the present invention. The serial Jacobian complex multiplier according to an embodiment of the present invention includes a log converter 410 and a multiplier 420 that multiplies in a log Jacob region by the serial Jacobian. The multiplier 420 includes a sign determination and log adder 432 composed of a plurality of XOR logics 421 and summers 422, and a comparator 425, an XOR logic 426, and a subtractor 427. And a real part serial Jacobian calculation part 423 composed of a positive Jacobian table part 429, a negative Jacobian table part 428, a mux 430, and a summer 431. In addition, the multiplier 420 includes an imaginary part serial Jacobian calculator 424 having symmetrical elements 425 to 431 such as the real part serial Jacobian calculator 423.

The log converting unit 410 calculates the value of the log area by taking a binary log on each value of the real area, as shown in Equation 32, with respect to the complex number input as shown in FIGS. 4 and 5. This calculation is made in the log table section 411 having a table LT (Log Table) that logs on real numbers. Sign bits S _crr, S _{cii ,} S _cri, and S _cir are calculated in XOR logics 421, and C _rr , C _ii , C _ri , and C _ir are calculated in summers 422. The comparator 425 receives two elements and two signs, classifies and outputs the maximum value MAX and the minimum value MIN among the two elements, and outputs the signs of the maximum value MAX and the minimum value MIN, respectively. That is, the sign having the maximum value MAX is selected in the comparator 425, and the sign S _cr of the final value is output. The subtractor 427 obtains a difference between the maximum value MAX and the minimum value MIN of the input value, and thus, each of the positive Jacobian table portion 429 and the negative Jacobian table portion 428 For the difference value, a positive Jacobian value is obtained using JT (Jacobian Table), and a negative Jacobian value is obtained using NJT (Negative Jacobian Table). In the real part serial Jacobian calculator 423, the maximum value MAX and the minimum value MIN are the larger and smaller values of C _rr and C _ii , and the maximum value is the imaginary part serial Jacobian calculator 424. The value MAX and the minimum value MIN are the larger and smaller of C _ri , and C _ir .

XOR logic 426 performs an exclusive AND on the two numbers of codes to generate a mux control signal corresponding to each of the same and different cases. The mux 430 selectively outputs the negative Jacobian value JT or the positive Jacobian value NJT in response to the mux control signal. That is, when two input signals C _rr and C _ii have the same sign, the mux 430 under the control of the XOR logic 426 selects a JT value among these values JT and NJT and selects an NJT value if different. . The summer 431 adds a value MAX selected from the mux 430 to obtain a final C _r . The imaginary serial Jacobian calculator 424 calculates S _Ci and C _i in the same manner. If there are no more calculations in the log area, the result is obtained using the inverted log table (ILT) and the final real value is obtained. If the log area operation is performed continuously, the result is continuously changed without changing the value through the inverted log table (ILT). Perform the operation. 4 and 5 may be defined as one stage of Jacobian in the case of two elements constituting the Jacobian. Because of Jacobian's mathematical nature, there are several levels of Jacobian that can be defined when there are multiple components, which is explained in the multiplication of the next complex matrix.

Next, we explain how to calculate Jacobian in parallel. To construct a parallel Jacobian, the equation is converted as shown in Equation 35. If the equation is converted as shown in [Equation 35] and each value is separated into the integer part and the decimal part, the equation for calculating Jacobian is as shown in [Equation 36]. This is true even when the number of terms of Jacobian elements is increased. Where C and C _{mi Mi} each of C _M and C mean the integer _m, and C and C _{Mf mf} of the respective means the fractional portion of the C _M and C _m. Equations 35 and 36 can be developed in the same way for the imaginary part.

[Equation 35]

[Equation 36]

6 is a block diagram illustrating a parallel Jacobian complex multiplier according to an embodiment of the present invention. FIG. 7 is a detailed block diagram of the parallel Jacobian complex multiplier of FIG. FIG. 8 is a detailed block diagram of the binary exponential calculator 627 of FIG. 7. 6 and 7 illustrate parallel Jacobian complex multipliers using positive and negative Jacobian calculations in accordance with one embodiment of the present invention. The parallel Jacobian complex multiplier according to an embodiment of the present invention includes a log converter 610 and a multiplier 620 that multiplies in a parallel Jacobian manner in the log region. The multiplier 620 is a code determination and log adder 631 consisting of a plurality of XOR logics 621 and summers 622, and a comparator 625, power of two calculators 626, binary A real part parallel Jacobian calculation unit 623 composed of an exponential power calculator 627, a first summer 628, a log table unit 629, and a second summer 630 is provided. In addition, the multiplier 620 includes an imaginary part parallel Jacobian calculator 624 having symmetrical elements 625 to 630 such as the real part parallel Jacobian calculator 623.

As shown in FIG. 7, the calculation process of converting to a log area and adding the same is the same as the serial Jacobian calculation units 423 and 424 described above. The result of the sum of the sign determination and log summing unit 631 is input to the comparator 625. The comparator 625 receives two elements and two signs, classifies and outputs the maximum value of the two elements into integers and decimals, and classifies and outputs the minimum value of the two elements into integers and decimals, respectively. Output the sign. That is, the comparator 625 determines a large value C _M and a small value C _m without considering the sign by using two elements and two signs that are the summation results, and determines the signs S _M and S _m , respectively. S _M is output as S _Cr . Then perform the parallel Jacobian calculation described above. Exponential power calculator 626 of 2 calculates the exponential power 2 ^CMf of the fractional part of the large number C _M.

As shown in FIG. 7, the binary exponential calculator 627 calculates 2 ^{− (CMi-Cmi)} × 2 ^Cmf (where C _Mi is an integer of the maximum value, Cmi is an integer of the minimum value, and Cmf is a decimal of the minimum value). Calculate a two's complement to the first calculation result, and output the first calculation result if the signs of the maximum value and the minimum value are the same; and if the signs of the maximum value and the minimum value are different, the two Outputs the complement's value. That is, in the binary exponential calculator 627, the exponential power calculator 632 of 2 ^obtains the exponential power 2 ^Cmf of the fractional part of the small number C _m , and the subtractor 633 calculates (C _Mi -C _mi ). Accordingly, the shift register 634 shifts 2 ^Cmf to the right by the number of C _Mi -C _mi bits to generate 2- ^(CMi-Cmi) x 2 ^Cmf . The mux 636 under the control of the XOR logic 631, which is considered to be positive Jacobian if the signs S _M and S _m are equal to each other and negative Jacobian, is 2- ^(CMi-Cmi) x 2 ^Cmf or the like. It outputs a 2's complement value. The two's complement 635 calculates a two's complement value for 2 ^{− (CMi-Cmi)} × 2 ^Cmf for the case of negative Jacobian.

The output results of the exponential power calculator 626 and the binary power multiplier 627 of 2 are first summed by the first summer 628, so that the log table portion 629 is a binary logarithm to the first sum result. Take The second summer 630 adds the binary log result and C _Mi , which is an integer part of C _M , and outputs the final result C _r . The imaginary part parallel Jacobian calculator 624 outputs S _Ci and C _i in the same manner as the real part parallel Jacobian calculator 623.

Next, the multiplication of the complex matrix will be described. First, a method of calculating Jacobian in series with respect to a complex matrix will be described. In general, the multiplication of a matrix of complex numbers consists of a multiplication of each complex element and the addition thereof. Therefore, the method for implementing it consists of a complex summation process in the log region described above and a Jacobian on the result. That is, it can be configured as a serial structure using a summer and a multi-stage Jacobian calculator in the log area. Convert each element of the matrix to a logarithmic domain and add it (corresponding to a real area) to obtain a real and imaginary part, and a Jacobian (login or subtract in a real area) calculator. Get results through

Equation 37 shows the multiplication process of a 1x2 complex matrix and a 2x1 complex matrix. This method is effective for implementing simple matrix computations because Jacobian values appear in series. Take the binary log in Equation 37, and the result is shown in Equation 37.

[Equation 37]

[Equation 38]

If the variable used is expressed as a variable in the log area, it is as shown in [Equation 39], and is obtained from the Jacobian calculation of the first stage. The final result C expressed as a component of each multiplication result may be expressed as shown in [Equation 40]. That is, the Jacobian may be obtained by separating the real component and the imaginary component of each multiplier. This is obtained from the Jacobian calculation of the second stage.

[Equation 39]

[Equation 40]

9 is a block diagram illustrating a serial Jacobian complex matrix multiplier according to an embodiment of the present invention. That is, referring to FIG. 9, the serial Jacobian complex matrix multiplier 900 according to an embodiment of the present invention may be configured to obtain two values of the real part and the imaginary part, respectively, from logarithmic domain values for respective components of different elements. By taking Jacobian in step series, we can get the result of complex matrix multiplication of the log region. The complex matrix multiplier 900 includes a first multiplier 910, a second multiplier 920, and a second step of calculating a first step serial Jacobian value for each of the different elements of the matrix in a logarithmic region. And a third multiplier 950 for calculating the serial Jacobian value. The first multiplier 910 includes a sign determination and log adder 915 consisting of a plurality of XOR logics 911 and summers 912, a real part serial Jacobian calculator 913, and an imaginary part. A serial Jacobian calculator 914 is provided. Similarly, the second multiplier 920 includes a sign determination and log adder 925 consisting of a plurality of XOR logics 921 and summers 922, a real part serial Jacobian calculator 923, and An imaginary serial Jacobian calculation unit 924 is provided. The structures of the first multiplier 910 and the second multiplier 920 are the same as those of FIG. 5, and the operations thereof are the same as those of FIG. 5. However, the input signal is a signal corresponding to a complex number. The third multiplier 950 includes a real part serial Jacobian calculator 930 and an imaginary part serial Jacobian calculator 940 to receive a first step serial Jacobian value and to receive a second step serial Jacobian. Calculate and print the value.

Next, a method of calculating Jacobian in parallel with respect to a complex matrix will be described. The smallest unit of complex matrix multiplication is the process of performing a complex multiplication and adding it. Here, in performing complex matrix multiplication, a method of configuring hardware by completing all calculations in a real area and converting it to a log area will be described. Unlike the complex matrix multiplication serial operation described above, the method may be configured in a parallel structure that performs summation in a log domain and takes one Jacobian calculation on the result.

The multiplication of two complex matrices can be expressed as Equation 41. In Equation 41, a binary log is taken for each of the real part and the imaginary part, and the result is converted into a log area. The result is shown in Equation 42. Here, when adding the relevant components of A and B is represented by C, it is the same as [Equation 43]. As shown in [Equation 43], it can be seen that the result of the matrix multiplication in the log region consists of the summation of each matrix component in the log region and a one-step Jacobian calculation. However, the calculation result C value of the log area consists of the real part C _r and the imaginary part C _i . After using this method, the final value can be obtained by taking an exponential power (or inverse log) on each of the real part and the imaginary part.

[Equation 41]

[Equation 42]

[Equation 43]

Equation 44

In order to construct a parallel Jacobian, Equation 43 is converted to Equation 45. If each value is separated into the integer and decimal parts in [Equation 45], the formula for calculating Jacobian becomes as shown in [Equation 46], and as explained above, it is found that the number of elements of Jacobian is satisfied even when the number of elements in Jacobian is increased to four. have. Here, C _Mi and C _m1i each mean an integer part of C _M and C _m1 , and C _Mf and C _m1f each mean a _minor part of C _M and C _m1 . The development of Equation 46 may be identically developed for the imaginary part.

[Equation 45]

[Equation 46]

10 is a block diagram illustrating a parallel Jacobian complex matrix multiplier according to an embodiment of the present invention. FIG. 11 is a detailed block diagram of the parallel Jacobian complex matrix multiplier of FIG. 10. That is, referring to FIGS. 10 and 11, the parallel Jacobian complex matrix multiplier according to an embodiment of the present invention obtains log region values for each component of different elements through the log transform unit 1100, and the same. By taking Jacobian in parallel with respect to the real part and the imaginary part, a complex matrix multiplication result of the log region can be obtained. A complex matrix multiplier having a parallel Jacobian calculator according to an embodiment of the present invention includes a log converter 1100 and a multiplier 1200 that multiplies in a parallel Jacobian manner in a log region. The multiplier 1200 includes a sign determination and log adder 1270 composed of a plurality of XOR logics 1210 and summers 1220, a comparator 1231, an exponential power calculator 1232 of the second, 1 binary exponential calculator 1233, second binary exponential calculator 1234, third binary exponential calculator 1234, first summer 1236, log table portion 1237, and second summer ( And a real part parallel Jacobian calculator 1230 composed of 1238. In addition, the multiplier 1200 includes an imaginary part parallel Jacobian calculator 1260 having symmetrical elements 1231 to 1238, such as the real part parallel Jacobian calculator 1230. The calculation of the sign and magnitude, the operation of the exponential power calculator 1232 of 2, and the structure and operation of the binary power calculators 1233-1235 are all the same as in the parallel Jacobian calculation of FIG. However, the input signal is a signal corresponding to a complex number. Since the Jacobian structure used here has a parallel structure, the number of stages increases, so the length of the critical path is shorter than that of the serial structure, which facilitates high-speed hardware design.

12 is a block diagram illustrating a multiplier 1290 of a 1x4 complex matrix and a 4x1 complex matrix. Referring to FIG. 12, the hardware is configured to double the multiplication structure of the 1x2 matrix and the 2x1 matrix in FIG. The multiplication of the 4x4 matrix is performed 16 times by the hardware of FIG. 12 since the multiplication of the 1x4 matrix and the 4x1 matrix is performed 16 times. The 1x4 matrix and the 4x1 matrix multiplication process are similar to the multiplication process of the 1x2 matrix and the 2x1 matrix described above, and the formula is shown in [Equation 47].

[Equation 47]

Hereinafter, a method of compensating for distortion of a received symbol by applying a complex matrix multiplier having a parallel Jacobian calculator as described above to a V-BLAST device of a mobile communication receiver according to an embodiment of the present invention.

13 is a block diagram illustrating a V-BLAST device of a mobile communication receiver according to an embodiment of the present invention. Referring to FIG. 13, a V-BLAST device of a mobile communication receiver according to an embodiment of the present invention may include a first switch 1304, a pseudo inverse matrix calculator 1300, a NORM and a minimum value determiner 1301, and a ZF (zero). forcing) vector selector 1302, matrix reducer 1303, decision statistic calculator 1311, demapper 1307, second switch 1310, second multiplier 1308, subtractor 1309. Equipped. Referring to FIG. 13, the channel information vector H is input to the proposed pseudo inverse calculator 1300 to obtain a pseudo inverse, where a determinant Δ and a cofactor (not a complete inverse matrix) are obtained. A) Get the value separately. Here, the Jacobian value calculation includes a positive Jacobian value calculation and a negative Jacobian value calculation, as described above, wherein the negative Jacobian value calculation is performed by subtracting two real numbers a, b, [ A code and a size defined as in Equation 24 are used.

The pseudo inverse calculator 1300 receives the channel information vector H, and output cofactor and determinant constituting the pseudo inverse by using the Jacobian value calculation present when calculating the pseudo inverse of the channel information vector H. Calculate and output This pseudo inverse calculator 1300 is described in more detail below.

The NORM and minimum value determiner 1301 calculates NORM by using Jacobian value calculation in each row of the output cofactor, and extracts and outputs an index indicating a row having a minimum value among the NORM values for each row.

The ZF vector selector 1302 selects and outputs a ZF vector, which is a row vector corresponding to the index, from the output cofactor. The matrix reducer 1303 generates a reduction matrix from which the column vector corresponding to the index is removed from the channel information vector H, and re-inputs it as the channel information vector H. That is, the next iterative calculation proceeds with the newly created reduction matrix, which is controlled by the first switch 1304 so that the reduction matrix is input to the pseudo inverse calculator 1300.

The decision statistic calculator 1311 performs a first multiplication by using a Jacobian value calculation to multiply the received symbol and the ZF vector by a first multiplier 1305 and divides the first multiplication result through a divider 1306. Divide by determinant and print the result. The demapper 1307 demaps the divided result into a format such as quadrature phase shift keying (QPSK) and outputs the result. Here, the demapped result is transmitted to a deinterleaver or a channel decoder.

The second multiplier 1308 multiplies the demapper 1307 output by the column vector corresponding to the index in the channel information vector H to regenerate the minimum component symbol. Accordingly, the subtractor 1309 subtracts the regenerated minimum component symbol from the received symbol to generate and output a received symbol from which the minimum component has been removed. At this time, the received symbol from which the minimum component is removed is re-entered as the received symbol to the second switch 1310, and the second switch 1310 determines newly generated and re-entered received symbols for the next iteration calculation. 1311). This process is repeated until the last symbol is demodulated.

FIG. 14 is a detailed block diagram of the pseudo inverse calculator of FIG. Referring to FIG. 14, the pseudo inverse matrix calculator includes a complex matrix hermetic converter 1401, a first complex matrix multiplier 1402, an inverse matrix calculator 1403, and a second complex matrix multiplier 1415.

The complex matrix hermission converter 1401 classifies the channel information vector H into a real part and an imaginary part, respectively, and calculates and outputs a hermition vector of a log area. Here, it is assumed that the channel information vector H is a four-dimensional square matrix. As is well known, taking a hermit is equivalent to the operation in the original real area, and thus corresponds to inverting the sign of the imaginary part and transposing the result.

The first complex matrix multiplier 1402 multiplies the hermition vector (H ^H ) by the channel information vector (H) by using Jacobian value calculation to output an intermediate result (H ^H * H). Here, the product in the real area of the mission vector (H ^H ) and the channel information vector (H) is easily implemented by summing and Jacobian operations in the log area, as described in the multiplication of the complex matrix described above. . The intermediate result becomes a square matrix and is passed to an inverse matrix calculator 1403 for the square matrix.

The inverse matrix calculator 1403 generates and outputs a first cofactor and the determinant from the intermediate result using a Jacobian value calculation. In other words, the inverse calculator 1403 includes a multiplier 1413 and a selector 1412. The multiplier 1413 calculates N-1 cofactors and determinants from the N-dimensional square matrix to the 2-dimensional square matrix from the intermediate result which is the N-dimensional square matrix. As described above, it is assumed as a four-dimensional square matrix. The multiplier receives two complex elements and divides two complex numbers converted into a log region into real and imaginary parts, respectively, and multiplies the sum results by a parallel Jacobian method. The multiplier may complex multiply the summation results in a serial Jacobian fashion. The selector 1412 selects one of the cofactors and the determinant according to an operation mode, and outputs the first cofactor and the determinant. The second complex matrix multiplier 1415 generates and outputs the output cofactor by multiplying the first cofactor by the hermition vector using a Jacobian value calculation. If the above result, that is, the output cofactor and the determinant needs to be changed back to the real area when outputting to the outside, it is converted to the real area value through an inverse log table.

Here, the multiplier for receiving the intermediate result, which is a four-dimensional square matrix, includes a first step multiplier 1404, a second step multiplier 1408, and a third step multiplier 1411. The first step multiplier 1404 calculates and outputs a 3 × 3 matrix cofactor (3 × 3CF) and a 2 × 2 matrix determinant (2 × 2DT) from the intermediate result. That is, in performing the multiplication of two complex numbers, the first step multiplier 1404 includes a 4x4 matrix constituting the complex number through each of the first multiplier 1405 and the second multiplier 1407. Multiplication is performed using the basic elements of each 3x3 matrix. Since the elements of the 2x2 matrix are included in the 4x4 matrix and the 3x3 matrix, the cofactor (2x2CF) of the 2x2 matrix is output without needing to be separately obtained. Since the basic operation structure of the first step multiplier 1404 includes a summer and a Jacobian operation, a complex number changed into a log region value is added, and a Jacobian operation is performed on the result. Here, the determinant (2x2DT) of the 2x2 matrix and the cofactor (3x3CF) of the 3x3 matrix can be obtained.

The second step multiplier 1408 calculates and outputs a 4 × 4 matrix cofactor (4 × 4CF) and a 3 × 3 matrix determinant (3 × 3DT) from the first step multiplier output. That is, when the second step multiplier 1408 is considered in the real area, the second multiplier 1408 may be configured to perform operations having a form in which three complex numbers are multiplied and added, respectively, through the first multiplier 1409 and the second multiplier 1410. The cofactor (4x4CF) of the 4x4 matrix and the determinant (3x3DT) of the 3x3 matrix can be obtained. Considered in the log space, this can be thought of as adding up all of the passed complex numbers and taking Jacobian operations on the result. Therefore, it is possible to implement using an operator having a form similar to the multiplications of the first step.

The third step multiplier 1411 calculates and outputs a determinant (4 × 4 DT) of a 4 × 4 matrix from the output of the first step multiplier. That is, the third step multiplier 1411 has a form in which four complex numbers are multiplied and all of the results are added when considered in the real area. do. As a result, a determinant of 4x4 matrix (4x4DT) can be obtained.

FIG. 15 is a detailed block diagram of the NORM and minimum value determiner 1301 and zero forcing vector selector 1302 of FIG. 13. Referring to FIG. 15, when the output cofactors A: A ₁ to A ₄ constituting the pseudo inverse are obtained in the pseudo inverse calculator, the NORM and the minimum value determiner 1301 determine the matrix A: A ₁ to A _4. ), The index of the row having the smallest NORM around the row is found, and accordingly, the ZF vector selector 1302 outputs the row vector corresponding to the index as the ZF vector. At this time, the NORM in the real area can be obtained by adding up the squared elements of each row. However, NORM in the log region can be implemented by doubling each element (A: A ₁ to A ₄ ) and performing Jacobian on the result. By the way, doubling each element is equivalent to shifting one bit to the left, and this operation also applies to all elements equally and compares the relative sizes of the NORMs in each row. none. Accordingly, in order to find the ZF vector in the log region, after performing Jacobian operations for each row of the matrixes A: A ₁ to A ₄ transmitted through each of the Jacobian operators 1322 to 1325, the minimum value extractors are performed. Finding the row having the minimum value in the Jacobian operation through 1133 to 1334, and outputting the elements through the multiplexer zero forcing (ZF) vector selector 1302.

FIG. 16 is a detailed block diagram of the decision statistic calculator 1311 of FIG. Referring to FIG. 16, when calculating a decision statistic using a received symbol and a ZF vector {w _ki : ZF ₁ to ZF ₄ }, the received symbols r: r ₁ to r ₄ ) and cofactor to multiply the elements of the ZF vector {w _ki : ZF ₁ ~ ZF ₄ }, add them, and divide the result by a determinant. Considering this in the log area, after converting the received symbols (r: r ₁ to r ₄ ) into values in the log area, and adding them together with elements of the ZF vector {w _ki : ZF ₁ ~ ZF ₄ } consisting of cofactors, By performing Jacobian operations and subtracting the determinant value from the result, decision statistics can be obtained. The result is converted to a real region value using an inverse log table 1321 and then transferred to the demapper 1604 to demodulate the distortion-compensated symbol r '.

As described above, the V-BLAST device of the mobile communication receiver according to an embodiment of the present invention includes three steps in which overlapping portions are removed to reduce V-BLAST algorithm operation on the received channel information vector (H). Calculate the cofactor of the pseudo inverse matrix using the log area summing operation of, obtain the minimum NORM value using only this cofactor, and obtain the row ZF vector (w _ki ) and the received symbol corresponding to the index of the minimum NORM. After multiplying by and finally dividing by the determinant (Δ), it is possible to reduce the amount of computation and hardware required to obtain the compensated received signal r '. In the present invention, in order to minimize the amount of computation required in the pseudo inverse operation on the received channel information vector (H), a negative Jacobian calculation is newly defined in addition to the general positive Jacobian. Rather than performing real area operation on the obtained channel information vector H, a value of a log area in which a binary log is taken by a simple adder and Jacobian calculator is calculated. As a result, the amount of computation and hardware required to obtain a pseudo inverse is reduced.

The functions used in the devices and methods disclosed herein can be embodied as computer readable codes on a computer readable recording medium. The computer-readable recording medium includes all kinds of recording devices in which data that can be read by a computer system is stored. Examples of computer-readable recording media include ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage, and the like, and may also be implemented in the form of a carrier wave (for example, transmission over the Internet). do. The computer readable recording medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion.

As described above, optimal embodiments have been disclosed in the drawings and the specification. Although specific terms have been used herein, they are used only for the purpose of describing the present invention and are not intended to limit the scope of the invention as defined in the claims or the claims. Therefore, those skilled in the art will understand that various modifications and equivalent other embodiments are possible from this. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

The V-BLAST device of the mobile communication receiver according to the present invention, in addition to the usual positive Jacobian, in a newly defined negative Jacobian calculation, does not perform a real domain operation, but a simple adder and ruler. Since the binary log is calculated by the Kobian calculator, the size of the hardware and the amount of computation required to obtain a pseudo inverse of the received channel information vector can be reduced.

1 is a block diagram illustrating a general MIMO mobile communication system.

2 is a block diagram showing a conventional V-BLAST device.

3 is a block diagram illustrating a complex multiplier according to an embodiment of the present invention.

4 is a block diagram illustrating a serial Jacobian complex multiplier according to an embodiment of the present invention.

FIG. 5 is a detailed block diagram of the serial Jacobian complex multiplier of FIG. 4.

6 is a block diagram illustrating a parallel Jacobian complex multiplier according to an embodiment of the present invention.

FIG. 7 is a detailed block diagram of the parallel Jacobian complex multiplier of FIG.

FIG. 8 is a detailed block diagram of the binary exponential calculator of FIG. 7.

9 is a block diagram illustrating a serial Jacobian complex matrix multiplier according to an embodiment of the present invention.

10 is a block diagram illustrating a parallel Jacobian complex matrix multiplier according to an embodiment of the present invention.

FIG. 11 is a detailed block diagram of the parallel Jacobian complex matrix multiplier of FIG. 10.

12 is a block diagram illustrating a multiplier of a 1x4 complex matrix and a 4x1 complex matrix.

13 is a block diagram illustrating a V-BLAST device of a mobile communication receiver according to an embodiment of the present invention.

FIG. 14 is a detailed block diagram of the pseudo inverse calculator of FIG.

FIG. 15 is a detailed block diagram of the NORM and minimum value determiner and zero forcing vector selector of FIG. 13.

FIG. 16 is a detailed block diagram of the decision statistic calculator of FIG.

<Description of Major Symbols in Drawing>

423: Serial Jacobian calculator

623: parallel Jacobian calculation

1300: Pseudo inverse calculator 1301: NORM and minimum value determiner

1302: ZF vector selector 1303: channel reducer

1307: Demapper 1311: Decision Statistics Calculator

Claims (24)

A pseudo inverse calculator for receiving a channel information vector and calculating and outputting an output cofactor and a determinant constituting a pseudo inverse using a Jacobian value calculation present when calculating a pseudo inverse of the channel information vector; A NORM and minimum value determiner for calculating a NORM using Jacobian value calculation in each row of the output cofactor, and extracting and outputting an index indicating a row having a minimum value among row-specific NORM values; A ZF vector selector for selecting and outputting a ZF vector, which is a row vector corresponding to the index, from the output cofactor; A matrix reducer for generating a reduction matrix from which the column vector corresponding to the index is removed from the channel information vector and re-input as the channel information vector; And And a decision statistic calculator for multiplying the received symbol and the ZF vector by using Jacobian value calculation and dividing the first multiplication result by the determinant to output the result. V-BLAST device. The V-BLAST device of the mobile communication receiver, And a demapper for demapping and outputting the divided result. The V-BLAST device of the mobile communication receiver, The second component is multiplied by the column vector corresponding to the index in the channel information vector to regenerate the minimum component symbol, and the minimum component generated by subtracting the regenerated minimum component symbol from the received symbol is removed. A V-BLAST device of a mobile communication receiver, characterized in that the received symbol is re-input as the received symbol. The method of claim 1, wherein the pseudo inverse calculator, A complex matrix hermission converter for classifying the channel information vector into a real part and an imaginary part, respectively, and calculating and outputting a hermit vector of a log area; A first complex matrix multiplier for multiplying the hermition vector with the channel information vector by using a Jacobian value calculation to output an intermediate result; An inverse matrix calculator for generating and outputting a first cofactor and the determinant from the intermediate result using a Jacobian value calculation; And And a second complex matrix multiplier configured to multiply the first cofactor by the hermition vector using a Jacobian value calculation to generate and output the output cofactor. The method of claim 4, wherein the inverse matrix calculator, A multiplier that calculates N-1 cofactors and determinants from the N-dimensional square matrix to the 2-dimensional square matrix from the intermediate result that is the N-dimensional square matrix; And And a selector for outputting the first cofactor and the determinant according to an operation mode among the cofactors and the determinant. The method of claim 5, wherein the multiplier, Receive the intermediate result as a four-dimensional square matrix, A first step multiplier for calculating and outputting a cofactor of a 3x3 matrix and a determinant of a 2x2 matrix from the intermediate result; A second step multiplier for calculating and outputting a cofactor of a 4x4 matrix and a determinant of a 3x3 matrix from the output of the first step multiplier; And And a third stage multiplier for calculating and outputting a determinant of a 4x4 matrix from the output of the first stage multiplier. The method of claim 5, wherein the multiplier, A V-BLAST device of a mobile communication receiver, characterized by receiving two complex elements and converting two complex numbers converted into a log region into real and imaginary parts, respectively, and multiplying the addition results by a parallel Jacobian method. . The method of claim 5, wherein the multiplier, V-BLAST device of a mobile communication receiver characterized by receiving two complex elements and converting two complex numbers converted into a log region into real and imaginary parts, respectively, and multiplying the sum result by serial Jacobian method. . The method of claim 1, wherein the Jacobian value calculation, A V-BLAST device in a mobile communication receiver, comprising calculating a positive Jacobian value and a negative Jacobian value. The method of claim 9, wherein the negative Jacobian value calculation, In the subtraction of two real numbers a and b (Where L () is the newly defined easylog value, S _c is the sign, C is the magnitude, a = 2 ^A , b = 2 ^B , and max () is the maximum of the elements in parentheses) V-BLAST device of a mobile communication receiver, characterized by using the code and the size defined by. A comparator that receives two elements and two signs, classifies and outputs the maximum and minimum values of the two elements, and outputs the signs of each of the maximum and minimum values; XOR logic for performing an exclusive AND on the two numbers of codes to generate a mux control signal corresponding to each of the same and different cases; A subtractor which subtracts the minimum value from the maximum value and outputs the subtracted value; A negative Jacobian table unit generating and outputting a negative Jacobian value corresponding to the subtraction result; A positive Jacobian table unit generating and outputting a positive Jacobian value corresponding to the subtraction result; A mux for selectively outputting the negative Jacobian value or the positive Jacobian value in response to the mux control signal; And And a summer for adding the mux output to the maximum value for outputting the sum. A comparator that receives two elements and two signs, classifies and outputs the maximum value of the two elements into integers and decimals, classifies and outputs the minimum value of the two elements into integers and decimals, and outputs the sign of each of the maximum and minimum values. ; A power of two calculator for calculating and outputting a power of two of the maximum integer; 2 ^{− (CMi-Cmi)} × 2 ^Cmf (where C _Mi is an integer of the maximum value, Cmi is an integer of the minimum value, Cmf is a decimal of the minimum value), and 2 for the first calculation result A binary exponential calculator for calculating the complement of the second output unit, and outputting the first calculation result if the signs of the maximum value and the minimum value are the same, and outputting the two's complement value if the signs of the maximum value and the minimum value are different; A first adder for first summing and outputting the exponential power output of 2 and the binary power calculator; A log table unit for calculating and outputting a binary log value corresponding to the first sum result; And a second summer for adding the maximum value integer and the binary log value to the second sum and outputting the second sum values. Receiving a channel information vector, calculating and outputting an output cofactor and a determinant constituting a pseudo inverse using a Jacobian value calculation present when calculating a pseudo inverse of the channel information vector; Calculating NORM using Jacobian value calculation in each row of the output cofactor, and extracting and outputting an index indicating a row having a minimum value among row-specific NORM values; Selecting and outputting a ZF vector which is a row vector corresponding to the index from the output cofactor; Generating a reduction matrix from which the column vector corresponding to the index is removed from the channel information vector and re-input as the channel information vector; And Multiplying the received symbol by the ZF vector using a Jacobian value calculation, and dividing the first multiplication result by the determinant and outputting the result; BLAST drive method. The method of claim 13, wherein the V-BLAST method of the mobile communication receiver, And demapping the divided result and outputting the divided result. The method of claim 14, wherein the V-BLAST method of the mobile communication receiver, The second component is multiplied by the column vector corresponding to the index in the channel information vector to regenerate a minimum component symbol, and the minimum component generated by subtracting the regenerated minimum component symbol from the received symbol is removed. And re-entering a received symbol as the received symbol. The method of claim 13, wherein the pseudo inverse calculation step comprises: Classifying the channel information vector into a real part and an imaginary part, respectively, and calculating and outputting a mission vector of a log area; Multiplying the mission vector by the channel information vector using a Jacobian value calculation to output an intermediate result; Generating and outputting a first cofactor and the determinant from the intermediate result using a Jacobian value calculation; And And generating and outputting the output cofactor by multiplying the first cofactor by the hermition vector using a Jacobian value calculation. The method of claim 16, wherein the first cofactor and the deterministic output step, Calculating N-1 cofactors and determinants from the N-dimensional square matrix to the 2-dimensional square matrix from the intermediate result which is the N-dimensional square matrix; And And selecting the cofactors and the determinant in accordance with an operation mode to output the first cofactor and the determinant. 18. The method of claim 17, wherein calculating the cofactors and determinants Receive the intermediate result as a four-dimensional square matrix, A first step of calculating and outputting a cofactor of a 3x3 matrix and a determinant of a 2x2 matrix from the intermediate result; A second step of calculating and outputting a cofactor of a 4x4 matrix and a determinant of a 3x3 matrix from the output of the first step; And And a third step of calculating and outputting a determinant of a 4x4 matrix from the output of the second step. 18. The method of claim 17, wherein calculating the cofactors and determinants V-BLAST driving of a mobile communication receiver, characterized by receiving two complex elements and converting two complex numbers converted into a log region into a real part and an imaginary part, respectively, and multiplying the sum result by a parallel Jacobian method. Way. 18. The method of claim 17, wherein calculating the cofactors and determinants V-BLAST driving of a mobile communication receiver, characterized by receiving two complex elements and converting two complex numbers converted into a log region into a real part and an imaginary part, respectively, and multiplying the sum result by a serial Jacobian method. Way. The method of claim 13, wherein the Jacobian value calculation, A method for driving a V-BLAST in a mobile communication receiver, comprising calculating a positive Jacobian value and a negative Jacobian value. The method of claim 21, wherein the negative Jacobian value calculation, In the subtraction of two real numbers a and b (Where L () is the newly defined easylog value, S _c is the sign, C is the magnitude, a = 2 ^A , b = 2 ^B , and max () is the maximum of the elements in parentheses) The V-BLAST driving method of the mobile communication receiver, characterized by using the code and the size defined by. Receiving two elements and two signs, classifying and outputting a maximum value and a minimum value among the two elements, and outputting a sign of each of the maximum and minimum values; Performing an exclusive AND on the two numbers of codes to generate a control signal corresponding to each of the same and different cases; Subtracting and outputting the minimum value from the maximum value; Generating and outputting a negative Jacobian value corresponding to the subtraction result; Generating and outputting a positive Jacobian value corresponding to the subtraction result; Selectively outputting the negative Jacobian value or the positive Jacobian value in response to the control signal; And And summing and outputting the selectively output value to the maximum value. Receiving two elements and two signs and classifying the maximum value of the two elements into integers and decimals, outputting the minimum values of the two elements classified into integers and decimals, and outputting the signs of the maximum and minimum values, respectively ; Calculating and outputting an exponential power of two of the maximum integer; 2 ^{− (CMi-Cmi)} × 2 ^Cmf (where C _Mi is an integer of the maximum value, Cmi is an integer of the minimum value, Cmf is a decimal of the minimum value), and 2 for the first calculation result Calculating a complement of the second output unit and outputting the first calculation result if the signs of the maximum value and the minimum value are the same and outputting the complementary value of 2 if the signs of the maximum value and the minimum value are different; First summating and outputting either the first calculated result or the complementary value of 2 to an exponential power of two of the maximum integer; Calculating and outputting a binary log value corresponding to the first sum result; And summing and outputting said maximum value integer and said binary log value to a second sum.