KR20050058300A - Film bulk acoustic resonator and method for fabrication thereof - Google Patents

Abstract

The present invention provides a FBAR device that improves insertion loss characteristics by forming a signal blocking layer made of an insulating material on a substrate to block a signal generated in an activation region from being transmitted to the substrate. In addition, the present invention is not only a method for manufacturing the FBAR device, but also a structural layer caused by a conventional wet etching air gap formed by forming a sacrificial layer of polysilicon, and forming an air gap using dry etching. The present invention also provides a method of manufacturing a FBAR device that can prevent defects and freely adjust the position and number of via holes.

Description

 FAVAR element and its manufacturing method {FILM BULK ACOUSTIC RESONATOR AND METHOD FOR FABRICATION THEREOF}

The present invention relates to a film bulk acoustic resonator (FBAR) device for a thin film filter and a method of manufacturing the same, and more particularly, to a thin film filter using a thermal oxide film and a dry etching process. An element and a method of manufacturing the same.

In recent years, component technologies for mobile communication terminals such as radio frequency (RF) components have been rapidly developed in accordance with the trend of miniaturization and high functionality of mobile communication terminals. The filter, a key passive component of the RF mobile communication component, functions to select a desired signal or filter a specific signal among a myriad of air waves.

In particular, as the frequency band of a mobile communication terminal increases, the necessity of an ultra-high frequency element is increasing. However, such ultra-high frequency devices have a problem in that miniaturization and low cost required by a mobile communication terminal are difficult. For example, a dielectric resonator or a filter operating at 1 GHz or more is a conventional lumped element type and is too large in size, and thus impossible to integrate.

As a device capable of coping with such dielectric resonators, miniaturized quartz resonators and surface acoustic wave resonators are used. However, the insertion loss is large, there is a limit to the desired degree of integration and miniaturization, and the manufacturing cost is high.

In order to solve the above-mentioned problems, a resonator called a film bulk acoustic wave resonator (FBAR) or a thin film resonator (TFR) using the thickness vibration of the piezoelectric thin film has been studied in earnest and is being put into practical use.

The FBAR filter refers to a thin film type device that forms a piezoelectric dielectric material ZnO or AlN thin film on a silicon or GaAs substrate, which causes resonance due to the piezoelectric properties of the thin film itself. It is a thin-film device, low-cost, ultra-small and high-quality (Q) characteristics are possible, it can be used in radio communication equipment of various frequency bands (900 MHz ~ 10 GHz), military radar, and the like. In addition, it can be miniaturized to less than a hundredths of the size of the dielectric filter and the concentrated filter (LC) filter, and has the characteristics that the insertion loss is much smaller than that of the surface acoustic wave device.

In general, an FBAR device is formed by sequentially forming a lower electrode, a piezoelectric layer, and an upper electrode on a silicon substrate. At this time, an electric field is applied to the upper and lower electrodes to maintain a high-quality coefficient, thereby generating a piezoelectric layer. It is necessary to prevent the bulk acoustic wave from being affected by the silicon substrate.

In order to prevent the influence of the silicon substrate, a structure isolating the substrate and the resonance region is required, and this isolation structure determines the electrical performance of the FBAR device such as insertion loss and transfer gain and the practical use of the fabrication. It is an important task. Conventional isolation structures are largely classified into a reflection film structure using Bragg reflectance and a structure having an air gap.

Fig. 1A is a sectional view showing the structure of a conventional FBAR device having a reflective film structure, and Fig. 1B is a sectional view showing the structure of a conventional FBAR device having an air gap.

First, referring to FIG. 1A, the FBAR device includes a reflective film structure including a substrate 11 and first and second reflective layers 12a and 12b, a first electrode 17, a piezoelectric layer 18, and a second electrode. And a resonance region consisting of 19 parts. The reflective film structure separating the resonance region and the substrate 11 is repeatedly formed with reflective layers 12a and 12b having a large difference in acoustic impedance, and isolating structure using the difference in acoustic impedance generated from the lower direction of the resonance region. to be. This approach is also known as solidly mounted resonator (SMR).

However, this is very complicated because when selecting and stacking materials having a large acoustic impedance difference, the thickness of each layer must be precisely controlled by λ / 4 of the resonant frequency, and also considering the stress during the lamination process. It takes a lot of time. In addition, the SMR method has a problem in that reflection characteristics are lowered and an effective bandwidth is reduced than the air gap method, and thus there is a big limitation in practical use.

Alternatively, an FBAR device having an air-bridge type air gap having a structure as shown in FIG. 1B has also been proposed. In the FBAR of FIG. 1B, a sacrificial layer is formed in a region where an air gap A1 is to be formed on the substrate 21, and after forming the membrane layer 25 including an insulating film on the sacrificial layer and the substrate 21, the first layer is formed. The electrode 27, the piezoelectric layer 28, and the second electrode 29 are sequentially formed, and then the sacrificial layer is etched and removed through the via holes to form the air gap A1. Compared to the FBAR of FIG. 1A, this is relatively easy to manufacture and has excellent reflection characteristics. However, since the structure of the membrane layer 25 is unstable at the edge portion of the air gap, the structure collapses during processing such as photoresist removal or slicing. There is a problem that peeling occurs.

In order to solve this unstable structural problem, an FBAR device has been proposed, in which an additional layer for supporting the membrane layer is provided and the additional layer surrounds the air gap. A cross-sectional view of this FBAR device is shown in Fig. 2A. 2B is a plan view of the FBAR device.

2A and 2B, the FBAR element is formed on a substrate 31, a membrane support layer 35 formed on the substrate 31, including an air gap A2, and on the membrane support layer 35. The membrane layer 36 is formed, and a resonance region including the first electrode 37, the piezoelectric layer 38, and the second electrode 39 sequentially formed on the membrane layer 36. Here, the membrane support layer 35 supports the membrane layer 36 and serves to include an air gap A2 therein. As described above, in the FBAR of FIG. 2A, the membrane layer at the edge of the air gap A2 is structurally strengthened to prevent the collapse and delamination of the structure which may occur in subsequent processes (via hole forming process, photoresist removing process, etc.). can do. This makes it possible to manufacture a relatively robust FBAR device.

However, in the conventional FBAR structure, since the silicon substrate 31 doped with impurities has high electrical conductivity, a high frequency signal of 1 kHz or more can be transmitted to the substrate 31. This increases the insertion loss. Therefore, there is a problem that the characteristics of the FBAR device in the high frequency integrated circuit is lowered.

In addition, after the wet etching for forming the air gap, there is a problem that the device may be structurally unstable by the adhesive force applied to the structure around the air gap, in particular the membrane layer 36. That is, the etchant liquid generally used to remove the sacrificial layer formed of a metal such as Al, Cu, NiFe and a metal oxide such as ZnO may adversely affect the structure of the membrane layer due to its adhesion.

Meanwhile, when supplying an etchant to the sacrificial layer, a via hole is formed to connect the outside of the device to the sacrificial layer. The etchant for removing the sacrificial layer may also etch the piezoelectric layer material, so as shown in FIG. ) Should be formed outside the active area. In addition, in the case where the via hole H is formed in the corner portion of the activation region in this manner, it is necessary to form all four corner portions, respectively, for the more effective etching process. As such, there are many restrictions in selecting the number and location of via holes. As a result, the number of via holes is increased and limited to a specific position, which may adversely affect the characteristics of the device.

In addition, in the conventional sacrificial layer forming process, the undercut is controlled through dry etching of the photoresist after the wet etching of the sacrificial layer, but it has a disadvantage that the process is not only cumbersome but also undercut adjustment is not easy. On the other hand, due to the low side profile angle of the photoresist during the manufacturing process, a wing tip (wing tip) occurs to cause a problem of weakening the structure of the device. Referring to FIGS. 3A and 3B, in more detail, after the sacrificial layer 43 is formed on the substrate 41, the photoresist layer 44 is formed on the region where the air gap is to be formed. Next, the sacrificial layer 43 is etched to form the sacrificial region 43 'corresponding to the air gap as shown in FIG. 3B. At this time, the side profile angle Θ'1 of the photoresist 44 'is also lowered. This is because the photoresist has higher etching rate than the material forming the sacrificial layer. Therefore, when the side angle of the sacrificial region is lowered and the photoresist is lifted off after the membrane support layer process, there is a problem that a wing tip is generated at the outer portion thereof.

In addition to these problems, the conventional FBAR device has a problem that it is not easy to adjust the resonant frequency on the characteristics of the manufacturing process.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to provide a FBAR device having low insertion loss and excellent reflection characteristics by blocking signal transmission to a silicon substrate.

In addition, another object of the present invention is to provide a method for manufacturing the FBAR device, and a method for manufacturing an FBAR device that can more easily and easily implement the air gap forming process that can cause structural defects.

In order to achieve the above object, the present invention is a substrate, a signal blocking layer formed of an insulating material on the substrate, and blocking the signal transmitted from the active region to the substrate, and formed on the signal blocking layer and A membrane support layer including an air gap, a membrane layer formed on the membrane support layer, a first electrode formed on the membrane layer, a piezoelectric layer formed on the first electrode, and a second electrode formed on the piezoelectric layer It provides a FBAR device comprising a.

The signal blocking layer serves to electrically block a substrate influence that may be caused by a high frequency signal to improve insertion loss. As the signal blocking layer, an oxide film, a nitride film, or a thermal oxide film using porous silicon that can be easily grown on a silicon substrate may be selectively used.

In another embodiment of the present invention, a substrate, a membrane support layer formed on the substrate and including the air gap, a membrane layer formed on the membrane support layer, a first electrode formed on the membrane layer, It provides a FBAR device comprising a piezoelectric layer formed on the first electrode, a second electrode formed on the piezoelectric layer, the portion of the membrane layer corresponding to the active region has a thickness thinner than the surroundings.

The present embodiment has an effect of not only controlling the center frequency effectively but also improving the transmission gain by varying the thickness of the portion corresponding to the active region in the membrane layer. In the method of forming such a thin thickness, it is preferable to use dry etching so that the upper surface portion of the membrane layer corresponding to the active region is settled.

In still another embodiment of the present invention, a substrate, a membrane support layer formed on the substrate and including the air gap, a membrane layer formed on the membrane support layer, a first electrode formed on the membrane layer, And a piezoelectric layer formed on the first electrode and a second electrode formed on the piezoelectric layer, wherein at least one via hole is formed such that the outside of the FBAR element and the air gap are connected through the activation region. May be provided.

In this embodiment, the via hole is formed inside the active region that substantially matches the sacrificial region, so that the resonance characteristics can be improved while improving the etching efficiency with fewer via holes.

The present invention also provides a method of manufacturing the FBAR device. The method includes providing a substrate, forming a signal blocking layer with an insulating material on the substrate to block a signal transmitted from the activation region to the substrate, and forming a sacrificial layer on the signal blocking layer. Forming a sacrificial region corresponding to an air gap forming region with the remaining sacrificial layer portion after removing a portion of the sacrificial layer, and forming a membrane support layer on an upper surface of the signal blocking layer from which the sacrificial layer is removed. Forming a membrane layer over the sacrificial region and the membrane support layer; forming a first electrode on the membrane layer; forming a piezoelectric layer on the first electrode; Forming a second electrode on the piezoelectric layer, and removing the sacrificial region to form an air gap.

In addition, in the preferred embodiment of the present invention, the forming of the sacrificial region may include forming a photoresist layer at a position corresponding to an air gap region on the upper surface of the sacrificial layer, and exposing the sacrificial layer region by applying dry etching. The removal may be performed by forming a sacrificial region corresponding to the air gap region and removing the photoresist layer.

More preferably, the step of forming the membrane support layer is performed before removing the photoresist layer. Further, when forming the photoresist layer, the photoresist layer may be in a range of about 70 ° to about 90 ° based on the vertical angle after dry etching for forming the sacrificial region. By adjusting the side profile of the sacrificial region to form an undercut (undercut) structure. This can prevent wing-tips generated during the lift-off process of the photoresist layer.

In addition, the present invention provides a method for manufacturing a FBAR device that can adjust the resonant frequency and improve the transmission gain. In the manufacturing method, after forming a membrane layer on the sacrificial region and the membrane support layer, and before forming the first electrode, a dry etching process is applied such that an upper surface corresponding to the active region of the membrane layer becomes a settled plane. And etching to a predetermined thickness.

Furthermore, in another manufacturing method of the present invention, problems caused by the wet etching process employed in forming the air gap (for example, structural adverse effects due to adhesion by the etchant solution) can be solved. According to this manufacturing method, the sacrificial layer may be formed of polysilicon, and then the sacrificial region corresponding to the air gap formed of the sacrificial layer may be removed by dry etching. As the dry etching gas used at this time, XeF ₂ is preferable. In this way, the material forming the sacrificial layer may be made of an active region, that is, a material completely different from the piezoelectric layer, and various positions of the via hole providing the etchant supply path may be selected by applying a new etching process.

At least two of the various embodiments of the present invention may be combined to implement one FBAR device. EMBODIMENT OF THE INVENTION Hereinafter, preferred embodiment of this invention is described in detail with reference to drawings.

4A and 4B are a cross-sectional view and a plan view of an FBAR structure according to a preferred embodiment of the present invention.

First, referring to FIG. 4A, an FBAR device is formed on a substrate 51, a signal blocking layer 52 made of an insulating material formed on the substrate 51, and formed on the signal blocking layer 52. A membrane support layer 55 including a gap A3, a membrane layer 56 formed on the membrane support layer 55, a first electrode 57 formed on the membrane layer 56, and the first A piezoelectric layer 58 formed on the electrode 57 and a second electrode 59 formed on the piezoelectric layer 58 are formed.

The first feature of this embodiment is to minimize the insertion loss problem by forming the signal blocking layer 52 on the substrate 51. That is, when a voltage is applied to the first electrode 57 and the second electrode 59, a signal of a predetermined frequency generated in the activation region may be transmitted to the substrate having a certain conductivity. In particular, in the case where the substrate is doped with impurities or used in a high frequency integrated circuit such as a substrate doped with impurities, the insertion loss may be increased and the device characteristics may be impaired. The signal blocking layer 52 may be formed on the substrate 51 to block the signal generated from the activation region from being transferred to the substrate 51. As a result, the insertion loss characteristic of the FBAR device according to the present invention can be improved.

 The signal blocking layer may employ a thermal oxide film that can be easily grown on a silicon substrate, or may selectively employ an oxide film or a nitride film using a conventional deposition process such as chemical vapor deposition. The thickness of the conventional thermal oxide film having excellent insulation is preferably in the range of about 0.5 μm to 5 μm, and in the case of the thermal oxide film formed using porous silicon, the range of about 5 μm to 70 μm is preferable.

In addition, the second feature of the present embodiment is that the effective center frequency can be controlled by adjusting the thickness of the portion of the membrane layer corresponding to the active region, and the transmission gain can be improved. As shown in Fig. 4A, the membrane layer of the FBAR element has a plane in which the portion corresponding to the activation region is settled. The thickness of the membrane layer below the piezoelectric layer becomes smaller by the depth settled, which can be used not only to control the center frequency but also to improve the transmission gain. The lower surface of the membrane layer may be easily formed by using an etching process after forming the membrane layer and before forming the first electrode.

As described above, the present embodiment is implemented by combining both the first and second features, but each can be independently applied to the FBAR device, which can also be said to belong to the scope of the present invention.

Furthermore, the present invention not only provides the FBAR manufacturing method according to the embodiment shown in Fig. 4A, but also the FBAR device manufacturing method according to the present invention is generated when the photoresist is lifted off while forming the air gap region more efficiently. We can also provide a manufacturing method to solve the wing tip problem.

5A to 5F are cross-sectional views of processes for manufacturing an FBAR device according to a preferred embodiment of the present invention.

As shown in FIG. 5A, the signal blocking layer 102 is formed of an insulating material on the substrate 101. In the present embodiment, the silicon substrate 101 is used in a high temperature thermal oxidation process to form a signal blocking layer 102 made of a high quality thermal oxide film. Generally, as the silicon substrate 101, a silicon wafer doped with impurities and a high quality high resistance silicon wafer not doped with impurities may be used. The signal blocking layer 102 may form an oxide film or a nitride film using a conventional deposition process such as chemical vapor deposition, in addition to a thermal oxide film formed by thermal oxidation of a silicon substrate, and porous silicon formed by electroetching the silicon substrate 101. It is also possible to use a method of forming a layer into a thermal oxide film through a thermal oxidation process. In general, the thermally oxidized film is preferably formed to have a thickness of about 0.5 μm or more in order to ensure sufficient insulation to block a signal directed to the substrate. In contrast, about 5 μm or more in the case of a thermally oxidized film using porous silicon having low insulation, It is preferable to form, but the present invention is not limited by the thickness of the signal blocking layer.

5B to 5D show a series of processes for forming the sacrificial region 103 'for providing an air gap on the upper surface of the substrate on which the signal blocking layer 102 has been grown.

First, as shown in FIG. 5B, the sacrificial layer 103 is formed on the entire upper surface of the signal blocking layer 102. In the present invention, polysilicon is employed as the sacrificial layer 103. Polysilicon has excellent surface roughness and easy formation and removal of a sacrificial layer, and in particular, polysilicon may be removed by dry etching in a subsequent process.

Next, as shown in FIG. 5C, the photoresist 104 is formed on the sacrificial layer 103 to define a portion where the air gap is to be formed by photolithography. As the photoresist, a positive photoresist may be used as shown in FIGS. 6A and 6B, but it is preferable to use a negative or image reverse photoresist as shown in FIG. 5C. The negative or image reverse photoresist layer is formed of an undercut structure, that is, a structure having a sufficient lateral profile angle θ1 of 90 ° or more, unlike a conventional positive pattern.

Next, as illustrated in FIG. 5D, an etching process for forming a sacrificial region is performed. The side profile angle of the photoresist layer 104 'formed by this etching process has a sufficient side profile angle, as described in FIG. 5C, and thus has a nearly vertical or near vertical profile angle θ'2. Can be. In addition, it can be seen that the side profile angle of the sacrificial region 103 'is greatly increased compared to the conventional shape shown in FIG. 3B. As a result, the wingtip problem generated in the process of lifting off the photoresist layer 104 'after depositing the membrane support layer can be solved. At this time, the side profile angle θ2 'of the photoresist layer 104' is preferably adjusted to maintain a range of about 70 ° to 90 ° after etching. More preferably, it is adjusted to be almost vertical.

In the present invention, the method of adjusting the side profile angle of the photoresist to prevent the wing tip problem is not limited to the method of using negative photoresist or image reverse photoresist. In other words, any method capable of securing the side profile angle of the photoresist layer at a sufficient angle can be used. In other words, even when the positive photoresist layer is used, the desired side profile angle can be obtained even after the desired etching process by lowering the etching rate of the photoresist layer. As a preferable example thereof, a method of hard baking the photoresist using a hot plate or using a curing agent or an electron beam may be used to strengthen the photoresist layer. Such a method may be applied independently or in combination, and may be selectively applied to a negative photoresist layer or the like as necessary. The hard baking process used to lower the etch rate such that the side angle of the photoresist layer is maintained almost vertical after etching is preferably performed for 1 to 10 minutes in a temperature range of about 100 to 200 ° C.

Also, by controlling the angle of the photoresist after etching according to the change of the etching gas, the side profile angle can be secured largely, and the influence of the etching is prevented by using a hard mask made of a material such as metal without using the photoresist layer. It is also possible to maintain a vertical side angle.

Dry etching used in this process can be selectively used for all equipment such as reactive ion etching (RIE), inductively coupled plasma (ICP), electron cyclotron resonance (ECR). As the dry etching gas, C _x F _y , SF ₆ , Cl ₂ , CCl ₂ F ₂ , XeF ₂ , H ₂ , O ₂ or a mixture thereof may be optionally used. In addition to such changes in photoresist and gas conditions, it is also possible to control the profile of the photoresist by adjusting the power, pressure and flow rate of the equipment.

As such, the characteristic of the process is that the side profile angle of the photoresist is increased in order to increase the side angle of the sacrificial area etched after the dry etching, and as described above, different types of masks or One of the methods of strengthening the resist layer or optimizing the etching process conditions or in any combination thereof may be used.

Subsequently, as shown in FIG. 5E, the insulating material 105 is applied to the entire upper surface without removing the photoresist 104 ′. Here, the photoresist 104 'serves to define the membrane support layer formation region. As the insulating material layer 105 for forming the membrane support layer, an insulating material such as Si ₃ N ₄ , SiO _2, or Al ₂ O ₃ may be selected.

Next, as shown in FIG. 5F, the photoresist 104 ′ is removed through a lift-off process to form the membrane support layer 105 ′. As such, after the sacrificial region is formed, the photoresist 104 'is not removed, and after the insulating material 38 is applied, the photoresist 104' on the sacrificial region 103 'is lifted off. off), not only can the membrane support layer 105 'as shown in FIG. 5F be formed in a simplified manufacturing process, but also the photoresist layer 104' is formed by forming a vertical cross section after etching the sacrificial region 103 '. It is possible to effectively prevent wing tips that may occur during the lift off process. In this process, the membrane support layer 105 'is formed on the signal blocking layer 102 formed of a thermal oxide film surrounding the sacrificial region 103' to increase the thickness of the insulating material as a whole, thereby increasing the thickness of the insulating material from the electrode pad to the substrate. By effectively blocking signal transmission, insertion loss can be reduced as much as possible.

The thickness of the final sacrificial region and the membrane support layer 105 'is preferably in the range of 0.5-5 mu m. The sacrificial region 103 'and the membrane support layer 105' do not necessarily have the same height. That is, even if the membrane support layer 105 'is rather high, it is only necessary to play a role for supporting the membrane layer. In addition, since the region where the membrane support layer 105 'is formed is not an active region in the FBAR device, the flatness is not a big problem. Therefore, the membrane support layer 105 'may be formed in a simple process without planarization.

After the membrane support layer 105 'is formed, the membrane layer 106 is formed on the sacrificial region 103' and the membrane support layer 105 'as shown in FIG. 5G. The membrane layer 106 may be formed by depositing methods and materials known in the art. For example, the membrane layer 106 may be implemented with a SiO ₂ layer having a thickness of 1 μm. In addition, a SiO ₂ layer having a thickness of 1 μm may be deposited, and SiN having a thickness of 0.5 μm may be further deposited on the upper surface thereof to form a membrane layer. The method of forming the membrane layer 106 according to the present invention is not limited thereto.

In the next process, as shown in Fig. 5G, the portion of the membrane layer corresponding to the activation region is reduced to a predetermined thickness t2. This may be done by selectively etching the upper surface of the membrane layer corresponding to the activation region through dry etching. Additionally, in order to reduce the step resistance and the occurrence of parasitic resonance when driving the device by lowering the inclination angle of the active region and the surrounding membrane layer part after dry etching, dry etching may be performed after hard baking the upper surface at high temperature. It may be. After etching, the angle of the inclined surface of the active region and its surroundings is preferably controlled at about 20 ° to 80 °, and the hard baking is preferably performed at 130 to 200 ° C. for 1 to 10 minutes. In order to effectively control the center frequency and increase the transmission gain, the etching thickness t1-t2 is preferably etched in the range of 50 to 100% of the membrane layer thickness t1.

Subsequently, as illustrated in FIG. 5I, a first electrode 107 is formed on the formed membrane layer 106 ′, and a piezoelectric layer 108 is formed on the first electrode 107. The second electrode 109 is formed on the piezoelectric layer 108. The first and second electrode layers 107 and 109 may be formed of a conventional conductive material such as metal. For example, one of Al, W, Au, Pt, Ru, RuO ₂ and Mo may be selected and used. The piezoelectric layer 108 is preferably AlN or ZnO as a conventional piezoelectric material, but is not necessarily limited thereto. The piezoelectric layer 108 may implement a pattern by using both wet etching and dry etching, and in particular, when AlN is used, the etching rate of AlN may be achieved by using a single or mixed gas of Ar, BCl ₃ , Cl ₂ , CF ₄ . It is preferable to carry out the dry etching under the condition of high and high selectivity with the lower electrode and the membrane layer.

Finally, as shown in FIG. 5J, after the via hole H3 is formed, the sacrificial region 103 ′ is removed through the via hole H3 to form the air gap A3. In this case, by forming the sacrificial region with polysilicon, dry etching may be used instead of wet etching. Therefore, it is possible to remove the adhesive force of the membrane layer generated during the wet etching, and to simplify the etching process.

As the etching gas used in the dry etching, it is preferable to use xenon difluoride (XeF ₂ ). Xenon difluoride is a material commonly used for polysilicon etching in MEMS (micro electro mechanical system) can be vaporized through pressure control without using a plasma. In addition, in order to prevent contamination of the substrate surface by forming HF in combination with moisture, it is preferable to perform the process after baking the entire device at 140 ° C. for 10 minutes before the etching process.

Generally, xenon difluoride etches polysilicon of several micrometers per minute, and has a high selectivity of several thousand to one with silicon oxide. In addition to silicon oxide, materials such as photoresist, PSG, BPSG, aluminum, gold, silicon nitride, NiTi, etc. hardly etch, so when applied to the FBAR manufacturing process, the etching speed of polysilicon, which is a sacrificial layer, is fast and via holes areotropically etched. Not only is the etching to the inside smooth, but a high selectivity with the membrane support layer or the membrane layer can form a simple and stable air gap.

Conventionally, since the etchant liquid used for wet etching has a high etching rate with respect to the material constituting the piezoelectric layer and the upper and lower electrodes, the via hole forming position is limited. However, in the air gap forming process according to the present invention, Since a dry etching method having a selectivity is used, via holes reaching the center of the sacrificial region may be formed through the piezoelectric layer and the upper and lower electrodes. Therefore, since the via hole may be disposed in the center of the sacrificial area to ensure an efficient etching process, even if a small number of via holes (one via hole is possible) is formed, xenon difluoride (XeF ₂ ) gas may be added to the sacrificial area. Can be removed. As such, by eliminating the constraints on the conventional via hole forming position, the via hole forming position and number can be designed in various ways. This is expected to reduce the parasitic components affecting the characteristics of the device by adjusting the position and number of via holes.

The method of manufacturing the FBAR device according to the present invention shown in Figs. 5A to 5J is merely illustrative and does not limit the present invention. That is, each step constituting the manufacturing method may be used independently or in combination. For example, a process of forming a sacrificial layer with polysilicon to dry etch to form an air gap, a process of forming an insulating film to prevent insertion loss, a process of dry etching a membrane layer to adjust a center frequency, and a photo Processes for improving the side profile angle of the resist can be used independently or in different combinations, which are also within the scope of the present invention.

As such, the present invention is not limited by the above-described embodiments and the accompanying drawings, and is intended to be limited by the appended claims, and various forms of substitution may be made without departing from the technical spirit of the present invention described in the claims. It will be apparent to one of ordinary skill in the art that modifications, variations and variations are possible.

As described above, according to the present invention, by forming a high-quality insulating film on the substrate, it is possible to minimize the insertion loss by blocking the signal transmission to the substrate having the electrical conductivity, and also, the formation of the sacrificial layer during the formation of the sacrificial layer After the dry etching, the side profile angle of the sacrificial layer and the photoresist can be adjusted to form a substantially vertical profile angle to form a flat surface without a wing tip after deposition of the supporting layer, and also by etching the insulating material of the active region to obtain effective center frequency control and transmission gain. Could raise.

The polysilicon, a sacrificial layer, simplifies the manufacturing process by dry etching using xenon difluoride, and improves physical stability of the device by eliminating the adhesive force applied to the structure around the air gap, and in particular, xenon diflow with dry etching gas. In the case of using a ride, the via hole for supplying the etching gas may be formed to pass through the activation region because the Ride has a high selectivity with respect to the sacrificial region compared to the material constituting other structures including the activation region.

1A and 1B are cross-sectional views of a conventional FBAR device for a thin film filter.

2A and 2B are a cross-sectional view and a plan view of a FBAR element for a thin film filter employing a conventional membrane support layer.

3A and 3B are cross-sectional views illustrating a sacrificial region forming process for forming an air gap according to a conventional method.

4A and 4B are a cross-sectional view and a plan view of an FBAR device according to a preferred embodiment of the present invention.

5A to 5J are step-by-step cross-sectional views illustrating a manufacturing process of an FBAR device according to an embodiment of the present invention.

< Description of Symbols for Major Parts of Drawings>

51: substrate 52: signal blocking layer

53: sacrificial layer 54: photoresist (PR)

55: membrane supporting layer

56: membrane layer 57: first electrode

58: piezoelectric layer 59: 2nd electrode

Claims (29)

 In a FBAR element having an activation region resonating at a predetermined frequency, Board; A signal blocking layer formed of an insulating material on the upper surface of the substrate to block a signal transmitted from the activation region to the substrate; A membrane support layer formed on the signal blocking layer and surrounding the air gap;  A membrane layer formed on the membrane support layer; A first electrode formed on the membrane layer; A piezoelectric layer formed on the first electrode; And An FBAR device comprising a second electrode formed on the piezoelectric layer. The method of claim 1, The signal blocking layer is a FBAR device, characterized in that the thermal oxide film. The method of claim 2, And the thermal oxide film has a thickness of about 0.5 to about 5 mu m. The method of claim 1, The signal blocking layer is a FBAR device, characterized in that the thermal oxide film made of porous silicon. The method of claim 4, wherein Wherein the thermal oxide film has a thickness of about 5 to about 70 μm. The method of claim 1, And at least one via hole connecting the air gap through the upper and lower electrodes and the piezoelectric layer from the outside of the FBAR device. The method of claim 6, The via hole is one, and is connected to an almost center portion of the air gap region. In the manufacturing method of the FBAR element having an activation region resonating at a predetermined frequency, Forming a signal blocking layer of an insulating material on the upper surface of the substrate to block a signal transmitted from the activation region to the substrate; Forming a sacrificial layer on the signal blocking layer; Partially removing the sacrificial layer so that a portion corresponding to a region where an air gap is to be formed remains; Forming a membrane support layer on an upper surface of the signal blocking layer from which the sacrificial layer is removed; Forming a membrane layer on top of the remaining sacrificial layer and the membrane support layer; Sequentially forming a first electrode, a piezoelectric layer, and a second electrode on the membrane layer; And, Removing the remaining sacrificial layer to form an air gap. The method of claim 8, Forming the signal blocking layer, FBAR device manufacturing method characterized in that the step of forming a thermal oxide film by applying a thermal oxidation process on the substrate. The method of claim 9, The thermal oxide film has a thickness of about 0.5 to about 5㎛ FBAR device manufacturing method characterized in that. The method of claim 8, The substrate is a silicon substrate, The forming of the signal blocking layer may include forming a porous silicon layer on the silicon substrate and forming the porous silicon layer as a thermal oxide film. The method of claim 11, The thermal oxide film has a thickness of about 5 to about 50㎛ FBAR device manufacturing method characterized in that. The method of claim 8, The forming of the signal blocking layer may include forming an oxide film or a nitride film by using a chemical vapor deposition method. The method of claim 8, Partially removing the sacrificial layer, Forming a photoresist layer at a position corresponding to an air gap region on an upper surface of the sacrificial layer; Applying dry etching to remove the exposed portion of the sacrificial layer; FBAR device manufacturing method comprising the step of removing the photoresist layer. The method of claim 14, Forming the membrane support layer is performed before removing the photoresist layer. The method of claim 15, The forming of the photoresist layer further includes, after the dry etching, adjusting the side profile of the photoresist layer such that the side angle of the photoresist layer is in a range of about 70 ° to about 90. FBAR device manufacturing method. The method of claim 16, After adjusting the side profile of the photoresist layer, further comprising the step of strengthening the photoresist layer using a curing agent or electron beam curing. The method of claim 17, And the photoresist layer is a negative or image reverse photoresist layer. The method according to any one of claims 16, 17 and 18, And after the step of forming the photoresist layer, before the step of partially removing the sacrificial layer, hard baking the photoresist layer using a hot plate. The method of claim 19, The hard baking step is performed for 1 to 10 minutes in the temperature range of about 100-200 ℃ FBAR device manufacturing method. The method of claim 14, The dry etching gas used in the step of removing the exposed portion of the sacrificial layer is selected from the group consisting of C _x F _y , SF ₅ , Cl ₂ , CCl ₂ F ₂ , XeF ₂ , H ₂ , O ₂ and mixtures thereof. FBAR device manufacturing method characterized in that it is selected. The method of claim 8, The sacrificial layer is a FBAR device manufacturing method characterized in that made of polysilicon. The method of claim 22, Removing the remaining sacrificial layer to form an air gap, And removing the sacrificial region by applying dry etching through at least one via hole. The method of claim 23, Dry etching gas for removing the sacrificial layer is a FBAR device manufacturing method characterized in that the XeF ₂ gas. The method of claim 23, At least one of the bar holes is formed such that the outer side of the FBAR device and the sacrificial layer are connected to each other through the upper and lower electrodes and the piezoelectric layer. The method of claim 8, The membrane support layer is a FBAR device manufacturing method characterized in that made of a material selected from the group consisting of SiO ₂ , SiN or Al ₂ O ₃ . The method of claim 8, The piezoelectric layer is a FBAR device manufacturing method characterized in that consisting of AlN or ZnO. In the manufacturing method of the FBAR element having an activation region resonating at a predetermined frequency, Forming a sacrificial layer made of polysilicon on the substrate; Partially removing the sacrificial layer such that a portion corresponding to a region where an air gap is to be formed remains; Forming a membrane support layer on an upper region of the substrate from which the sacrificial layer is removed; Forming a membrane layer on top of the remaining sacrificial layer and the membrane support layer; Sequentially forming a first electrode, a piezoelectric layer, and a second electrode on the membrane layer; Forming at least one via hole connected to the remaining sacrificial layer; And, And forming an air gap by applying dry etching through the via hole to remove the remaining sacrificial layer. The method of claim 28, Dry etching gas for removing the sacrificial region is FBAR manufacturing method, characterized in that XeF ₂ .