KR20050057972A - Device for protecting electrostatic discharge in liquid crystal display - Google Patents

Abstract

Disclosed is an electrostatic protection device for a liquid crystal display device capable of eliminating line defects caused by static electricity.

An electrostatic protection device of a liquid crystal display device of the present invention includes a data driver for supplying image data to the liquid crystal panel; A DC-DC converter for supplying logic power for driving a data driver; And an electrostatic protection circuit for controlling the supply of logic power in response to the electrostatic pulse input to the data driver. Here, the electrostatic pulse input to the data driver before the supply of logic power is controlled causes a line defect phenomenon on the screen of the liquid crystal panel due to the latch up.

Therefore, at the same time as the generation of the electrostatic pulse, the supply of logic power is automatically cut off during the on period of the electrostatic pulse, and after that, the logic power can be removed by eliminating the line defect phenomenon. Compared to the removal of this, there is an effect that can respond to the static electricity more quickly.

Description

Device for protecting electrostatic discharge in liquid crystal display

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to an electrostatic protection device for a liquid crystal display device capable of automatically eliminating line defects generated on a screen by static electricity.

1 is a block diagram schematically illustrating a configuration of a general liquid crystal display device.

Referring to FIG. 1, a general liquid crystal display device converts external analog image data into digital image data, and detects a sync signal (Vsync, Hsync) from the analog image data. A control unit 2 for receiving digital image data and synchronization signals Vsync and Hsync from the digital video card 1 and generating a control signal for driving a liquid crystal panel using the synchronization signal; Accordingly, a data driver 3 for supplying the digital image data to the data lines DL of the liquid crystal panel, and a gate driver for sequentially supplying scan signals according to the control signal to the gate lines GL. 5), a liquid crystal panel 4 for displaying the image data according to the supplied scanning signal, a gate driver 5, a data driver 3, Direct current to generate the voltage level for driving the fisherman 2 or the like - is made into a direct current converter (6).

Here, the control signal generated from the controller 2 is divided into a first drive control signal for driving the gate driver 5 and a second drive control signal for driving the data driver 3. The first driving control signal includes a gate shift clock (GSC), a gate start pulse (GSP), and a gate output enable (GOE). The second drive control signal includes a source shift clock (SSC), a source start pulse (SSP), and a source output. Enable (SOE: Source Output Enable) may be included.

The digital video card 1 converts an analog input video signal into digital video data and detects sync signals Vsync and Hsync included in the video signal.

The control unit 2 supplies the digital video data of red (R), green (G) and blue (B) to the data driver 3 from the digital video card 1. In addition, the controller 2 transmits the first drive control signal and the second drive control signal to the data driver 3 using horizontal / vertical synchronization signals Vsync and Hsync input from the digital video card 1. And timing of the gate driver 5.

The gate driver 5 may include a shift register (not shown) that sequentially generates a scan signal in response to a gate start pulse GSP input from the controller 2, and a voltage of the scan signal to drive the liquid crystal cell. And a level shifter (not shown) for shifting to a suitable level. In response to the scan signal input from the gate driver 5, the image data on the data line DL is supplied to the pixel electrode of the liquid crystal cell by the switching element TFT.

The second driver control signal is input to the data driver 3 together with video data of red (R), green (G) and blue (B) from the control unit 2. The data driver 3 latches the image data of red (R), green (G), and blue (B) according to the second driving control signal, and then latches the latched data in a gamma voltage generator (not shown). Correction is performed according to the generated gamma voltage Vγ. The data driver 3 supplies the grayscale display voltage corrected by the gamma voltage Vγ to the data line DL one by one.

In the liquid crystal panel 4, liquid crystal is injected between two glass substrates, and the gate lines GL and the data lines DL are formed to be perpendicular to each other on the lower glass substrate. A switching element for selectively supplying an image input from the data lines DL to the liquid crystal cell is formed at the intersection of the gate lines GL and the data lines DL. To this end, a gate line GL is connected to a gate terminal of the switching element TFT, and a data line DL is connected to a source terminal of the switching element TFT.

Meanwhile, the DC-DC converter 6 converts a single DC voltage of a predetermined range input from a power supply unit (not shown) into a DC voltage of a predetermined size and outputs the DC voltage. In other words, the DC-DC converter 6 generates different voltage levels for driving the control unit 2, the data driver 3, the gate driver 5, and the like from the single DC voltage.

In the liquid crystal display device configured as described above, an electrostatic discharge (ESD) phenomenon may occur due to an external or internal situation. Such static electricity may be generated in almost all processes that go through deposition, etching, and liquid crystal processing on the transparent glass in manufacturing the liquid crystal panel, or may be generated by some external environmental factors while the image is displayed on the liquid crystal panel. . In general, static electricity is generated by positive electrostatic pulses and negative electrostatic pulses.

In the severe case, the static electricity causes fatal damages such as device breakdown and insulation breakdown, and thus, may cause a decrease in product yield due to a failure.

In addition, when static electricity is generated while the image is being displayed, the generated static electricity flows through the liquid crystal panel to the data driver, the gate driver, the controller, and the like, so that a fatal error may occur in the operation of each device.

In particular, when static electricity flows to the data driver, latch up occurs in the internal logic circuit of the data driver, and predetermined data is applied through the data line while the gate line is in the non-selection period. Unnecessary data is displayed on the non-selected gate line, thereby causing a line defect phenomenon on the screen.

However, this line fault phenomenon can be recovered simply by turning the power on and off. That is, as shown in FIG. 2, the DC-DC converter 6 generates a logic power of approximately 3.3 V and is applied to the data driver, and the data driver is driven by the logic power to display image data on the liquid crystal panel. Done. At this time, when static electricity is generated and flows to the data driver, a latch circuit (not shown) of the data driver is operated to latch up and output predetermined image data to be displayed on the screen. In general, when the corresponding gate line is selected, the data driver should display predetermined image data on the corresponding gate line. However, when static electricity is generated in this manner, even when the corresponding gate line is not selected, predetermined image data is output and displayed on the corresponding gate line, causing a line defect phenomenon. That is, predetermined image data should be displayed on a specific gate line, and a predetermined image is displayed on a non-selected gate line, resulting in a line defect phenomenon in which an image that should not be displayed is displayed.

Such static electricity line defects can be eliminated by manually turning on / off the reset of the applied logic power. This state corresponds to a soft fail of static electricity. In contrast to such a soft fail, there is a hard fail, which refers to a state in which the hard fail is fatally damaged by static electricity and cannot be recovered again.

However, conventionally, there has been a need for manual operation to eliminate line defects caused by static electricity.

Accordingly, the present invention has been made to solve the above problems, and when the static electricity is generated and a line defect occurs, the logic fault can be removed by automatically shutting off and supplying the logic power applied to the data driver. An object of the present invention is to provide an electrostatic protection device for a liquid crystal display device.

According to a preferred embodiment of the present invention for achieving the above object, the electrostatic protection device of the liquid crystal display device, the data driver for supplying image data to the liquid crystal panel; A DC-DC converter for supplying logic power for driving the data driver; And an electrostatic protection circuit for controlling the supply of the logic power in response to the electrostatic pulse input to the data driver, wherein the electrostatic pulse input to the data driver before the supply of the logic power is controlled due to a latch up. It is characterized by causing a line defect phenomenon on the screen of the liquid crystal panel.

According to the static electricity protection device of the liquid crystal display device, the static electricity protection circuit is to block the supply of the logic power during the on period of the static electricity pulse when the electrostatic pulse is generated in order to prevent the line fault phenomenon, the static electricity The supply of the logic power may be resumed at the point where the pulse is on.

According to the static electricity protection device of the liquid crystal display device, the static electricity protection circuit, the blocking voltage generator for generating a blocking voltage for interrupting the supply of the logic voltage during the on period of the electrostatic pulse; A resume voltage generator for generating a resume voltage for resuming the supply of the logic voltage at a time point after the on period of the electrostatic pulse has passed; And an open / close switch in which the supply of the logic power is opened and closed according to the cutoff voltage and the resume voltage.

According to another preferred embodiment of the present invention, an electrostatic protection device of a liquid crystal display device includes: a data driver for supplying the image data to the liquid crystal panel; A DC-DC converter for supplying logic power for driving the data driver; An electrostatic pulse is generated and input to the data driver to generate a line fault phenomenon on the screen due to the latch-up, and at the same time, a cutoff voltage is generated to generate a cutoff voltage for cutting off the supply of the logic voltage during the on period of the electrostatic pulse. part; A resume voltage generator for generating a resume voltage for resuming the supply of the logic voltage at a time point after the on period of the electrostatic pulse has passed; And an open / close switch in which the supply of the logic power is opened and closed according to the cutoff voltage and the resume voltage.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention.

3 is a schematic view of an electrostatic protection device of a liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 3, the electrostatic protection device of the liquid crystal display device includes a data driver 12 for supplying image data to a liquid crystal panel, and a DC-DC for supplying logic power for driving the data driver 12. Converter 11 and an electrostatic protection circuit 13 for controlling the supply of the logic power in response to the static electricity input to the data driver 12. Here, the static electricity protection circuit 13 may be provided between the DC-DC converter 11 and the data driver 12.

According to the present invention, in a situation where a line defect occurs due to a latch up in the data driver 12 as static electricity is generated, the logic power supplied from the DC-DC converter 11 is temporarily suspended using the generated static electricity. The logic can be turned on again when it is disconnected and the static electricity is released, eliminating the soft fail line fault.

Accordingly, the present invention can be explained on the premise that a line defect phenomenon occurs first by the data driver 12 into which static electricity is introduced.

In general, static electricity is generated in the form of high voltage electrostatic pulses with very short widths, which can be either positive or negative polarity pulses.

The static electricity protection circuit 13 may include a cutoff voltage generator 15 generating a cutoff voltage for cutting off the supply of the logic voltage during an on-period of the electrostatic pulse, and the logic at a time after the on-period of the electrostatic pulse has passed. And a resume voltage generator 18 for generating a resume voltage for resuming the supply of the voltage, and an open / close switch (TR1) 14 for opening and closing the supply of the logic power supply in accordance with the cutoff voltage and the resume voltage.

The on / off switch TR1 14 is preferably a bipolar junction transistor (BJT).

The BJT may have an npn or pnp structure of a collector terminal C, a base terminal B, and an emitter terminal E. FIG. In FIG. 3 of the present invention, a BJT having an npn structure is shown.

Accordingly, the DC-DC converter 11 is connected to the collector terminal C of the BJT, and the emitter terminal E of the BJT is connected to the data driver 12.

Further, the cutoff voltage generator 15 is connected between the emitter terminal E and the base terminal B of the BJT, and the resume voltage generator 18 is connected to the collector terminal C of the BJT. It is connected between the base terminal (B).

Accordingly, both the blocking voltage generated by the blocking voltage generator 15 and the resume voltage generated by the resume voltage generator 18 are applied to the BJT through the base terminal B to open and close the BJT. That is, the BJT is cut off by the blocking voltage, and the BJT is turned on by the resume voltage.

The cutoff voltage generator 15 may include a forward diode (D1) 16 for generating the cutoff voltage while the positive electrostatic pulse is on, and generate the cutoff voltage while the negative electrostatic pulse is on. It consists of a reverse diode (D2) 17.

When a positive electrostatic pulse is applied to the electrostatic protection circuit 13, an electrostatic pulse is supplied through the emitter terminal E of the BJT and the forward diode D1 16 during the on period of the positive electrostatic pulse. Will be. At this time, assuming that the internal resistance of the forward diode (D1) 16 is minutely present, the voltage of the electrostatic pulse supplied to the forward diode (D1) 16 is inside of the forward diode (D1) 16. A base voltage V _B1 reduced by a resistance is generated, and this reduced base voltage becomes the aforementioned blocking voltage. In this case, the voltage difference between the blocking voltage V _B1 and the voltage of the electrostatic pulse supplied to the emitter terminal E of the BJT, that is, the emitter voltage V _E , that is, the base-emitter voltage V _BE1. ) Has a minute negative voltage.

In fact, the turn-on voltage Vto1 for turning on the BJT is greater than the difference between the base-emitter voltage V _BE1 and the threshold voltage Vth of the BJT so that the BJT becomes conductive. Here, the threshold voltage may be about 0.7V.

However, since the base-emitter voltage V _BE1 has a minute negative voltage, the turn-on voltage Vto has a negative voltage value, thereby blocking the BJT. As a result, the logic power supply does not pass through the BJT and thus cannot be supplied to the data driver 12.

Similarly, even if a negative electrostatic pulse is applied to the electrostatic protection circuit 13, the BJT is blocked during the on period of the negative electrostatic pulse.

As described above, the forward diode (D1) 16 or the reverse diode (D2) 17 may generate a blocking voltage for blocking the BJT due to a minute resistance therein.

The resume voltage generator 18 is connected between the collector terminal C and the base terminal B of the BJT to supply a resume voltage for supplying the base terminal B when the ON period of the electrostatic pulse has passed. It is preferable to provide the resistance R as generating.

After the on period of the electrostatic pulse passes, the logic power source 3.3V is applied to the base terminal B via the resistor R. At this time, the logic power is generated by the resistor (R), the base voltage (V _B2 ) is voltage-decreased by the resistor (R) is generated, the base voltage is thus reduced to the above-mentioned resume voltage. At this time, the emitter terminal is supplied with a voltage of 0V since the on period of the electrostatic pulse has passed, the emitter voltage (V _E ) is 0V. In this case, the voltage difference between the resume voltage V _B2 and the emitter voltage, that is, the base-emitter voltage V _BE2 , becomes the resume voltage V _B2 as it is, and the turn-on voltage Vto2 at this time is Since the base-emitter voltage V _BE2 is greater than the difference value between the threshold voltage Vth of the BJT, the BJT becomes conductive so that the logic power is supplied to the data driver 12 via the BJT. Will be. As a result, the data driver 12 is normally driven to eliminate the line defect phenomenon on the screen.

In general, since the width of the electrostatic pulse is very short, the time until the BJT is shut off and then turned on again becomes very short, and a process in which logic power is not supplied to the data driver 12 but is supplied again occurs in an instant. Will be.

That is, the time when the logic power is not supplied to the data driver 12 is supplied in proportion to the width of the electrostatic pulse. In other words, when the width of the electrostatic pulse becomes wider, the time until the logic power that is not supplied is longer becomes longer. On the contrary, when the width of the electrostatic pulse is narrowed, when the logic power that is not supplied by the amount is supplied The time to shorten.

The operation of the static electricity protection circuit of the liquid crystal display device configured as described above will be described.

In the following description, the open / close switch (TR1) 14 is a BJT of npn structure, the cutoff voltage generator 15 is a forward and reverse diodes (D1, D2), and the resume voltage generator (18) To be considered. Of course, the resume voltage generator 18 does not necessarily need to be a resistor, and any device may be used as long as it can generate a resume voltage capable of conducting the BJT. Similarly, the cutoff voltage generator 15 does not necessarily need to be a diode, and any element capable of generating a cutoff voltage may be used.

In addition, although only positive electrostatic pulse is demonstrated, it should be noted that it can apply similarly to negative electrostatic pulse.

First, when positive or negative static electricity is generated, an electrostatic pulse having a predetermined on period is input to the data driver 12, and latched up by the input electrostatic pulse so that the predetermined data is a gate line of an unselected period. The line defect phenomenon shown in FIG.

In this case, a line defect phenomenon occurs due to the generation of the electrostatic pulse, and the electrostatic pulse is supplied to the electrostatic protection circuit 13.

The electrostatic pulse supplied to the static electricity protection circuit 13 is supplied to the emitter terminal E and the blocking voltage generator 15 of the BJT. As described above, the cutoff voltage generator 15 includes a forward diode (D1) 16 and a reverse diode (D2) 17. At this time, when the supplied electrostatic pulse is positive polarity, it is supplied to the forward diode (D1) 16, and when negative polarity is supplied to the reverse diode (D2) 17.

When a positive electrostatic pulse is supplied to the forward diode (D1) 16, a voltage drop due to the internal resistance of the forward diode (D1) 16 is generated, thereby generating a blocking voltage (V _B1 ) as much as the voltage drop. Done.

At this time, the voltage difference between the blocking voltage V _B1 and the electrostatic pulse supplied to the emitter terminal E of the BJT, that is, the emitter voltage V _E , that is, the base-emitter voltage V _BE1 . Has a small negative voltage.

Accordingly, the turn-on voltage Vto1 for turning on the BJT is smaller than the threshold voltage Vth to block the BJT.

In this case, the section in which the BJT is blocked is proportional to the on section of the positive electrostatic pulse, that is, the pulse width.

Therefore, the logic power supplied from the DC-DC converter 11 does not pass through the BJT and is not supplied to the data driver 12.

On the other hand, when the on-section of the positive electrostatic pulse passes, the positive electrostatic charge drops to a voltage of 0V.

Accordingly, the emitter voltage V _E of the BJT becomes 0V.

In this case, the voltage drop is generated while the logic power supply passes through the resistor R, so that the resume voltage V _B1 is generated as much as the voltage drop.

At this time, the base-emitter voltage V _BE2 , which is a voltage difference between the resume voltage V _B1 and the emitter voltage (eg, 0 V) of the BJT, has a positive voltage much larger than the threshold voltage.

Accordingly, the turn-on voltage Vto2 for turning on the BJT is a voltage difference between the base-emitter voltage V _BE2 and the threshold voltage Vth, and the base-emitter voltage V _BE2 is a threshold. Since it has a positive value greater than the voltage, the BJT is conducted by the turn-on voltage Vto2.

Accordingly, the logic power is supplied to the data driver 12 via the BJT, and thus the data driver 12 is normally driven, thereby eliminating a line defect phenomenon generated on the screen.

As described above, according to the present invention, when a line defect occurs on the screen due to static electricity, the logic power is temporarily blocked from being supplied to the data driver using static electricity and then supplied again. Line defects can be eliminated.

In addition, according to the present invention, by replacing the inconvenience caused by the manual operation to remove the line defects caused by the static electricity in the past, when the static electricity automatically resets the logic power supply to respond more quickly to static electricity It has an effect.

1 is a block diagram schematically illustrating a configuration of a general liquid crystal display device.

FIG. 2 is a diagram illustrating a data driver in which line defects are generated by static electricity in FIG. 1. FIG.

3 is a schematic view of an electrostatic protection device of a liquid crystal display according to an exemplary embodiment of the present invention.

<Name of the code for the main part of the drawing>

11: DC-DC converter 12: data driver

13: static electricity protection circuit 14: on-off switch (TR1)

15: cut-off voltage generator 16: forward diode (D1)

17: reverse diode (D2) 18: resistor (R)

Claims (10)

In a liquid crystal display device for displaying image data on the liquid crystal panel, A data driver for supplying the image data to the liquid crystal panel; A DC-DC converter for supplying logic power for driving the data driver; And Electrostatic protection circuit for controlling the supply of the logic power in response to the electrostatic pulse input to the data driver And an electrostatic pulse input to the data driver before the supply of the logic power is controlled to cause a line defect phenomenon on the screen of the liquid crystal panel due to the latch-up. . The method of claim 1, wherein the static electricity protection circuit, In order to prevent the line fault phenomenon, when the electrostatic pulse is generated, the supply of the logic power is cut off during the on period of the electrostatic pulse, and the supply of the logic power is resumed when the on period of the electrostatic pulse has passed. Electrostatic protection device of the liquid crystal display device. The method of claim 1, wherein the static electricity protection circuit, A cutoff voltage generator configured to generate a cutoff voltage for cutting off the supply of the logic voltage during the on period of the electrostatic pulse; A resume voltage generator for generating a resume voltage for resuming the supply of the logic voltage at a time point after the on period of the electrostatic pulse has passed; And An opening / closing switch in which the supply of the logic power is opened and closed according to the cutoff voltage and the resume voltage Electrostatic protection device of the liquid crystal display comprising a. The electrostatic protection device of a liquid crystal display device according to claim 3, wherein the on / off switch is a bipolar junction transistor (BJT). The method of claim 3, wherein the blocking voltage generating unit, A first diode generating a first blocking voltage for the positive electrostatic pulse; And A second diode generating a second blocking voltage for the negative electrostatic pulse Electrostatic protection device of the liquid crystal display comprising a. The electrostatic protection device of claim 3, wherein the blocking voltage is a voltage at which the voltage of the electrostatic pulse is lowered by an internal resistance of the diode. The electrostatic protection device of a liquid crystal display device according to claim 3, wherein the resume voltage generator is a resistor. The electrostatic protection device of a liquid crystal display device according to claim 3, wherein the resume voltage is a voltage at which the logic power supply is dropped by the resistor. The electrostatic protection device of claim 3, wherein the time when the supply of the logic power is interrupted and resumed is proportional to the width of the electrostatic pulse. In a liquid crystal display device for displaying image data on the liquid crystal panel, A data driver for supplying the image data to the liquid crystal panel; A DC-DC converter for supplying logic power for driving the data driver; An electrostatic pulse is generated and input to the data driver to generate a line fault phenomenon on the screen due to the latch-up, and at the same time, a cutoff voltage is generated to generate a cutoff voltage for cutting off the supply of the logic voltage during the on period of the electrostatic pulse. part; A resume voltage generator for generating a resume voltage for resuming the supply of the logic voltage at a time point after the on period of the electrostatic pulse has passed; An opening / closing switch in which the supply of the logic power is opened and closed according to the cutoff voltage and the resume voltage Electrostatic protection device of the liquid crystal display comprising a.