KR20050026231A - Lead frame stucture and semi-conductor package using it - Google Patents

Abstract

A lead frame structure and a semiconductor package using the same are provided to increase the number of input/output and to enhance heat dissipation effect by using an enhanced support member. A lead frame structure includes a support member(110) for loading stably a semiconductor chip, a plurality of tie bars, a plurality of pin type inner leads, an outer lead(140) prolonged from each inner lead to the outside, and dam bars. The support member is composed of a nonconducting lower tape pad, a conductive lead, and a nonconducting upper tape pad. Each tie bar(120) for supporting and fixing the support member is connected with a corner of the support member. The plurality of pin type inner leads(130) are spaced apart from the support member and connected with input/output terminals of the chip by using conductive wires. Each dam bar(150) is vertically connected with the inner and outer leads.

Description

Lead frame structure and semi-conductor package using it

The present invention relates to a lead frame structure and a semiconductor package using the same. More specifically, the semiconductor chip mounting area of the lead frame is replaced with a structure consisting of a tape and a conductive lead, thereby expanding the number of input / output terminals of the semiconductor chip and dissipating heat. The present invention relates to an easy lead frame structure and a semiconductor package using the same.

In general, a lead frame serves as a lead connecting an input / output pad of a semiconductor chip with an electric circuit formed on a main board and a frame for fixing a semiconductor package to the main board. It refers to a material to be performed, and the semiconductor package protects a semiconductor chip such as a single element, an integrated circuit, or a hybrid circuit in which various electronic circuits and wiring are formed from various external environments such as dust, moisture, electrical, mechanical load, and the like. In order to optimize and maximize the performance, the signal lead terminal to the main board is formed by using the above-described lead frame and the like and encapsulated using an encapsulant.

There are many kinds of the above-described lead frame and semiconductor package using the same, but recently, most of them are resin-encapsulated made of EMC (Epoxy Molding Compound), and are classified into an insert type and a surface mount if they are classified into a mounting type mounted on a main board. Types can be largely classified into types, and the typical insert types include SIP (Single Inline Package), DIP (Dual Inline Package), and surface mount types are SOP (Small Outline Package) and QFP (Quad Flat Package). Can be divided into

All of the above semiconductor packages are similar in shape (insertion type, surface mount type J type, Gull type) or lead number drawn out from the semiconductor package (Single, Dual, Quad), etc. In the following description, the prior art will be described based on QFP.

1 to 2 are plan views and cross-sectional views illustrating a structure of a conventional lead frame and a semiconductor package using the same.

As shown in FIG. 1, a conventional lead frame includes a quadrangular semiconductor chip mounting plate 110 ′ on which a semiconductor chip is mounted as copper (Cu) or alloy (Fe + Ni) material, and the semiconductor chip mounting plate ( A plurality of tie-bars 120 'for supporting and fixing 110', and a plurality of inner leads 130 'connected by conductive wires from respective input / output pads that are external terminals of the semiconductor chip; And an outer lead 140 'extending from the inner lead 130', and a dam bar 150 'which borders the inner lead 130' and the outer lead 140 '.

A conventional semiconductor package using the lead frame includes a tie bar 120 '(not shown) for supporting and fixing the semiconductor chip mounting plate 110' and a semiconductor chip 186 ', as shown in FIG. A plurality of inner leads 130 'connected by the conductive wires 182' from the input / output terminals, and extending from the inner leads 130 'to the outer surface of the encapsulant 188' to be externally connected. A plurality of external leads 140 'serving as terminals (pins), a semiconductor chip mounting plate 110' to which the semiconductor chip 186 'is fixed by an adhesive 184', and a semiconductor chip 186 '. And an encapsulant 188 'surrounding the conductive wire 182' and the inner lead 130 'and fixing the semiconductor chip 186' on the semiconductor chip 186 'and the semiconductor chip mounting plate 110'. The adhesive 184 ', circuit elements and wirings of various electric and electronic devices are stacked and integrated, and a plurality of input / output pads are formed of a semiconductor chip 186' formed on the surface thereof. There.

However, since the number of input / output of the semiconductor package using the conventional leadframe is determined by the number of wire-bonded internal leads, there is a limit in physically increasing the number and selecting another process such as BGA to obtain more input / output. And there is a problem that the lead frame in the package is difficult to dissipate the heat inside because there is no part in contact with the outside.

The present invention is to solve the above problems, by replacing the semiconductor chip mounting area of the lead frame with a structure consisting of a tape and a conductive lead to extend the number of input and output terminals of the semiconductor chip and expose the semiconductor chip mounting area to the outside The present invention provides a lead frame structure that facilitates heat dissipation and a semiconductor package using the same.

As a means for achieving the above object, the lead frame structure according to the present invention includes a support member on which a semiconductor chip is seated, a plurality of tie bars connected to each side of the support member to support and fix a central support member, and the support. An inner lead formed of a plurality of pins positioned at a predetermined distance away from the member and extending toward the support member; an outer lead extending outwardly from each of the inner leads; and vertically connected to the inner lead and the outer lead. It characterized in that it comprises a dam bar for supporting and separating the inner lead and the outer lead.

Hereinafter, a preferred embodiment of the present invention will be described with reference to the accompanying drawings.

3A is a plan view illustrating a leadframe structure according to an embodiment of the present invention. Referring to FIG. 3A, a support member 110 on which a semiconductor chip is seated, a plurality of tie bars 120 connected to each side of the support member to support and fix the center support member 110, and the support member ( An inner lead 130 formed of a plurality of pins positioned at a predetermined distance toward the support member 110 and extending toward the support member 110, and an outer lead 140 extending outward from each of the inner leads 130; It is characterized in that it comprises a dam bar 150 connected to the inner lead 130 and the outer lead 140 vertically to support and separate the inner lead 130 and the outer lead 140.

3B is a cross-sectional view taken along line AA ′ of FIG. 3A.

3C is an exploded perspective view and perspective view of FIG. 3B.

The support member 110, referring to Figure 3b to 3c,

The non-conductive lower tape pad 114 is formed in a substantially rectangular line shape with a plurality of holes having a predetermined size to which a solder ball for a ball grid array (BGA) is attached. The conductive lead 111 having the same number as the holes formed in the lower tape pad 114 and having a length of a predetermined length remaining after independently covering a hole in the upper portion of the lower tape pad 114 with a long rectangular plate shape. ), A rectangular non-conductive intermediate tape pad 115 having the same height as that of the conductive lead 111 and filling the inside surrounded by the conductive lead 111, and only a portion of the conductive lead 111 is exposed. Part of the furnace conductive lead 111 and the intermediate tape 115 is characterized by consisting of a non-conductive upper tape pad 116 of the rectangular plate shape.

Hereinafter, another preferred embodiment of the present invention will be described with reference to the accompanying drawings.

Figure 4a is a plan view showing a lead frame structure according to another embodiment of the present invention. Referring to FIG. 4A, a lead frame structure according to the present invention includes a support member 310 on which a semiconductor chip is to be seated, and a plurality of tie bars connected to corners of each side to support and fix the center support member 310. 320, an inner lead 330 having a plurality of pin shapes connected to the center supporting member by a conductive wire from an input / output end of the semiconductor chip, and an outer portion of each inner lead 330; It includes an outer lead 340 extending to the, and the dam bar 350 that is vertically connected to the inner lead 330 and the outer lead 340 to support and separate the inner lead 330 and the outer lead 340 It is characterized by what has been done.

4B is a cross-sectional view taken along line BB ′ of FIG. 4A.

4C is an exploded perspective view and perspective view of FIG. 4B.

4B to 4C, the tape pad 314 having a 'T' shaped groove formed therein penetrating the upper and lower portions and having an upper groove larger than the lower groove, and the tape The conductive lead 311 has the same number as the holes created in the pad 314 and has a size and shape such that the hole is completely inserted into the 'T'-shaped hole.

In order to achieve the above object, a structure of a semiconductor package according to the present invention includes a support member on which a semiconductor chip is to be seated, a plurality of tie bars connected to each side of the support member to support the support member, and the semiconductor chip; A plurality of downbonding wires for down-bonding the support member to electrically connect the plurality of down-bonding wires, a plurality of inner leads arranged at a predetermined interval around the support member, and extended to the inner leads to be exposed to the outside of the package and bent downward The outer lead, the normal bonding wire for electrically connecting the semiconductor chip and the inner lead, and the lower portion of the support member is characterized in that it consists of an encapsulant that wraps all materials except the outer lead.

5A is a cross-sectional view illustrating a semiconductor package using the leadframe structure illustrated in FIGS. 3A to 3C. Referring to FIG. 5A, a lower tape pad 114 having a thickness such that a solder ball 112 is inserted to expose a bottom surface of a semiconductor package and a portion of the solder ball 112 is exposed, and the lower tape pad is formed. A conductive lead 111 made of copper which covers the upper portion of the hole formed in the 114 and has a predetermined excess size and is downbonded with the semiconductor chip and the lower portion of the portion covering the hole is in contact with the solder ball 112. And a solder ball 112 inserted into a hole of the lower tape pad 114 and contacting a lower portion of the conductive lead 111 to electrically connect the inside and the outside of the package, and the same height as the conductive lead 111. And a rectangular non-conductive intermediate tape pad 115 filling the inside surrounded by the conductive lead 111 and exposing a portion of the conductive lead 111 and covering the unexposed portion and the intermediate tape pad 115. Non-conducting adults The sub tape pad 116, the semiconductor chip 186 seated on the upper tape pad 116, and the down bonding wire 113 for down-bonding the conductive lead 111 and the semiconductor chip 186. And an inner lead extending toward the semiconductor chip 186 and being normal bonded to the semiconductor chip 186, and an outer lead extending to the inner lead 130 to be exposed to the outside of the package and bent downward. 140, the normal bonding wire 182 electrically connecting the semiconductor chip 186 and the inner lead 130, and the lower tape pad 114 to be exposed to the outside, excluding the outer lead 140. It is characterized by consisting of a sealing material 188 surrounding the material.

FIG. 5B is a bottom view illustrating a lower portion of a semiconductor package using the lead frame structure shown in FIGS. 3A to 3C.

A bottom view of a semiconductor package according to an embodiment of the present invention.

The lower tape 114 is exposed to the lower portion of the semiconductor package, and the solder balls 12 are inserted into the holes of the exposed lower tape 114 to be attached to the conductive leads 111 therein. The attached solder ball 112 is larger than the thickness of the lower tape pad 114 and is exposed to the outside of the package.

6A is a cross-sectional view illustrating a semiconductor package using the leadframe structure illustrated in FIGS. 4A to 4C.

Referring to FIG. 6A, a tape pad 314 having a hole exposed to a bottom surface of a semiconductor package and having a solder ball 312 attached thereto is formed, and a 'T' shaped hole formed in the tape pad 314. A conductive ball 312 inserted into the conductive lead 311, a solder ball 312 attached to a lower portion of the conductive lead 311 inserted into the hole of the tape pad 314, and electrically connecting the inside and the outside of the package; An adhesive 384 for fixing the semiconductor chip 386 to be seated on the tape pad 314 into which the 311 is inserted and preventing electrical connection, and leaving a part of the conductive lead 311 with the adhesive ( The semiconductor chip 386 fixed to the tape pad 314 by the 384, a down bonding wire 313 for down-bonding the conductive lead 311 and the semiconductor chip 386, and the semiconductor chip 386. Internally extending toward) and normal bonding with semiconductor chip 386 330, an external lead 340 which extends to the inner lead 330, is exposed to the outside of the package, and is bent downward, and electrically connects the semiconductor chip 386 and the inner lead 330. A bonding wire 382 and the lower tape pad 314 are exposed to the outside, and an encapsulant 388 encapsulating a material except the outer lead 340.

FIG. 6B is a bottom view illustrating a lower portion of a semiconductor package using the leadframe structure illustrated in FIGS. 4A to 4C.

A bottom view of a semiconductor package according to another embodiment of the present invention.

The tape pad 114 is exposed to the bottom of the semiconductor package and is attached to the bottom of the conductive lead inserted into the lower tape pad 114 where the solder balls 112 are exposed. The solder ball 112 is completely exposed to the bottom of the package.

As described in the above embodiment, the present invention replaces the pad of the existing leadframe with a non-conductive tape pad having holes and conductive leads, thereby extracting the input / output end of the package to increase the number of input / output of the package. And the support member is exposed to the bottom of the package, thereby facilitating heat dissipation in the package.

1 is a plan view showing a conventional lead frame structure.

2 is a cross-sectional view showing a conventional semiconductor package.

3A is a plan view illustrating a leadframe structure according to an embodiment of the present invention.

3B is a cross-sectional view taken along line AA ′ of FIG. 3A.

3C is an exploded perspective view and perspective view of FIG. 3B.

Figure 4a is a plan view showing a lead frame structure according to another embodiment of the present invention.

4B is a cross-sectional view taken along line BB ′ of FIG. 4A.

4C is an exploded perspective view and perspective view of FIG. 4B.

5A is a cross-sectional view illustrating a semiconductor package using the leadframe structure illustrated in FIGS. 3A to 3C.

FIG. 5B is a bottom view of a lower portion of a semiconductor package using the leadframe structure shown in FIGS. 3A to 3C.

6A is a cross-sectional view illustrating a semiconductor package using the leadframe structure illustrated in FIGS. 4A to 4C.

FIG. 6B is a bottom view illustrating a lower portion of a semiconductor package using the leadframe structure illustrated in FIGS. 4A to 4C.

<Description of the symbols for the main parts of the drawings>

110: support member 120: tie bar

130: inner lead 140: outer lead

150: dambar

111: conductive lead 112: solder ball

114: lower tape pad 115: intermediate tape pad

116: upper tape pad

113: down bonding wire 182: normal bonding wire

186 semiconductor chip 188 encapsulant

Claims (6)

A support member on which the semiconductor chip is to be seated, A plurality of tie bars connected to corners of each side of the support member to support and fix the support member located at the center; A plurality of internal leads formed in a pin shape toward the support member and spaced apart from each other by a conductive wire from an input / output terminal of the semiconductor chip; An outer lead extending outwardly from each of the inner leads; A lead frame structure comprising a dam bar connected vertically to the inner lead and the outer lead to support and separate the inner lead and the outer lead. The method of claim 1, wherein the support member Non-conductive lower tape pads formed in a substantially rectangular line shape with a plurality of holes having a predetermined size such that a solder ball for a ball grid array (BGA) is attached, and A conductive lead having the same number as the holes of the lower tape pad and having a length of a predetermined length remaining after independently covering the upper hole of the lower tape pad with a long rectangular plate shape; A rectangular non-conductive intermediate tape pad that fills the interior surrounded by the conductive lead and the rectangular plate covering a portion of the conductive lead and the intermediate tape while exposing only a portion of the conductive lead. A leadframe structure comprising a top tape pad that is nonconductive in shape. The method of claim 1, wherein the support member A tape pad having a T-shaped groove penetrating the upper and lower portions and having an upper groove larger than the lower groove, and a tape pad having the same number as the holes formed in the tape pad and inserted completely into the T-shaped hole. A lead frame structure comprising a conductive lead having a size and shape as large as possible. A support member on which the semiconductor chip is to be seated, Several tie bars connected to each side of the support member to support the support member; A down bonding wire which electrically connects the semiconductor chip to the support member by down bonding; An inner lead which is arranged at a predetermined interval around the support member; An outer lead extending to the inner lead to be exposed to the outside of the package and bent downward; A plurality of normal bonding wires electrically connecting the semiconductor chip and the inner lead; A semiconductor package, characterized in that the sealing member for exposing the lower portion of the support member to the outside and wrap all materials except the outer lead. The method of claim 4, wherein the support member A non-conductive lower tape pad exposed to the bottom surface of the semiconductor package and having a hole inserted into the bottom surface of the package and having a thickness such that a portion of the solder ball is exposed; A conductive lead that covers the upper portion of the hole formed in the lower tape pad and has a predetermined extra remaining size and is downbonded with the semiconductor chip, and the lower portion of the portion covering the hole is in contact with the solder ball; A solder ball inserted into a hole of the lower tape pad and contacting a lower portion of the conductive lead to electrically connect the inside and the outside of the package; A non-conductive intermediate tape pad having the same height as the conductive lead and filling the inside surrounded by the conductive lead, And a nonconductive upper tape pad exposing a portion of the conductive lead and covering an unexposed portion and an intermediate tape pad. The method of claim 4, wherein the support member A tape pad exposed to the bottom of the semiconductor package and having holes for attaching solder balls to the bottom of the package; A conductive lead inserted into a 'T' shaped hole formed in the tape pad; And a solder ball attached to a lower portion of the conductive lead inserted into the hole of the tape pad and electrically connecting the inside and the outside of the package.