KR20050001798A - Circuit and method for detecting address in pre-groove signal of wobble detection system of optical disc device - Google Patents

Abstract

PURPOSE: An ADIP(Address in Pre-groove) signal detecting circuit and method is provided to exactly and quickly detect non-continuous points, and to easily implement an integrated circuit. CONSTITUTION: The circuit comprises a delayer(31), the first window comparator(32), the second window comparator(33), the first edge detector(34), the second edge detector(35), the first non-continuous point checker(36), and the second non-continuous point checker(37). The delayer(31) delays a wobble signal by a predetermined time. The first window comparator(32) compares the wobble signal with a positive reference level and a negative reference level, and outputs the first comparison signal and the second comparison signal. The second window comparator(33) compares an output signal of the delayer(31) with the positive reference signal and the negative reference signal, and outputs the third comparison signal and the fourth comparison signal. The first edge detector(34) receives the first and the third comparison signal, and detects edges of the first comparison signal. The second edge detector(35) receives the second and the fourth comparison signal, and detects edges of the second comparison signal. The first non-continuous point checker(36) generates a signal corresponding to a positive non-continuous point of the wobble signal if there exist two continuous edges within a certain time interval among the edges detected by the first edge detector(34). The second non-continuous point checker(37) generates a signal corresponding to a negative non-continuous point of the wobble signal if there exist two continuous edges in a certain time interval among the edges detected by the second edge detector(35).

Description

Circuit and method for detecting address in pre-groove signal of wobble detection system of optical disc device}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wobble detection system of an optical disk device such as a DVD + R / RW, and more particularly, to an address in pre-groove signal detection circuit and a detection method of a wobble detection system.

In order to record a DVD + R / RW, it is very important to accurately demodulate the disc address information of the DVD + R / RW, that is, the ADIP. If demodulation of the disk address information is not performed properly, not only the recording quality is deteriorated but also the data recorded on the disk may not be read.

However, as shown in FIG. 1, the ADIP signal has a discontinuity point unlike the ATIP (Absolute Time In Pre-groove) signal of the CD. This discontinuity point represents the data of the ADIP unit in the ADIP Modulation Rules, so its detection is most important.

2 is a block diagram showing a wobble detection system of a general DVD + R / RW. Referring to this, the wobble detection circuit 22 receives a signal input from the optical pick-up unit (OPU) 21 to detect the wobble signal WB, and the ADIP signal detection circuit 23 receives the wobble signal WB. Receive the ADIP signal (ADIP). The ADIP signal ADIP is decoded by the ADIP decoder 24.

However, as described above, since there are discontinuities in the ADIP signal, the ADIP signal detection circuit 23 needs to detect this discontinuity point quickly and accurately. In addition, the ADIP signal detection circuit 23 should be easy to implement because the circuit is simple when implemented as an integrated circuit.

Therefore, the technical problem to be achieved by the present invention, ADIP signal detection that can detect the discontinuity point quickly and accurately in the wobble detection system of the optical disk device, such as DVD + R / RW, and also the circuit is simple and can be easily implemented as an integrated circuit To provide a circuit.

Another technical problem to be solved by the present invention is to provide a method for detecting an ADIP signal that can accurately detect a discontinuity point in a wobble detection system of an optical disk device such as a DVD + R / RW and can be easily implemented in an integrated circuit. There is.

BRIEF DESCRIPTION OF THE DRAWINGS In order to better understand the drawings cited in the detailed description of the invention, a brief description of each drawing is provided.

1 is a diagram showing waveform diagrams of an ATIP signal of a CD and an ADIP signal of a DVD + R / RW.

2 is a block diagram showing a wobble detection system of a general DVD + R / RW.

3 is a block diagram showing an ADIP signal detection circuit according to a first embodiment of the present invention.

4 is a diagram illustrating waveforms of signals when the ADIP signal detection circuit of FIG. 3 detects a positive discontinuity point.

5 is a diagram illustrating waveforms of signals when the ADIP signal detection circuit of FIG. 3 detects a negative discontinuity point.

6 is a block diagram showing an ADIP signal detection circuit according to a second embodiment of the present invention.

According to an aspect of the present invention for achieving the above technical problem, an ADIP signal detection circuit includes a delayer, a first window comparator, a second window comparator, a first edge detection circuit, a second edge detection circuit, and a first discontinuity. And a point determining circuit, a second discontinuous point determining circuit, an ADIP signal generator, and a reference level adjusting circuit.

The delay unit delays the wobble signal by a predetermined time. The first window comparator generates a first comparison signal by comparing a positive reference level and the wobble signal, and generates a second comparison signal by comparing a negative reference level and the wobble signal. The second window comparator generates a third comparison signal by comparing the positive reference level with the output signal of the delayer, and generates a fourth comparison signal by comparing the negative reference level with the output signal of the delayer.

The first edge detection circuit receives the first comparison signal and the third comparison signal to detect edges of the first comparison signal. The second edge detection circuit receives the second comparison signal and the fourth comparison signal to detect edges of the second comparison signal.

The first discontinuity point determination circuit generates a signal corresponding to the positive discontinuity point of the wobble signal when two consecutive edges among the edges detected by the first edge detection circuit exist within a predetermined time interval. The second discontinuity determination circuit generates a signal corresponding to the negative discontinuity point of the wobble signal when two consecutive edges among the edges detected by the second edge detection circuit exist within the predetermined predetermined time interval. .

The ADIP signal generator receives the signal corresponding to the positive discontinuity point of the wobble signal and the signal corresponding to the negative discontinuity point of the wobble signal to generate the address in pre-groove signal. The reference level adjusting circuit adjusts the positive reference level and the negative reference level.

The edges are positive edges or negative edges.

According to another aspect of the present invention for achieving the above technical problem, an ADIP signal detection circuit includes a window comparator, a first edge detection circuit, a second edge detection circuit, a first discontinuity point determination circuit, and a second discontinuity point determination. A circuit, an ADIP signal generator, and a reference level control circuit.

The window comparator generates a first comparison signal by comparing a positive reference level and a wobble signal, and generates a second comparison signal by comparing a negative reference level and the wobble signal. The first edge detection circuit receives the first comparison signal and detects edges of the first comparison signal. The second edge detection circuit receives the second comparison signal and detects edges of the second comparison signal.

The first discontinuity point determination circuit generates a signal corresponding to the positive discontinuity point of the wobble signal when two consecutive edges among the edges detected by the first edge detection circuit exist within a predetermined time interval. The second discontinuity determination circuit generates a signal corresponding to the negative discontinuity point of the wobble signal when two consecutive edges among the edges detected by the second edge detection circuit exist within the predetermined predetermined time interval. .

The ADIP signal generator receives the signal corresponding to the positive discontinuity point of the wobble signal and the signal corresponding to the negative discontinuity point of the wobble signal to generate the address in pre-groove signal. The reference level adjusting circuit adjusts the positive reference level and the negative reference level.

The edges are positive edges or negative edges.

According to an aspect of the present invention, an ADIP signal detection method includes generating a first comparison signal by comparing a positive reference level and a wobble signal, and comparing the negative reference level with the wobble signal. Generating a comparison signal.

The wobble signal is delayed by a predetermined time. The positive reference level and the output signal of the delayer are compared with each other to generate a third comparison signal, and the negative reference level and the output signal of the delayer are compared with each other to generate a fourth comparison signal.

Next, the edges of the first comparison signal are detected by receiving the first comparison signal and the third comparison signal, and the edges of the second comparison signal are detected by receiving the second comparison signal and the fourth comparison signal. .

Next, a signal corresponding to the positive discontinuity point of the wobble signal is generated when two consecutive edges of the detected edges of the first comparison signal exist within a predetermined time interval. The signal corresponding to the negative discontinuity point of the wobble signal is generated when two consecutive edges of the detected edges of the second comparison signal exist within the predetermined predetermined time interval.

Next, an ADIP (Address in pre-groove) signal is generated by receiving a signal corresponding to a positive discontinuity point of the wobble signal and a signal corresponding to a negative discontinuity point of the wobble signal.

The edges are positive edges or negative edges.

According to another aspect of the present invention, an ADIP signal detection method includes generating a first comparison signal by comparing a positive reference level and a wobble signal, and comparing a negative reference level and the wobble signal. Generating a second comparison signal.

Next, the edges of the first comparison signal are detected by receiving the first comparison signal, and the edges of the second comparison signal are detected by receiving the second comparison signal.

Next, a signal corresponding to the positive discontinuity point of the wobble signal is generated when two consecutive edges of the detected edges of the first comparison signal exist within a predetermined time interval. The signal corresponding to the negative discontinuity point of the wobble signal is generated when two consecutive edges of the detected edges of the second comparison signal exist within the predetermined predetermined time interval.

Next, a signal corresponding to a positive discontinuity point of the wobble signal and a signal corresponding to a negative discontinuity point of the wobble signal are received to generate the address in pre-groove (ADIP) signal.

The edges are positive edges or negative edges.

In order to fully understand the present invention, the operational advantages of the present invention, and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings illustrating preferred embodiments of the present invention and the contents described in the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals in the drawings denote like elements.

3 is a block diagram showing an ADIP signal detection circuit according to a first embodiment of the present invention.

Referring to FIG. 3, the ADIP signal detection circuit according to the first embodiment of the present invention may include a delay unit 31, a first window comparator 32, a second window comparator 33, and a first edge detection circuit 34. ), A second edge detection circuit 35, a first discontinuity point determination circuit 36, a second discontinuity point determination circuit 37, a reference level control circuit 38, and an ADIP signal generator 39. .

The delay unit 31 delays the wobble signal WB input through the wobble detection circuit (not shown) by a predetermined time. The retarder 31 may be composed of a low pass filter (LPF) or a digital phase delay element. Here, the delay time of the delay unit 31 is related to the response speed of the signal. If the delay time is too large, the discontinuity may not be detected properly, so the delay time should not be too large.

The first window comparator 32 compares the positive reference level REFP and the wobble signal WB to generate a first comparison signal CP1 and generates the negative reference level RENP and the wobble signal WB. In comparison, the second comparison signal CN1 is generated. The second window comparator 33 compares the positive reference level REFP and the output signal DWB of the delay unit 31 to generate a third comparison signal CP2, and generates the negative reference level RENP and the delay unit 31. Output signal DWB is compared to generate a fourth comparison signal CN2.

The positive reference level REFP and the negative reference level REREF are adjusted by the reference level adjusting circuit 38. The positive reference level (REFP) and the negative reference level (REFN) are closely related to the detection speed of the ADIP signal (ADIP) and related to the accurate detection of the signal. Therefore, it is necessary to find the optimal level for fast detection speed and prevention of false detection.

The first edge detection circuit 34 and the first discontinuity point determination circuit 36 are for finding discontinuities in the positive data of the wobble signal WB, and the second edge detection circuit 35 and the second discontinuity point determination are determined. The circuit 37 is for finding the discontinuities in the negative data of the wobble signal WB.

The first edge detection circuit 34 receives the first comparison signal CP1 and the third comparison signal CP2 to detect edges of the first comparison signal CP1. The second edge detection circuit 35 receives the second comparison signal CN1 and the fourth comparison signal CN2 to detect edges of the second comparison signal CN1. Here, the first edge detection circuit 34 and the second edge detection circuit 35 may be configured to detect positive edges or may be configured to detect negative edges as needed.

The first discontinuity point determination circuit 36 corresponds to the positive discontinuity point of the wobble signal WB when two consecutive edges among the edges detected by the first edge detection circuit 34 exist within a predetermined time interval. To generate a signal P1. That is, when the two consecutive edges exist within a predetermined time period, it is determined that a discontinuity point exists in the positive data of the wobble signal WB.

The second discontinuity point determination circuit 37 is connected to the negative discontinuity point of the wobble signal WB when two consecutive edges among the edges detected by the second edge detection circuit 35 exist within the predetermined predetermined time interval. Generate the corresponding signal P2. That is, when the two consecutive edges exist within a predetermined time interval, it is determined that a discontinuity point exists in the negative data of the wobble signal WB.

The ADIP signal generator 39 receives a signal P1 corresponding to the positive discontinuity point of the wobble signal and a signal P2 corresponding to the negative discontinuity point of the wobble signal, thereby receiving an ADIP (Address in pre-groove) signal (ADIP). Occurs.

More specifically, the first edge detection circuit 34 may include an exclusive OR circuit 341 that exclusively ORs the first comparison signal CP1 and the third comparison signal CP2, and an exclusive OR circuit 341. Logical AND circuit 342 for logical ANDing the output signal E1 and the third comparison signal CP2.

Here, the first edge detection circuit 34 is configured to detect negative edges. The first edge detection circuit 34 may be configured to detect the positive edges, in which case the first comparison signal CP1 is input to the AND circuit 342 instead of the third comparison signal CP2.

The second edge detection circuit 35 includes an exclusive OR circuit 351 for exclusive OR of the second comparison signal CN1 and the fourth comparison signal CN2, and an output signal of the exclusive OR circuit 351. A logical AND circuit 352 for ANDing the E2 and the fourth comparison signal CN2 is provided.

Here, the second edge detection circuit 35 is configured to detect negative edges. The second edge detection circuit 35 may be configured to detect the positive edges, in which case the second comparison signal CN1 is input to the AND circuit 352 instead of the fourth comparison signal CN2.

The first discontinuity point determination circuit 36 flips in response to the clock signal CLK and a flip-flop 361 that receives the output signal A1 of the first edge detection circuit 34 in response to the clock signal CLK. A counter 362 for counting the output signal of the flop 361 is provided. The counter 362 counts the edges detected by the first edge detection circuit 34 in response to the clock signal CLK to the positive discontinuity when two consecutive edges exist within the predetermined time period. Generate the corresponding signal P1.

The second discrete point determination circuit 37 flips in response to the clock signal CLK and a flip-flop 371 that receives the output signal A2 of the second edge detection circuit 35 in response to the clock signal CLK. A counter 372 for counting the output signal of the flop 371 is provided. The counter 372 counts the edges detected by the second edge detection circuit 35 in response to the clock signal CLK to correspond to the negative discontinuity when two consecutive edges exist within the predetermined time period. To generate a signal P2. The clock signal CLK is related to the speed of the DVD + R / RW system to be implemented.

4 is a diagram illustrating waveforms of signals when the ADIP signal detection circuit of FIG. 3 detects a positive discontinuity point, and FIG. 5 is a waveform diagram of each signal when the ADIP signal detection circuit of FIG. 3 detects a negative discontinuity point. It is a figure which shows a figure.

Hereinafter, the ADIP signal detection method of the present invention performed in the ADIP signal detection circuit according to the first embodiment described above with reference to the waveform diagram of FIG. 4 and the waveform diagram of FIG.

First, when the wobble signal WB is input through a wobble detection circuit (not shown), a delayed wobble signal DWB is generated by the delayer 31 for a predetermined time. The wobble signal WB is compared with the positive reference level REFP at the first window comparator 32, and as a result, the first comparison signal CP1 is generated. In addition, the wobble signal WB is compared with the negative reference level REFN in the first window comparator 32, and as a result, the second comparison signal CN1 is generated.

The delayed wobble signal DWB is compared with the positive reference level REFP in the second window comparator 33, and as a result, the third comparison signal CP2 is generated. In addition, the delayed wobble signal DWB is compared with the negative reference level REFN in the second window comparator 33, and as a result, the fourth comparison signal CN2 is generated.

The first comparison signal CP1 and the third comparison signal CP2 are then exclusive ORed by the exclusive OR circuit 341 of the first edge detection circuit 34 and output signal E1 of the exclusive OR circuit 341. Is logically multiplied with the third comparison signal CP2 by the AND circuit 342. As a result, a signal A1 having pulses representing falling edges of the first comparison signal CP1 is generated.

The signal A1 is input to the counter 362 via the flip-flop 361 of the first discontinuity point determination circuit 36. The counter 362 generates a signal P1 corresponding to the positive discontinuity point of the wobble signal WB when two consecutive pulses of the pulses of the signal A1 exist within a predetermined predetermined time interval. That is, when the two consecutive pulses exist within a predetermined time period, it is determined that a discontinuity point exists in the positive data of the wobble signal WB.

On the other hand, the second comparison signal CN1 and the fourth comparison signal CN2 are exclusive-OR by the exclusive-OR circuit 351 of the second edge detection circuit 35, and the output signal E2 of the exclusive-OR circuit 351 is The AND product 352 performs an AND operation on the fourth comparison signal CN2. As a result, a signal A2 having pulses representing falling edges of the second comparison signal CN1 is generated.

The signal A2 is input to the counter 372 via the flip-flop 371 of the second discontinuous point determination circuit 37. The counter 372 generates a signal P2 corresponding to the negative discontinuity of the wobble signal WB when two consecutive pulses of the pulses of the signal A2 exist within a predetermined predetermined time interval. That is, when the two consecutive pulses exist within a predetermined time interval, it is determined that a discontinuity point exists in the negative data of the wobble signal WB.

The signal P1 corresponding to the positive discontinuity point of the wobble signal WB and the signal P2 corresponding to the negative discontinuity point of the wobble signal WB are input to the ADIP signal generator 39. By the ADIP signal generator 39, the final signal ADIP becomes logic "low" at the rising edge of the signal P2 and becomes logic "high" at the rising edge of the signal P1. In other words, the final signal ADIP becomes logic "low" when there is a negative discontinuity point in the wobble signal WB and becomes logic "high" when there is a positive discontinuity point in the wobble signal WB.

6 is a block diagram showing an ADIP signal detection circuit according to a second embodiment of the present invention.

Referring to FIG. 6, the ADIP signal detection circuit according to the second embodiment of the present invention may include a window comparator 61, a first edge detection circuit 62, a second edge detection circuit 63, and a first discontinuity point determination. A circuit 64, a second discontinuous point determination circuit 65, a reference level adjusting circuit 66, and an ADIP signal generator 67.

The ADIP signal detection circuit according to the second embodiment has the same operation as that of the ADIP signal detection circuit according to the first embodiment shown in FIG.

The window comparator 61 generates a first comparison signal CP by comparing the positive reference level REFP and the wobble signal WB, and compares the second reference signal by comparing the negative reference level REFN and the wobble signal WB. (CN) occurs. The positive reference level REFP and the negative reference level REREF are adjusted by the reference level adjusting circuit 66.

The first edge detection circuit 62 and the first discontinuity point determination circuit 64 are for finding discontinuities in the positive data of the wobble signal WB, and the second edge detection circuit 63 and the second discontinuity point determination are determined. The circuit 65 is for finding discontinuities in the negative data of the wobble signal WB.

The first edge detection circuit 62 receives the first comparison signal CP to detect edges of the first comparison signal CP. The second edge detection circuit 63 receives the second comparison signal CN to detect edges of the second comparison signal CN. The first edge detection circuit 62 and the second edge detection circuit 63 may be configured to detect positive edges or may be configured to detect negative edges as needed.

Here, the first edge detection circuit 62 is configured to detect negative edges and includes a delay 621, an exclusive OR circuit 622, and an AND circuit 623. The delay unit 621 delays the first comparison signal CP by a predetermined time. The exclusive OR circuit 622 performs an exclusive OR on the first comparison signal CP and the output signal of the delay unit 621. The AND circuit 623 ANDs the output signal of the exclusive OR circuit 622 and the output signal of the delay unit 621.

When the first edge detection circuit 62 is configured to detect the positive edges, the first comparison signal CP is input to the AND circuit 623 instead of the output signal of the delay unit 621.

The second edge detection circuit 63 is configured to detect negative edges and includes a delay 631, an exclusive OR circuit 632, and an AND circuit 633. The delay unit 631 delays the second comparison signal CN by a predetermined time. The exclusive OR circuit 632 performs an exclusive OR on the second comparison signal CN and the output signal of the delay unit 631. The AND circuit 633 logically multiplies the output signal of the exclusive OR circuit 632 with the output signal of the delay unit 631.

When the second edge detection circuit 63 is configured to detect the positive edges, the second comparison signal CN is input to the logical product circuit 633 instead of the output signal of the delay unit 631.

The first discontinuity point determination circuit 64 has a flip-flop 641 and a counter 642 and performs the same operation as in the first embodiment. That is, the first discontinuity point determination circuit 64 is located at the positive discontinuity point of the wobble signal WB when two consecutive edges among the edges detected by the first edge detection circuit 62 exist within a predetermined time interval. Generate the corresponding signal P1.

The second discontinuity determination circuit 65 has a flip-flop 651 and a counter 652 as in the first embodiment and performs the same operation. That is, the second discontinuity point determination circuit 65 may generate a negative discontinuity point of the wobble signal WB when two consecutive edges among the edges detected by the second edge detection circuit 63 exist within the predetermined time period. It generates a signal P2 corresponding to.

The ADIP signal generator 67 receives the signal P1 corresponding to the positive discontinuity point of the wobble signal and the signal P2 corresponding to the negative discontinuity point of the wobble signal, as in the first embodiment, and receives the ADIP (Address in pre). Generate the -groove signal (ADIP).

The ADIP signal detection method performed in the ADIP signal detection circuit according to the second embodiment described above is almost similar to the ADIP signal detection method performed in the ADIP signal detection circuit according to the first embodiment, and thus the detailed description thereof will be omitted.

The best embodiment has been disclosed in the drawings and specification above. Although specific terms have been used herein, they are used only for the purpose of describing the present invention and are not intended to limit the scope of the invention as defined in the claims or the claims. Therefore, those skilled in the art will understand that various modifications and equivalent other embodiments are possible from this. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

As described above, the ADIP signal detection circuit of the present invention implemented according to the ADIP signal detection method of the present invention includes one or two window comparators, two edge detection circuits each consisting of an exclusive OR circuit and an AND circuit, respectively. Two discontinuity point determination circuits comprising a flip-flop and a counter are provided. Therefore, since the circuit is simple, it can be easily implemented as an integrated circuit, and the operation speed is high, so that the discontinuity point can be detected accurately and quickly.

Claims (32)

In the ADIP (Address in pre-groove) signal detection circuit of the wobble detection system of the optical disk device, A delayer for delaying the wobble signal by a predetermined time; A first window comparator for generating a first comparison signal by comparing a positive reference level and the wobble signal and generating a second comparison signal by comparing a negative reference level and the wobble signal; A second window comparator for generating a third comparison signal by comparing the positive reference level and the output signal of the delayer, and generating a fourth comparison signal by comparing the negative reference level and the output signal of the delayer; A first edge detection circuit receiving the first comparison signal and the third comparison signal and detecting edges of the first comparison signal; A second edge detection circuit configured to receive the second comparison signal and the fourth comparison signal and detect edges of the second comparison signal; A first discontinuity point determination circuit that generates a signal corresponding to a positive discontinuity point of the wobble signal when two consecutive edges among the edges detected by the first edge detection circuit exist within a predetermined time interval; And And a second discontinuity point determination circuit that generates a signal corresponding to a negative discontinuity point of the wobble signal when two consecutive edges among the edges detected by the second edge detection circuit exist within the predetermined predetermined time interval. ADIP signal detection circuit, characterized in that. The circuit of claim 1, wherein the ADIP signal detection circuit comprises: And a reference level control circuit for adjusting the positive reference level and the negative reference level. The circuit of claim 1, wherein the ADIP signal detection circuit comprises: And an ADIP signal generator configured to receive a signal corresponding to a positive discontinuity point of the wobble signal and a signal corresponding to a negative discontinuity point of the wobble signal to generate the address in pre-groove signal. ADIP signal detection circuit. 2. The ADIP signal detection circuit of claim 1, wherein the edges are positive edges or negative edges. The method of claim 1, wherein the first edge detection circuit, An exclusive OR circuit for performing an exclusive OR on the first comparison signal and the third comparison signal; And And an AND logic circuit for ANDing the output signal of the exclusive OR circuit and the first or third comparison signal. The circuit of claim 1, wherein the first discontinuity point determination circuit comprises: And a counter that counts the edges detected by the first edge detection circuit in response to a clock signal and generates a signal corresponding to the positive discontinuity when two consecutive edges exist within the predetermined time period. ADIP signal detection circuit characterized in. The method of claim 1, wherein the second edge detection circuit, An exclusive OR circuit for performing an exclusive OR on the second comparison signal and the fourth comparison signal; And And an AND logic circuit for ANDing the output signal of the exclusive OR circuit and the second or fourth comparison signal. The circuit of claim 1, wherein the second discontinuity point determination circuit comprises: And a counter that counts the edges detected by the second edge detection circuit in response to a clock signal and generates a signal corresponding to the negative discontinuity when two consecutive edges exist within the predetermined time period. ADIP signal detection circuit characterized in. In the ADIP (Address in pre-groove) signal detection circuit of the wobble detection system of the optical disk device, A window comparator for generating a first comparison signal by comparing a positive reference level and a wobble signal and generating a second comparison signal by comparing a negative reference level and the wobble signal; A first edge detection circuit receiving the first comparison signal and detecting edges of the first comparison signal; A second edge detection circuit receiving the second comparison signal and detecting edges of the second comparison signal; A first discontinuity point determination circuit that generates a signal corresponding to a positive discontinuity point of the wobble signal when two consecutive edges among the edges detected by the first edge detection circuit exist within a predetermined time interval; And And a second discontinuity point determination circuit that generates a signal corresponding to a negative discontinuity point of the wobble signal when two consecutive edges among the edges detected by the second edge detection circuit exist within the predetermined predetermined time interval. ADIP signal detection circuit, characterized in that. The method of claim 9, wherein the ADIP signal detection circuit, And a reference level control circuit for adjusting the positive reference level and the negative reference level. The method of claim 9, wherein the ADIP signal detection circuit, And an ADIP signal generator configured to receive a signal corresponding to a positive discontinuity point of the wobble signal and a signal corresponding to a negative discontinuity point of the wobble signal to generate the address in pre-groove signal. ADIP signal detection circuit. 10. The ADIP signal detection circuit of claim 9, wherein the edges are positive edges or negative edges. The method of claim 9, wherein the first edge detection circuit, A delayer for delaying the first comparison signal by a predetermined time; An exclusive-OR circuit for exclusively ORing the first comparison signal and the output signal of the delayer; And And an AND logic circuit for ANDing the output signal of the exclusive OR circuit and the output signal of the first comparison signal or the delay unit. The circuit of claim 9, wherein the first discontinuity point determination circuit comprises: And a counter that counts the edges detected by the first edge detection circuit in response to a clock signal and generates a signal corresponding to the positive discontinuity when two consecutive edges exist within the predetermined time period. ADIP signal detection circuit characterized in. The method of claim 9, wherein the second edge detection circuit, A delayer for delaying the second comparison signal by a predetermined time; An exclusive OR circuit for exclusively ORing the second comparison signal and the output signal of the delayer; And And an AND-circuit circuit for performing an AND operation on the output signal of the exclusive OR circuit and the output signal of the second comparison signal or the delay unit. The circuit of claim 9, wherein the second discontinuity point determination circuit comprises: And a counter that counts the edges detected by the second edge detection circuit in response to a clock signal and generates a signal corresponding to the negative discontinuity when two consecutive edges exist within the predetermined time period. ADIP signal detection circuit characterized in. In the ADIP (Address in pre-groove) signal detection method of the wobble detection system of the optical disk device, Delaying the wobble signal by a predetermined time; Generating a first comparison signal by comparing a positive reference level and the wobble signal, and generating a second comparison signal by comparing a negative reference level and the wobble signal; Generating a third comparison signal by comparing the positive reference level with the output signal of the delayer, and generating a fourth comparison signal by comparing the negative reference level with the output signal of the delayer; Receiving edges of the first comparison signal by receiving the first comparison signal and the third comparison signal; Receiving edges of the second comparison signal by receiving the second comparison signal and the fourth comparison signal; Generating a signal corresponding to a positive discontinuity point of the wobble signal when two consecutive edges of the detected first comparison signal edges exist within a predetermined time interval; And And generating a signal corresponding to the negative discontinuity point of the wobble signal when two consecutive edges of the detected second comparison signal edges exist within the predetermined predetermined time interval. Detection method. The method of claim 17, wherein the ADIP signal detection method, And adjusting the positive reference level and the negative reference level. The method of claim 17, wherein the ADIP signal detection method, And receiving the signal corresponding to the positive discontinuity point of the wobble signal and the signal corresponding to the negative discontinuity point of the wobble signal, and generating the address in pre-groove (ADIP) signal. Detection method. 18. The method of claim 17 wherein the edges are positive edges or negative edges. The method of claim 17, wherein detecting the edges of the first comparison signal comprises: Exclusive ORing the first comparison signal and the third comparison signal; And And logically multiplying the exclusive OR result signal by the first or third comparison signal. The method of claim 17, wherein generating a signal corresponding to the positive discontinuity point, Counting edges of the detected first comparison signal in response to a clock signal; And And generating a signal corresponding to the positive discontinuity point when two consecutive edges exist within the predetermined predetermined time interval. The method of claim 17, wherein detecting edges of the second comparison signal comprises: Exclusive ORing the second comparison signal and the fourth comparison signal; And And logically multiplying the exclusive OR result signal with the second or fourth comparison signal. The method of claim 17, wherein generating a signal corresponding to the negative discontinuity point, Counting edges of the detected second comparison signal in response to a clock signal; And And generating a signal corresponding to the negative discontinuity when two consecutive edges exist within the predetermined predetermined time period. In the ADIP (Address in pre-groove) signal detection method of the wobble detection system of the optical disk device, Generating a first comparison signal by comparing a positive reference level and a wobble signal, and generating a second comparison signal by comparing a negative reference level and the wobble signal; Receiving edges of the first comparison signal by receiving the first comparison signal; Receiving edges of the second comparison signal by receiving the second comparison signal; Generating a signal corresponding to a positive discontinuity point of the wobble signal when two consecutive edges of the detected first comparison signal edges exist within a predetermined time interval; And And generating a signal corresponding to the negative discontinuity point of the wobble signal when two consecutive edges of the detected second comparison signal edges exist within the predetermined predetermined time interval. Detection method. The method of claim 25, wherein the ADIP signal detection method, And adjusting the positive reference level and the negative reference level. The method of claim 25, wherein the ADIP signal detection method, And receiving the signal corresponding to the positive discontinuity point of the wobble signal and the signal corresponding to the negative discontinuity point of the wobble signal to generate the address in pre-groove (ADIP) signal. Detection method. 27. The method of claim 25, wherein the edges are positive edges or negative edges. The method of claim 25, wherein detecting edges of the first comparison signal comprises: Delaying the first comparison signal by a predetermined time; Exclusive ORing the first comparison signal and the delayed signal; And And logically multiplying the exclusive OR result signal with the first comparison signal or the delayed signal. The method of claim 25, wherein generating a signal corresponding to the positive discontinuity point, Counting edges of the detected first comparison signal in response to a clock signal; And And generating a signal corresponding to the positive discontinuity point when two consecutive edges exist within the predetermined predetermined time interval. The method of claim 25, wherein detecting edges of the second comparison signal comprises: Delaying the second comparison signal by a predetermined time; Exclusive ORing the second comparison signal and the delayed signal; And And logically multiplying the exclusive OR result signal by the second comparison signal or the delayed signal. The method of claim 25, wherein generating a signal corresponding to the negative discontinuity point, Counting edges of the detected second comparison signal in response to a clock signal; And And generating a signal corresponding to the negative discontinuity when two consecutive edges exist within the predetermined predetermined time period.