KR20040091985A - Ball Grid Array Package - Google Patents

Abstract

PURPOSE: A BGA(Ball Grid Array) package is provided to enhance stability and manufacturing yield by using a stack package with improved structure. CONSTITUTION: A BGA package comprises a first substrate(200), a first package(210) attached on the first substrate using ball grid array technique, a second substrate(220) attached on the first package, and a second package(250) attached on the second substrate using ball grid array technique. A wire bonding pad is formed on the front side of the first substrate, and solder balls(260) are attached on the back side of the first substrate. The first substrate is bonded to the second substrate by edge-type pad technique using a wire(230). Epoxy molding process is performed by defining the wire bonding portions.

Description

Ball Grid Array Package

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ball grid array package and a method of manufacturing the same, and more particularly, to a stacked multi-chip package in which a ball grid array package element is vertically stacked. It is about.

One way to increase the capacity of a semiconductor device is to stack several chips or packages into a single product. Such semiconductor device stacking technology is also required for increasing the density of semiconductor devices required as the size of the semiconductor chip itself increases as the ultra-high integration and high performance of individual semiconductor devices are increased. The stacked semiconductor device may be implemented as a chip stacked device in which several unpacked individual chips are stacked, or may be implemented as a package stacked device in which a plurality of packaged devices are assembled.

Package stacked devices are also called three-dimensional stacked semiconductor devices because they are stacked by stacking several packages in a vertical direction. Usually, two to eight package devices are stacked and mounted on a circuit board designed to mount one package device.

Conventional package stacked devices use a thin small outline package (TSOP) or a leadless chip carrier (LCC). The structure for electrically connecting the stacked package devices should be easily possible and applicable to an automatic process. Meanwhile, with the trend of miniaturization and lightening of electronic devices, efforts have been made to develop more economical and reliable packages. Due to these efforts, semiconductor chip packages have been developed in various forms. Recently, ball grid array packages using a grid array as an external electrical connection means of packages have become mainstream. Such a surface array package is advantageous in that it appropriately corresponds to an increase in the number of input / output pins of a semiconductor chip and can reduce the size of the package to the size of a semiconductor chip while reducing the inductive component of the electrical connection.

1A to 1C are cross-sectional views illustrating a general BGA stack structure.

As shown in FIG. 1A, the structure connected to electrically conduct the upper and lower balls using tape is difficult to process because the tape is bent, and underfill (underfill) is required to secure the solder joint due to the characteristics of the flexible tape. There is a problem with fill).

In addition, FIG. 1B is a structure in which the top and bottom packages are electrically connected by using solder balls after the thickness of the package or the chip is made thin, which is difficult to apply to conventional package equipment.

FIG. 1C illustrates a structure in which a top package is implemented by underfilling a package on a substrate and then electrically conductive using a solder column after implementing a bottom package. However, the problem with this process is a complicated process step, which increases the manufacturing cost and increases the cross-sectional area of the package.

First of all, if the package of the structure described above is used, it is necessary to pay a patent fee, so it is necessary to develop a unique structure that does not infringe the patents of other companies.

Accordingly, an object of the present invention is to provide a ball grid array package that can improve the stability and product yield of a product by manufacturing a stack package having a unique structure.

1A to 1C are cross-sectional views showing a general BGA stack structure.

2A-2C are cross-sectional views of a ballgrid array package according to an embodiment of the invention.

3A to 3C are plan views showing first and second substrates used in the present invention.

4 is a cross-sectional view showing a sealing process according to the present invention.

* Explanation of symbols for main parts of the drawing

200: first substrate 240: sealing agent

210: first package 250: second package

220: second substrate 260: solder ball

230: wire

In order to achieve the above object, the present invention is a wire bonding pad is provided on the upper surface, the first substrate is attached to the solder ball; A first package attached to the first substrate in a ball grid array manner; A second substrate attached on the first package and wire-bonded with the first substrate in an edge pad method; It provides a ball grid array package comprising a second package attached to the second substrate in a ball grid array method, and including a step of encapsulating the wire bonding portion.

(Example)

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

2A through 2C are cross-sectional views illustrating a ball grid array package according to an embodiment of the present invention.

As shown in FIG. 2A, the first package 210 having the second substrate 220 and the solder ball attached thereto is adhered with an adhesive and then attached to the first package 200 on the first substrate 200.

3A to 3C are plan views illustrating the first and second substrates 220 and 220 used in the present invention. 3A and 3B show both front and rear surfaces of the first substrate, and FIG. 3C shows the front surface of the second substrate.

As shown in FIGS. 3A and 3B, the first substrate has the ball land pad 310 and the wire bonding pad 340 formed on the same surface in the chip mounting region 300 and the circuit wiring on the ball land pad 310. By connecting to each layer electrically connected via the via hole 330. Here, the borland pad 310 and the wire bonding pad 340 mainly use a metal having excellent conductivity, such as a copper material.

Next, as shown in Figure 2b, the first substrate 200 and the second substrate 220 is connected to the wire bonding method and then the wire bonded portion to protect the wire 230 to encapsulation process 240 do. In this case, the bonding method has an edge pad type formed at an edge of the wire bonding pad, thereby shortening the length of the bonding wire 230.

Alternatively, as shown in FIG. 4, when the encapsulation process is performed between the first substrate 210 and the second package 270, the solder joint may be improved.

Subsequently, as shown in FIG. 2C, the second package 250 is attached to the wire-bonded second substrate 220, and then solder balls are attached to the ballland pad forming portions at the rear of the first substrate to form a ball grid array package. Complete

As described above, the present invention forms a substrate between the upper and lower semiconductor chips to form an electrically interconnected package to manufacture a unique package while using a wire bonding technology and an encapsulation process currently used to increase the stability of the product and to make a new investment. The effect can be reduced.

In addition, it satisfies all electrical characteristics, reliability, and mass production, and secures an independent structure, thereby eliminating the need to use other manufacturing methods.

Claims (2)

A first substrate having a wire bonding pad on an upper surface thereof and a solder ball attached to the lower surface thereof; A first package attached to the first substrate in a ball grid array manner; A second substrate attached on the first package and wire-bonded with the first substrate in an edge pad method; It is composed of a second package attached on the second substrate in a ball grid array method, Ball grid array package characterized in that for encapsulating the wire bonding portion. The method of claim 1, The encapsulation step is a ball grid array package, characterized in that performed between the first substrate and the second package.