KR20040087459A - Method for forming fine pattern of semiconductor device - Google Patents

Abstract

PURPOSE: A method for forming a fine pattern with constant fidelity of a semiconductor device is provided to remove scum and flooding by using an electron beam flood exposure. CONSTITUTION: An etch target layer is formed on a semiconductor wafer(21). A resist layer is coated on the etch target layer. By exposing and developing the resist layer, the first resist pattern is formed. An electron beam flood exposure is performed, thereby forming the second resist pattern(25a). An etch target pattern(23a) is then formed by patterning the etch target layer using the second resist pattern as a mask.

Description

Method for forming fine pattern of semiconductor device

The present invention relates to a method for forming a fine pattern of a semiconductor device, and more particularly, to a method for forming a fine pattern in the form of a hole using electron beam exposure.

Due to the characteristics of the semiconductor device, which is gradually smaller, the layout of the circuit is gradually densified and the pattern size is also reduced. In particular, in the case of a hole-type storage node or a bit line contact layer, since the target CD is very small, it is increasingly difficult to form it in consideration of the definition ability of the exposure apparatus.

While patterning is affected by the pattern definition ability according to the NA (numerical aperture) of the exposure equipment applied to form the line and space (L / S) pattern during patterning, the L / S is relatively simple because it is a relatively simple pattern. It is easier to define than the pattern type of the type.

However, due to the limitation of the primary exposure efficiency applied in the case of the hole type such as the contact hole or the storage node contact or the storage node pattern shown in FIGS. It is very difficult, and even if patterning is possible, it is difficult to obtain sufficient process margin considering mass production.

As described above, in the case of forming the hole type pattern of the fine pattern, these patterns are caused by problems such as scum, slope, or footing due to the limitation of the resolution during exposure using KrF or ArF wavelength. Suffers great difficulty in device application.

Such hole-type pattern formation causes a problem such as scum, tilting or footing due to the limitation of the resolution upon exposure using KrF or ArF wavelengths, and thus has great difficulty in applying the device to these patterns. The process margin reduction phenomenon caused by scum or footing in the hole pattern causes a great influence on the characteristics of the semiconductor device and cannot form the semiconductor device characteristics.

Accordingly, the present invention has been made to solve the above-mentioned problems of the prior art, and a scum or pudding generated on a pattern by applying an electron beam exposure process after first forming a hole-shaped pattern using an exposure apparatus. The purpose of the present invention is to provide a method for forming a micropattern of a semiconductor device which can improve the yield by forming a stable process system in manufacturing a semiconductor device by eliminating (flooding) a constant fidelity. have.

1A to 1D are cross-sectional views illustrating a method of forming a fine pattern of a semiconductor device according to the present invention;

FIG. 2A is a photograph showing a contact hole pattern formed on a wafer in a method of forming a fine pattern of a semiconductor device, in which a slope is generated.

FIG. 2B is a photo showing a state of a contact hole pattern when a slope is removed in FIG. 1A by applying an electron beam front irradiation process in the method of forming a micropattern of a semiconductor device according to the present invention; FIG.

3A is a photograph showing a storage node contact pattern formed on a wafer in a method of forming a fine pattern of a semiconductor device. When a slope is generated, FIG.

3B is a photo showing a storage node contact pattern when a slope is removed in FIG. A by applying an electron beam front irradiation process in the method of forming a micropattern of a semiconductor device according to the present invention;

4A is a photograph showing a zigzag storage node pattern formed on a wafer in the method of forming a fine pattern of a semiconductor device, in which a scum is generated.

FIG. 4B is a photograph showing a storage node pattern when a scum is removed in FIG. 3A by applying an electron beam front irradiation process in the method of forming a micropattern of a semiconductor device according to the present invention. FIG.

[Explanation of symbols on the main parts of the drawings]

21: semiconductor wafer 23: pattern material layer

23a: material layer pattern 25: resist film

25a: resist film pattern

According to an aspect of the present invention, there is provided a method of forming a fine pattern of a semiconductor device, the method comprising: forming a pattern material layer on a semiconductor wafer;

Forming a resist film pattern by applying a resist film on the pattern material layer and then patterning the resist film through an exposure and development process;

Performing an electron beam full surface irradiation process on the resist film pattern; And

And patterning the pattern material layer using the resist film pattern as a mask after performing an electron beam electron irradiation process.

(Example)

Hereinafter, a method of forming a fine pattern of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

1A to 1D are cross-sectional views illustrating a method of forming a fine pattern of a semiconductor device according to the present invention;

FIG. 2A is a photo showing a contact hole pattern formed on a wafer in a method of forming a fine pattern of a semiconductor device, and a slope is generated. FIG. 2B is a method of forming a fine pattern of a semiconductor device according to the present invention. , A photo showing the state of the contact hole pattern when the slope (slope) in Figure 2a is removed by applying the electron beam front irradiation process.

FIG. 3A illustrates a storage node contact pattern formed on a wafer in a method of forming a fine pattern of a semiconductor device, in which a slope is generated, and FIG. 3B illustrates a method of forming a fine pattern of a semiconductor device according to the present invention. In this case, it is a photograph showing the state of the storage node contact pattern when the slope is removed in FIG. 3A by applying the electron beam front irradiation process.

4A illustrates a zigzag storage node pattern formed on a wafer in a method of forming a fine pattern of a semiconductor device, in which a scum is generated, and FIG. 4B illustrates a method of forming a fine pattern of a semiconductor device according to the present invention. FIG. 4A is a photograph showing a storage node pattern when a scum in FIG. 4A is removed by applying an electron beam front irradiation process.

In the method of forming a fine pattern of a semiconductor device according to the present invention, as shown in FIGS. 1A and 1B, first, a pattern material layer 23 for forming a pattern on a semiconductor wafer 21 is formed, and then the pattern material. A resist film 25 is applied on the layer 23.

Then, as shown in FIG. 1C, an electron beam front irradiation process is performed on the resist film 25 to form a resist film pattern 25a.

Subsequently, as shown in FIG. 1D, the pattern material layer 23 is patterned using the resist film pattern 25a as a mask to form a desired material layer pattern 23a, and then the resist film pattern 25a is removed. .

In this case, the patterning process of the pattern material layer 23 is applied when forming a hole-shaped pattern such as a storage node pattern, a storage node contact pattern, or a contact hole, or a line / space pattern such as a gate line or a bit line.

In addition, the pattern material layer 23 is selected from a nitride film, an oxide film, BPSG, PSG, USG, PETOS, SiON or polysilicon, and the pattern material layer is deposited to have a thickness of 200 kV to 5000 kPa.

In addition, a metal material layer such as tungsten, tungsten silicide, cobalt silicide, titanium silicide or aluminum may be formed under the pattern material layer 23. In this case, the metal material layer is preferably formed to a thickness of 200 ~ 30,000Å. In addition, the pattern material layer and the metal material layer are deposited one to several times.

In addition, the method may further include forming an inorganic or organic anti-reflective coating on the pattern material layer 23. In this case, SiON or TiN is used as the inorganic anti-reflective coating, and the thickness of the organic or inorganic anti-reflective coating is preferably 200 kPa to 5000 kPa. In addition, the inorganic or organic anti-reflective coating is formed by a deposition or coating method, and proceeds from one to several times. Further, the inorganic or organic diffuse reflection prevention film may be formed in a single layer or a multilayer structure.

The resist film 25 may include polyvinyl phenol, polyhydroxy styrene, poly norbornene, poly adamant, polyimide, polyacrylate, polymethacrylate, and polyfluorine. Photoresists of homopolymers or copolymers are used.

In addition, as a light source applied to the electron beam front irradiation process, I-line, KrF, ArF, 157nm, EUV, E-beam or X-rays are used.

In the resist patterning, the solvent of the resist is ethyl 3-ethoxypropionate, methyl 3-methoxypropionate, cyclohexanon, propylene. A single solvent such as glycol methyl ether acetate, methyl ethyl ketone, benzene, toluene, dioxane, dimethel formamide, or a mixed solution thereof is used.

In addition, the resist film 25 includes a negative or positive resist. In addition, the electron beam front irradiation process is applied to a dense, isolated line / space pattern.

In addition, the thickness of the resist film applied in the electron beam front irradiation step is preferably about 0.05 μm to 3.0 μm.

Under the conditions of the electron beam front irradiation process, the pressure was 10 to 50 mm Torr, the acceleration voltage was 1 to 50 KeV, the temperature was 10 to 400 ° C., the atmosphere of nitrogen, oxygen, argon, helium gas, 0.10 to 12 μm. Carry out under the electronic domain.

In addition, the wafer is irradiated to the wafer in a proximity or contact manner during the electron beam front irradiation process.

As shown in the present invention, the following embodiments are used to form a scum or footing caused by lack of resolution when forming a pattern such as a storage node or a hole applied to a device of 0.115 technology or less. An example in which a hole-shaped pattern having a uniform CD uniformity can be formed by application is shown.

Example 1

Using a chemically amplified KrF polyhydroxy styrene-based resist, patterning is performed to form contact holes on the surface where the substrate is SiON, as shown in FIG. 2A. At this time, the thickness of the applied resist is about 0.56 μm.

Then, electron beam flood exposure is performed on the patterned wafer in three steps for 10 seconds under a voltage condition of 80 KeV.

The pattern on the pattern wafer which has been subjected to the electron beam full surface irradiation process, as shown in FIG. 2B, forms a pattern without scum, thereby improving process margins and improving etching selectivity during etching, thereby improving process stability and yield. We will improve.

Example 2

Using a chemically amplified KrF polyhydroxy styrene-based resist, a patterning process for forming a storage node contact is performed on a surface of which the substrate is polysilicon, as shown in FIG. 3A. At this time, the thickness of the applied resist is about 0.48 μm.

Subsequently, electron beam flood exposure is performed on the patterned wafer in five steps for 12 seconds under a voltage condition of 70 KeV.

The pattern on the pattern wafer which has undergone the electron beam front irradiation process forms a scum free pattern as shown in FIG. 3B, thereby improving process margins and improving etching selectivity during etching, thereby improving process stabilization and yield. Done.

Example 3

A patterning process is performed to form a zigzag-type storage node pattern as shown in FIG. 4A on the surface of the SiON substrate using a chemically amplified polyacrylate-based resist for ArF. At this time, the thickness of the applied resist is about 0.35 μm.

Then, the electron beam flood exposure is performed on the patterned wafer as presented in the present invention in three steps for 10 seconds under a voltage condition of 60 KeV.

The pattern on the pattern wafer which has been subjected to the electron beam front irradiation process forms a scm free pattern as shown in FIG. 4B, thereby improving process margin and improving etching selectivity during etching, thereby improving process stabilization and yield. Done.

Example 4

A patterning process for forming a zigzag storage node contact on a surface of a nitride film is performed using a polynorbornene-based resist for chemically amplified ArF. At this time, the thickness of the applied resist is about 0.28 μm.

Next, the electron beam flood exposure is performed on the patterned wafer as presented in the present invention in three steps for 8 seconds under a voltage condition of 50 KeV.

By forming a pattern without a scum on the pattern wafer which has been subjected to the electron beam front irradiation process, the process margin is improved and the etching selectivity during the etching is improved, thereby improving process stabilization and yield.

Example 5

A patterning process for forming a storage node pattern on the surface of which the substrate is an oxide film is performed using a chemically amplified polyacrylate-based resist for 157 nm. At this time, the thickness of the applied resist is about 0.25 μm.

Then, the electron beam flood exposure is performed on the patterned wafer as presented in the present invention in three steps for 8 seconds under a voltage condition of 50 KeV.

Thus, by forming a pattern without a scum as shown in FIG. 2B on the pattern wafer subjected to the electron beam front irradiation process, the process margin was improved and the etching selectivity during etching was improved, thereby achieving process stabilization and yield improvement.

Example 6

The patterning process for forming a contact hole on the surface whose substrate is SiON is performed using the chemically amplified polyhydroxy styrene-type resist for EUV. At this time, the thickness of the applied resist is about 0.18 μm.

Next, the electron beam flood exposure is performed on the patterned wafer as presented in the present invention in three steps for 6 seconds under a voltage condition of 40 KeV.

Thus, the pattern on the pattern wafer which has undergone the electron beam front irradiation process forms a scum-free pattern, thereby improving process margin and improving etching selectivity during etching, thereby improving process stabilization and yield.

Example 7

A patterning process for forming a contact hole on a surface of which the substrate is polysilicon is carried out using a chemically amplified polyacrylate-based resist for EUV. At this time, the thickness of the applied resist is about 0.15 μm.

Subsequently, electron beam flood exposure is performed on the patterned wafer as presented in the present invention in three steps for 6 seconds under a voltage condition of 30 KeV.

The pattern on the pattern wafer which has been subjected to the electron beam front irradiation process forms a scum-free pattern, thereby improving the process margin and improving the etching selectivity during etching, thereby improving process stabilization and yield.

As described above, according to the method for forming a micropattern of a semiconductor device according to the present invention, after forming a line and a space pattern formed by a lithography process, the pattern is exposed by patterning the bottom surface after patterning the wafer by patterning the wafer using an electron beam. Alternatively, a stable process may be secured by improving scum, slope, or footing occurring on the sidewalls.

This process method causes the patterned resist to be crosslinked by the electron beam by flooding the electron beam to the patterned wafer for a predetermined time after the patterning process, thereby causing shrinkage of the pattern, thereby causing scum and footing. Can be removed.

In the case of a hole type such as a storage node, a material such as SiON or poly is used as a substrate. When patterning on these materials, scum or footing occurs due to diffuse reflection, but as in the present invention, When the process is applied, the matrix resin of the resist causes radical bonding by the electron beam to cause crosslinking reaction between the chains of the matrix resin, thereby causing shrinkage of the resist.

In addition, when irradiating an electron beam with a predetermined amount of front irradiation on the patterned hole pattern, the resist film is changed to a harder form by cross-linking, and improved etching selectivity even under etching conditions applied to subsequent etching processes. Has

Moreover, the process method applied in the present invention is particularly effective in chemically amplified resists because the chemically amplified resist is more easily removed by radical bonding from scums, slopes or footings. It is more effective for resists of KrF, ArF, VUV, or EUV. This phenomenon is caused by a certain amount of electron beam irradiation, a new type of radical bonds are generated by the cutting of the main chain or terminal in the resist, shrinking occurs to form a storage node-shaped pattern without scum or footing.

In addition, the degree of radical bonding of the resist by the electron beam irradiation process in which the constant irradiation amount is controlled is obtained to obtain a uniform final dimension (CD) value. Uniform front irradiation conditions are also very important.

When the process is applied to the present invention, the resist is cured by electron beam irradiation, which improves the constant etching selectivity of the resist, thereby obtaining a uniform CD after the etching process of the pattern. There is no need to use materials, so cost savings and process simplicity can be expected.

Therefore, through the application of this process it is possible to maximize the efficiency and yield of the characteristics of the semiconductor device.

On the other hand, the present invention is not limited to the above-described specific preferred embodiments, and various changes can be made by those skilled in the art without departing from the gist of the invention claimed in the claims. will be.

Claims (24)

Forming a patterned material layer on the semiconductor wafer; Forming a resist film pattern by applying a resist film on the pattern material layer and then patterning the resist film through an exposure and development process; Performing an electron beam full surface irradiation process on the resist film pattern; And And patterning the pattern material layer using the resist film pattern as a mask after performing an electron beam electron irradiation process. The method of claim 1, wherein the patterning process of the pattern material layer is applied when forming a hole-shaped pattern such as a storage node pattern, a storage node contact pattern, or a contact hole, or a line / space pattern such as a gate line or a bit line. A fine pattern forming method of a semiconductor device. The method of claim 1, wherein the pattern material layer is formed of a nitride film, an oxide film, BPSG, PSG, USG, PETOS, SiON, or polysilicon. The method of claim 1, wherein the pattern material layer is deposited to have a thickness of 200 μs to 5000 μs. The method of claim 1, wherein a metal material layer such as tungsten, tungsten silicide, cobalt silicide, titanium silicide or aluminum is formed under the pattern material layer. The method of claim 5, wherein the metal material is formed to have a thickness of 200 μs to 30,000 μs. The method of claim 5, wherein the pattern material layer and the metal material layer are deposited one to several times. The method of claim 1, further comprising forming an inorganic or organic anti-reflective coating on the pattern material layer. 10. The method of claim 8, wherein SiON or TiN is used as the inorganic anti-reflective coating. 9. The method of forming a micropattern of a semiconductor device according to claim 8, wherein the thickness of the organic or inorganic antireflection film is in the range of 200 mW to 5000 mW. The method of claim 8, wherein the inorganic or organic anti-reflective coating is formed by a deposition method or a coating method and is performed one to several times. The method of claim 8, wherein the inorganic or organic anti-reflective coating is formed in a single layer or a multilayer structure. The method of claim 1, wherein the resist film is polyvinyl phenol, polyhydroxy styrene, poly norbornene, poly adamant, polyimide, polyacrylate, polymethacrylate, polyfluorine A method of forming a fine pattern of a semiconductor device, characterized by using a photoresist of a homopolymer or a copolymer. The method of claim 1, wherein the light source applied to the electron beam front irradiation step is formed using I-line, KrF, ArF, 157 nm, EUV, E-beam, or X-ray. The method of claim 1, wherein in the resist patterning, the solvent of the resist is ethyl 3-ethoxypropionate, methyl 3-methoxypropionate, cyclohexanone ( cyclohexanon), propyleneglycol methyl ether acetate (propyleneglycol methyl ether acetate), methyl ethyl ketone, benzene, toluene, dioxane, dimethel formamide, etc., using a single solvent or a mixed solution thereof. Pattern formation method. The method of claim 1, wherein the resist film is a negative or positive resist. The method of claim 1, wherein the electron beam front irradiation step is applied to a dense, isolated line / space pattern. The method of forming a fine pattern of a semiconductor device according to claim 1, wherein the thickness of the resist film applied in the electron beam front irradiation step is 0.05 m to 3.0 m. The method of claim 1, wherein the electron beam front irradiation step is performed within a pressure range of 10 to 50 mm Torr. The method of forming a fine pattern of a semiconductor device according to claim 1, wherein the acceleration voltage during the electron beam front irradiation step is performed in a range of 1 to 50 KeV. The method of forming a fine pattern of a semiconductor device according to claim 1, wherein the electron beam front irradiation step is performed in an electron region of 0.10 to 12 탆. The method of claim 1, wherein the electron beam front irradiation step is performed in an atmosphere of nitrogen, oxygen, argon, and helium gas. The method of claim 1, wherein the electron beam front irradiation step is performed in a temperature range of 10 to 400 ° C. 7. 2. The method of forming a micropattern of a semiconductor device according to claim 1, wherein the wafer is irradiated to the wafer in a proximity or contact manner during the electron beam front irradiation step.