KR20040085733A - Device for exposing wafer of semiconductor device, and method therefor - Google Patents

Device for exposing wafer of semiconductor device, and method therefor Download PDF

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Publication number
KR20040085733A
KR20040085733A KR1020030020525A KR20030020525A KR20040085733A KR 20040085733 A KR20040085733 A KR 20040085733A KR 1020030020525 A KR1020030020525 A KR 1020030020525A KR 20030020525 A KR20030020525 A KR 20030020525A KR 20040085733 A KR20040085733 A KR 20040085733A
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South Korea
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liquid crystal
wafer
crystal display
semiconductor device
exposure
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KR1020030020525A
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Korean (ko)
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고동호
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주식회사 하이닉스반도체
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Priority to KR1020030020525A priority Critical patent/KR20040085733A/en
Publication of KR20040085733A publication Critical patent/KR20040085733A/en

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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70383Direct write, i.e. pattern is written directly without the use of a mask by one or multiple beams
    • G03F7/70391Addressable array sources specially adapted to produce patterns, e.g. addressable LED arrays

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE: A wafer exposure apparatus for a semiconductor device and an exposure method are provided to improve the exactness of an exposure process by shielding only a necessary chip from light using a driving circuit part. CONSTITUTION: A wafer exposure apparatus(200) includes a plurality of liquid crystal display elements and a driving circuit part. The plurality of liquid crystal display elements(220a,220b,220c) are formed on the same plane and used as a light source for exposing wafer chips(230a,230b,230c). The driving circuit part(210) is electrically connected with each liquid crystal display element, so that the driving circuit part is capable of turning on the liquid crystal display elements, selectively.

Description

반도체소자의 웨이퍼 노광장치 및 그 노광방법{Device for exposing wafer of semiconductor device, and method therefor}Device for exposing wafer of semiconductor device and method for exposing thereof {Device for exposing wafer of semiconductor device, and method therefor}

본 발명은 반도체소자의 웨이퍼 노광장치 및 이를 이용한 노광방법에 관한 것으로, 보다 상세하게는 리소그라피 및 노광공정에서 액정디스플레이를 이용하여 빛을 차단 또는 통과시키는 반도체소자의 웨이퍼 노광장치 및 이를 이용한 노광방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wafer exposure apparatus of a semiconductor device and an exposure method using the same. More particularly, the present invention relates to a wafer exposure apparatus of a semiconductor device for blocking or passing light using a liquid crystal display in a lithography and exposure process and an exposure method using the same. It is about.

종래의 반도체소자의 노광공정에서는 동일 구조의 칩을 일정 어레이로 위치시키는 마스크를 이용하여 웨이퍼 전면에 노광공정을 진행하는데, 이 경우 웨이퍼 에지부에서는 정상적인 패터닝이 불가능하고 이물질로 인한 불량발생등의 문제가 있다.In the exposure process of the conventional semiconductor device, the exposure process is performed on the entire surface of the wafer by using a mask in which chips of the same structure are placed in a certain array. In this case, normal patterning is impossible at the wafer edge and defects caused by foreign matters are caused. There is.

이를 해결코자 종래에는 도 1에 도시된 바와 같이 블레이드를 이용한 광 차단에 의해 웨이퍼(20) 에지부의 칩(20a)이 노광되지 않도록 하고 있다.To solve this problem, the chip 20a of the edge portion of the wafer 20 is not exposed by light blocking using a blade as shown in FIG. 1.

이러한 종래의 블레이드는 4개의 플레이트(5)를 X축 및 Y축으로 조절하여 노광영역(10)의 크기를 조절하도록 구성되어 있다.This conventional blade is configured to adjust the size of the exposure area 10 by adjusting the four plates 5 in the X-axis and Y-axis.

이를 2×3 칩 어레이 마스크에 적용한 경우, 도 2에 도시된 바와 같이 차광대상 칩(20a)은 1개이지만 부득이 그 주변의 인접 칩(20b)까지도 동시에 불필요하게 차광되는 문제점이 있다.When this is applied to a 2x3 chip array mask, as shown in FIG. 2, there is only one light blocking target chip 20a, but there is a problem in that even adjacent neighboring chips 20b are unnecessarily blocked at the same time.

즉, 종래의 블레이드에서는 칩 어레이의 크기에 맞춰 정확하게 블레이드를 배치하는 것이 불가능할 뿐만 아니라 또한 기계적인 문제로 인해 노광 정확성이 떨어져 공정마진이 열악해지는 문제점이 있다.That is, in the conventional blades, it is not only impossible to accurately position the blades according to the size of the chip array, but also there is a problem in that the exposure accuracy is poor due to mechanical problems and the process margins are poor.

따라서, 본 발명은 상기 종래기술의 제반 문제점을 해결하기 위하여 안출한 것으로서, 주변의 칩까지 불필요하게 차광함이 없이 차광대상 칩만을 정확하게 차광시킴으로써 노광 정확성을 향상시켜 웨이퍼내 다이 수를 증가시키고 공정마진을 극대화할 수 있는 반도체소자의 웨이퍼 노광방법을 제공함에 그 목적이 있다.Accordingly, the present invention has been made to solve the above-mentioned problems of the prior art, and by accurately shielding only the light-blocking target chip without unnecessarily shading the surrounding chips, improving exposure accuracy to increase the number of dies in the wafer and process margins. It is an object of the present invention to provide a wafer exposure method of a semiconductor device that can maximize the.

도 1은 종래기술에 따른 반도체소자의 웨이퍼 노광블레이드를 설명하기 위한 도면.1 is a view for explaining a wafer exposure blade of a semiconductor device according to the prior art.

도 2는 종래기술에 따른 반도체소자의 웨이퍼 노광블레이드를 이용한 노광방법을 설명하기 위한 도면.2 is a view for explaining an exposure method using a wafer exposure blade of a semiconductor device according to the prior art.

도 3a 및 도 3b는 본 발명에 따른 반도체소자의 웨이퍼 노광장치에 이용되는 액정디스플레이의 작동원리를 도시한 도면.3A and 3B illustrate the operating principle of a liquid crystal display used in a wafer exposure apparatus of a semiconductor device according to the present invention.

도 4는 본 발명에 따른 반도체소자의 웨이퍼 노광장치를 도시한 도면.4 illustrates a wafer exposure apparatus of a semiconductor device according to the present invention.

도 5는 본 발명에 따른 반도체소자의 웨이퍼 노광장치를 이용한 노광방법을 설명하기 위한 도면.5 is a view for explaining an exposure method using a wafer exposure apparatus of a semiconductor device according to the present invention.

도 6a 내지 도 6e는 본 발명에 따른 반도체소자의 웨이퍼 노광장치에 의해 형성된 다양한 노광패턴을 도시한 도면.6A to 6E illustrate various exposure patterns formed by the wafer exposure apparatus of the semiconductor device according to the present invention.

(도면의 주요부분에 대한 부호설명)(Code description of main parts of drawing)

100 : 상부편광판 120 : 상부유리100: upper polarizing plate 120: upper glass

150 : 광학축 170 : 하부유리150: optical axis 170: lower glass

190 : 하부편광판 200 : 웨이퍼 노광장치190: lower polarizing plate 200: wafer exposure apparatus

210 : 구동회로부 220a,220b,220c : 액정디스플레이210: driving circuit unit 220a, 220b, 220c: liquid crystal display

230a, 230b, 230c : 웨이퍼 칩230a, 230b, 230c: Wafer Chips

300a, 300b, 300c, 300d, 300e : 노광패턴300a, 300b, 300c, 300d, 300e: exposure pattern

상기 목적을 달성하기 위한 본 발명은, 동일 평면상에 형성되고, 웨이퍼의 노광용 광원으로 이용되는 다수개의 액정디스플레이; 및 상기 다수개의 액정디스플레이중 차광할 웨이퍼 칩에 대향하는 액정디스플레이는 오프(Off)시키고, 노광할 웨이퍼 칩에 대향하는 액정디스플레이는 온(On)시키도록 상기 다수개의 액정디스플레이에 전기적으로 연결된 구동회로부를 포함하여 구성됨을 특징으로 한다.The present invention for achieving the above object is formed on the same plane, a plurality of liquid crystal display used as a light source for exposure of the wafer; And a driving circuit part electrically connected to the plurality of liquid crystal displays to turn off the liquid crystal display facing the wafer chip to be shielded among the plurality of liquid crystal displays and to turn on the liquid crystal display facing the wafer chip to be exposed. Characterized in that configured to include.

(실시예)(Example)

이하, 첨부된 도면에 의거하여 본 발명의 바람직한 실시예를 보다 상세하게 설명하도록 한다.Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

도 3a 및 도 3b는 본 발명에 따른 반도체소자의 웨이퍼 노광장치에 이용되는 액정디스플레이의 작동원리를 도시한 도면이다.3A and 3B illustrate the operating principle of a liquid crystal display used in a wafer exposure apparatus of a semiconductor device according to the present invention.

우선, 본 발명에 따른 반도체소자의 웨이퍼 노광방법에서는 TN(Twisted Nematic)모드의 액정디스플레이를 이용한다.First, in the wafer exposure method of the semiconductor device according to the present invention, a liquid crystal display of TN (Twisted Nematic) mode is used.

이러한 TN모드의 액정디스플레이의 작동원리를 간략히 설명하면 다음과 같다.The operation principle of the liquid crystal display of the TN mode is briefly described as follows.

도 3a에 도시된 바와 같이, 전압을 인가하지 않은 경우에는 상부편광판(100)과 상부유리(120)를 거쳐 입사된 광은 광학축(150)의 변화가 없는 TN모드의 액정 배열에 의해 하부유리(170) 및 하부편광판(190)을 통과한다.As shown in FIG. 3A, when no voltage is applied, the light incident through the upper polarizing plate 100 and the upper glass 120 is lowered by the liquid crystal array in the TN mode with no change in the optical axis 150. Passes 170 and lower polarizer 190.

한편, 도 3b에 도시된 바와 같이, 전압을 인가한 경우에는 상부편광판(100)과 상부유리(120)를 거쳐 입사된 광은 광학축(150)이 변화된 TN모드의 액정 배열에 의해 하부유리(170) 및 하부편광판(190)을 통과하지 못하고 차단된다.On the other hand, as shown in Figure 3b, when a voltage is applied to the light incident through the upper polarizing plate 100 and the upper glass 120 is the lower glass (by the liquid crystal arrangement of the TN mode of the optical axis 150 is changed) 170 and the lower polarizing plate 190 may be blocked.

도 4는 본 발명에 따른 반도체소자의 웨이퍼 노광장치를 도시한 도면이며, 도 5는 본 발명에 따른 반도체소자의 웨이퍼 노광장치를 이용한 노광방법을 설명하기 위한 도면이다.4 is a view showing a wafer exposure apparatus of a semiconductor device according to the present invention, Figure 5 is a view for explaining an exposure method using a wafer exposure apparatus of a semiconductor device according to the present invention.

이하에서는, 도 4에 도시된 바와 같이 본 발명에 따른 반도체소자의 웨이퍼 노광장치의 구성을 설명한다.Hereinafter, the configuration of the wafer exposure apparatus of the semiconductor device according to the present invention as shown in FIG.

먼저, 본 발명에 따른 반도체소자의 웨이퍼 노광장치(200)는 구동회로부(210)와 이에 전기적으로 연결된 다수개의 액정디스플레이(220a)(220b)(220c)로 구성되어 있다.First, the wafer exposure apparatus 200 of the semiconductor device according to the present invention includes a driving circuit unit 210 and a plurality of liquid crystal displays 220a, 220b and 220c electrically connected thereto.

또한, 상기 다수개의 액정디스플레이(220a)(220b)(220c)의 하부에는 소정거리 만큼 이격되고 다수개의 칩(230a)(230b)(230c)을 구비한 웨이퍼(W)가 배치되어 있으며, 상기 다수개의 칩(230a)(230b)(230c) 각각은 상기 다수개의 액정디스플레이(220a)(220b)(220c) 각각에 대향되도록 배치되어 있다.In addition, a plurality of chips 230a, 230b, and 230c are disposed below the plurality of liquid crystal displays 220a, 220b, and 220c, and a plurality of wafers W are disposed. Each of the plurality of chips 230a, 230b, and 230c is disposed to face each of the plurality of liquid crystal displays 220a, 220b, and 220c.

이하에서는, 본 발명에 따른 반도체소자의 웨이퍼 노광장치의 동작을 설명한다.Hereinafter, the operation of the wafer exposure apparatus of the semiconductor device according to the present invention will be described.

먼저, 웨이퍼 에지부(B영역)의 칩(230c)은 차광될 대상이므로 그 상부에 배치된 액정디스플레이(220c)는 오프(Off)하고, 웨이퍼 다이(A영역)의 칩(230a)(230b)은 노광될 대상이므로 그 상부에 배치된 액정디스플레이(220a)(220b)는 온(On)시킨다.First, since the chip 230c of the wafer edge portion (region B) is a target to be shielded, the liquid crystal display 220c disposed thereon is turned off, and the chips 230a and 230b of the wafer die (region A) are turned off. Since the target is to be exposed, the liquid crystal displays 220a and 220b disposed thereon are turned on.

이로써 상기 웨이퍼 에지부의 칩(230c)을 보다 정확하게 선별적으로 차광하여 상기 웨이퍼 다이의 칩(230a)(230b)만을 노광시킴으로써 노광공정에서의 노광 정확도를 향상시킬 수 있다.As a result, the chip 230c of the wafer edge portion may be selectively shielded more accurately to expose only the chips 230a and 230b of the wafer die, thereby improving exposure accuracy in the exposure process.

즉, 종래의 노광방법에서는 수십㎛ 내지 수백㎛의 정확도를 갖는 반면, 본 발명에 따른 노광방법은 보다 정밀한 1셀(픽셀)크기인 수㎛정도의 정확도를 확보할 수 있다.That is, in the conventional exposure method, while having an accuracy of several tens of micrometers to several hundreds of micrometers, the exposure method according to the present invention can secure an accuracy of about several micrometers, which is a more precise one cell (pixel) size.

도 6a 내지 도 6e는 본 발명에 따른 반도체소자의 웨이퍼 노광장치에 의해형성된 다양한 노광패턴을 도시한 도면이다.6A to 6E illustrate various exposure patterns formed by the wafer exposure apparatus of the semiconductor device according to the present invention.

도 6a 내지 도 6e에 도시된 바와 같이, 상술한 반도체소자의 웨이퍼 노광장치를 이용하면, 마스크내 칩의 크기 및 어레이 뿐만 아니라 그 방향성 및 노광패턴에 관계없이 마스킹 정보에 따라 액정디스플레이(220a)(220b)(220c)를 온/오프시켜 노광패턴(300a)(300b)(300c)(300d)(300e)을 다양한 형태로 형성할 수 있다.As shown in FIGS. 6A to 6E, using the above-described wafer exposure apparatus of a semiconductor device, the liquid crystal display 220a (depending on the masking information regardless of the size and array of chips in the mask as well as its orientation and exposure pattern) ( The exposure patterns 300a, 300b, 300c, 300d, and 300e may be formed in various forms by turning on / off the 220b and 220c.

상술한 바와 같이, 본 발명은 칩 어레이의 크기에 맞춰 정확하게 노광 또는 차광함으로써 원하는 칩만을 정확하게 차광하여 웨이퍼내 다이 수를 증가시킬 수 있으며, 또한 스크라이브 라인을 구분짓는 노광 정확성을 월등한 수준으로 향상시켜 공정마진을 극대화할 수 있다는 효과가 있다.As described above, the present invention can increase the number of dies in the wafer by accurately shading only the desired chip by accurately exposing or shading to the size of the chip array, and also improving the exposure accuracy which distinguishes the scribe lines to an excellent level. This has the effect of maximizing process margins.

한편, 본 발명은 상술한 특정의 바람직한 실시예에 한정되지 아니하며, 청구범위에서 청구하는 본 발명의 요지를 벗어남이 없이 당해 발명이 속하는 분야에서 통상의 지식을 가진 자라면 누구든지 다양한 변경 실시가 가능할 것이다.On the other hand, the present invention is not limited to the above-described specific preferred embodiments, and various changes can be made by those skilled in the art without departing from the gist of the invention claimed in the claims. will be.

Claims (2)

동일 평면상에 형성되고, 웨이퍼의 노광용 광원으로 이용되는 다수개의 액정디스플레이; 및A plurality of liquid crystal displays formed on the same plane and used as a light source for exposure of the wafer; And 상기 다수개의 액정디스플레이중 차광할 웨이퍼 칩에 대향하는 액정디스플레이는 오프(Off)시키고, 노광할 웨이퍼 칩에 대향하는 액정디스플레이는 온(On)시키도록 상기 다수개의 액정디스플레이에 전기적으로 연결된 구동회로부를 포함하여 구성된 것을 특징으로 하는 반도체소자의 웨이퍼 노광장치.A driving circuit part electrically connected to the plurality of liquid crystal displays to turn off the liquid crystal display facing the wafer chip to be shielded among the plurality of liquid crystal displays and to turn on the liquid crystal display facing the wafer chip to be exposed. Wafer exposure apparatus of a semiconductor device comprising a. 다수개의 칩이 상부에 형성된 반도체웨이퍼를 제공하는 단계;Providing a semiconductor wafer having a plurality of chips formed thereon; 상기 다수개의 칩에 각각 대향하도록 다수개의 액정디스플레이를 배치하는 단계; 및Arranging a plurality of liquid crystal displays to face the plurality of chips, respectively; And 상기 반도체웨이퍼의 노광할 칩부분의 액정디스플레이는 온(On)시키고, 차광할 칩부분의 액정디스플레이는 오프(Off)시켜 상기 반도체웨이퍼를 노광하는 단계를 포함하여 구성된 것을 특징으로 하는 반도체소자의 웨이퍼 노광방법.And turning on the liquid crystal display of the chip portion to be exposed of the semiconductor wafer and turning off the liquid crystal display of the chip portion to be shielded to expose the semiconductor wafer. Exposure method.
KR1020030020525A 2003-04-01 2003-04-01 Device for exposing wafer of semiconductor device, and method therefor KR20040085733A (en)

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