KR20040060038A - Liquid Crystal Display Device - Google Patents

Abstract

PURPOSE: An LCD(Liquid Crystal Display) is provided to reduce the size of parasite capacitance generated by the region overlapped with a gate line and the data line by opening a partial region of a data line relating to the overlapped region, thereby improving image quality. CONSTITUTION: The region overlapped with a gate line(13) and a data line(15') of the LCD array substrate comprises the gate line(13), a gate insulation film, an active layer(37) and the data line(15') having a partial open region(42). A passivation film(34) is formed on the data line(15') so that the partial open region(42) of the data line(15') is protected. By the partial open region(42), an area 'A' of the data line(15') operating as an electrode of capacitance is reduced and then the size of parasite capacitance is reduced, thereby capable of overcoming deterioration of image quality.

Description

Liquid Crystal Display Device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device which reduces the size of parasitic capacitance generated by an area where a gate line and a data line overlap.

In general, the driving principle of the liquid crystal display device uses the optical anisotropy and polarization of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Accordingly, if the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light polarized by optical anisotropy may be arbitrarily modulated to express image information. The liquid crystal may be classified into a positive liquid crystal having a positive dielectric anisotropy and a negative liquid crystal having a negative dielectric anisotropy according to an electrical property classification, and the liquid crystal molecules having a positive dielectric anisotropy may be formed of liquid crystal molecules in a direction in which an electric field is applied. The long axes are arranged in parallel, and the liquid crystal molecules having negative dielectric anisotropy are arranged in the direction in which the electric field is applied and the long axes of the liquid crystal molecules are vertical.

Currently, an active matrix LCD, in which a thin film transistor (TFT) and pixel electrodes connected to the thin film transistor are arranged in a matrix manner, is generally used because of its excellent resolution and video performance. Looking at the structure of the liquid crystal panel, which is a basic component constituting the following.

1 is an exploded perspective view showing a part of a general liquid crystal display device.

Referring to FIG. 1, a general color liquid crystal display includes a color filter 7 including a black matrix 6 and sub color filters R, G, and B, and a common electrode 18 transparent on the color filter. And a lower substrate 22 having an array wiring including a pixel region P, a pixel electrode 17 formed on the pixel region, and a switching element T formed thereon. The liquid crystal 14 described above is filled between the lower substrate 22 and the lower substrate 22.

The lower substrate 22 is also referred to as an array substrate, and the thin film transistor T, which is a switching element, is disposed in a matrix form, and a gate line 13 and a data line 15 passing through the plurality of thin film transistors are formed.

In addition, the pixel area P is a region where the gate line 13 and the data line 15 cross each other. The pixel electrode 17 formed on the pixel region P uses a transparent conductive metal having a relatively high transmittance of light, such as indium tin oxide (ITO).

In the liquid crystal display device 11 configured as described above, the liquid crystal layer 14 positioned on the pixel electrode 17 is oriented by a signal applied from the thin film transistor, and the liquid crystal layer depends on the degree of alignment of the liquid crystal layer. The image can be expressed by controlling the amount of light passing through the image.

2 is an enlarged plan view schematically illustrating some pixels of a conventional array substrate for a liquid crystal display device.

Referring to FIG. 2, the gate line 13 and the data line 15 cross each other to define the pixel region P. The gate electrode 13 is formed at the intersection of the gate line 13 and the data line 15. A thin film transistor T composed of 31, a source electrode 33, and a drain electrode 35 is formed.

The source electrode 33 and the drain electrode 35 are configured to be spaced apart from each other by a predetermined interval on the gate electrode 31, and an active channel (semiconductor layer) 37a is exposed between the source electrode 33 and the drain electrode 35.

When a predetermined scanning pulse is applied to the gate electrode 31 of the thin film transistor, the voltage of the gate electrode 31 is increased accordingly, and the thin film transistor is turned on. At this time, the liquid crystal driving voltage is applied to the liquid crystal from the data line 15 via the drain and the source of the thin film transistor T, and the pixel capacitance of the liquid crystal capacitor C _LC and the storage capacitor C _ST is increased. Is charged. By repeating this operation, a voltage corresponding to the video signal is repeatedly applied to the pixel capacitance on the front of the panel every frame time. As a result, when an arbitrary pixel is switched by the thin film transistor, the switched arbitrary pixel can transmit the light of the lower light source.

However, the plurality of gate lines and data lines defining each of the pixel regions P are always overlapped with a predetermined portion 40, and the overlapped portions have parasitic capacitance of Ccross by the gate lines and the data lines.

The Ccross causes cross talk when the liquid crystal display is driven in a line inversion manner, and as a result, the liquid crystal display described above by the generation of the parasitic capacitance Ccross. Has the disadvantage that the image quality is lowered.

The present invention provides a liquid crystal display device that improves the image quality of a liquid crystal display by reducing the size of parasitic capacitance generated by the overlapping region by opening a portion of the data line in an area where the gate line and the data line overlap. The purpose.

1 is an exploded perspective view showing a part of a general liquid crystal display device.

2 is an enlarged plan view schematically showing some pixels of a conventional array substrate for a liquid crystal display device;

3 is an enlarged plan view schematically illustrating some pixels of a liquid crystal display array substrate according to an exemplary embodiment of the present invention;

4 is a cross-sectional view of a specific portion A-A 'of FIG. 3. FIG. 5 is an enlarged plan view schematically showing some pixels of a liquid crystal display array substrate according to another exemplary embodiment of the present invention.

6A to 6B are cross-sectional views of specific portions B-B 'and C-C' of FIG.

<Explanation of symbols for the main parts of the drawings>

13: gate line 15: data line

15 ': Data line open to a partial region 17': Pixel electrode

31: gate electrode 33: source electrode

35 drain electrode 40 overlapping portion

42: open area 44: contact hole

In order to achieve the above object, a liquid crystal display device according to the present invention includes a liquid crystal display device in which a gate line and a gate electrode, a gate insulating film, an active layer, a data line and a source / drain electrode, a protective film layer, and a pixel electrode are sequentially formed on a substrate. The method may further include opening a portion of the data electrode to a region where the gate line and the data line overlap each other.

The open data electrode may be formed at a central portion of the data line region overlapping the gate line.

The pixel electrode may be patterned on the data line in which the partial region is open.

The pixel electrode may be in electrical contact with the data line, and the electrical contact between the pixel electrode and the data line may be due to a contact hole formed in a portion of the region where the gate line and the data line do not overlap.

According to the present invention, the image quality of the liquid crystal display is improved by reducing the size of parasitic capacitance generated between the overlapping gate line and the data line.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is an enlarged plan view schematically illustrating some pixels of a liquid crystal display array substrate according to an exemplary embodiment of the present invention.

Referring to FIG. 3, some pixels of the liquid crystal display array substrate according to the exemplary embodiment of the present invention are formed by defining the pixel region P by crossing each gate line 13 and data line 15 ′. The thin film transistor T including the gate electrode 31, the source electrode 33, and the drain electrode 35 is formed at the intersection point of the gate line 13 and the data line 15 ′.

In addition, the source electrode 33 and the drain electrode 35 are configured to be spaced apart from each other by a predetermined interval on the gate electrode 31, and an active channel (semiconductor layer) 37a is exposed between the source electrodes 33 and the drain electrode 35. A gate insulating film (not shown) is formed between the source / drain electrodes 33 and 35 and the gate electrode 31, and the drain electrode and the pixel electrode contact each other by a contact hole of a passivation layer formed on the drain electrode. Is electrically connected.

When a predetermined scanning pulse is applied to the gate electrode 31 of the thin film transistor, the voltage of the gate electrode 31 is increased accordingly, and the thin film transistor is turned on. At this time, the liquid crystal driving voltage is applied to the liquid crystal from the data line 15 via the drain and the source of the thin film transistor T, and the pixel capacitance of the liquid crystal capacitor C _LC and the storage capacitor C _ST is increased. Is charged. By repeating this operation, a voltage corresponding to the video signal is repeatedly applied to the pixel capacitance on the front of the panel every frame time. As a result, when an arbitrary pixel is switched by the thin film transistor, the switched arbitrary pixel can transmit the light of the lower light source.

However, the plurality of gate lines 13 and the data lines 15 defining each of the pixel regions P are always overlapped with a portion 40, and the overlap portion 40 is the gate line 13. And a parasitic capacitance of Ccross by the data line 15, and the Ccross causes cross talk when the liquid crystal display is driven in a line inversion manner.

In order to overcome this problem, the array substrate of the liquid crystal display according to the present invention includes a portion corresponding to an area where the gate line 13 and the data line 15 'intersect, that is, an area where the gate line and the data line overlap. The partial region 42 of the data electrode is opened with respect to 40. The open area 42 of the data electrode is formed at the center of the data line 15 ′ overlapping with the gate line 13.

As such, the data serving as an electrode of capacitance is opened by opening part of the region 42 of the data line 15 'corresponding to the region 40 where the gate line 13 and the data line 15' overlap. It is possible to reduce the area of the line 15 ', thereby reducing the size of the Ccross parasitic capacitance.

4 is a cross-sectional view of a specific portion A-A 'of FIG. 3. That is, FIG. 4 is a cross-sectional view of a region where the gate line 13 and the data line 15 ′ of the liquid crystal display array substrate according to the exemplary embodiment overlap.

Referring to FIG. 4, the region has a structure in which a gate line 13, a gate insulating layer 32, an active layer 37, and a data line 15 ′ in which some regions are opened are sequentially stacked. In addition, the data line 15 ′ in which the partial region is opened is protected by the passivation layer 34 formed thereon.

The storage capacitance between the two electrodes is known The size of the storage capacity is determined by, and C is the storage capacity, Denotes the dielectric constant, A denotes the area of the electrode, and d denotes the distance between the electrodes.

In other words, the capacitance Ccross formed between the gate line 13 and the data line 15 'by overlapping and overlapping the gate line 13 and the data line 15' has a gate insulating film interposed therebetween. Dielectric constant of (32) and active layer (37) The size is determined by the distance d between the gate line 13 and the data line 15 'serving as the upper and lower electrodes, respectively, and the area A of each electrode corresponding to the overlapped region 40.

In the present invention, the partial region 42 of the data line 15 'is open to the portion 40 corresponding to the overlapping region, and the region 42 of the open data line is the gate line. It is formed in the center portion of the data line region 15 'overlapping with (13).

By opening the partial data line 42 of the data line 40 corresponding to the region where the gate line 13 and the data line 15 ′ overlap, the data line serving as an electrode of the capacitance ( The area A of 15 ') can be reduced, thereby reducing the size of the Ccross parasitic capacitance, thereby overcoming the problem of deterioration in image quality of the liquid crystal display.

5 is an enlarged plan view schematically illustrating some pixels of a liquid crystal display array substrate according to another exemplary embodiment of the present invention.

Referring to FIG. 5, some of the pixels of the liquid crystal display array substrate according to the exemplary embodiment of the present invention have the same structure as the array substrate of the liquid crystal display apparatus according to the exemplary embodiment of the present invention.

That is, each gate line 13 and the data line 15 ′ cross each other to define the pixel region P, and the gate electrode 13 is formed at the intersection of the gate line 13 and the data line 15 ′. A thin film transistor T composed of a 31, a source electrode 33, and a drain electrode 35 is formed, and the source electrode 33 and the drain electrode 35 are spaced apart from each other by a predetermined distance above the gate electrode 31. The active channel (semiconductor layer) 37a is exposed between and spaced apart.

In addition, a gate insulating film (not shown) is formed between the source / drain electrodes 33 and 35 and the gate electrode 31, and the drain electrode and the pixel electrode are formed in the contact hole of the passivation layer formed on the drain electrode. And a portion 40 corresponding to an area where the gate line 13 and the data line 15 'intersect, that is, an area where the gate line and the data line overlap. Some regions of the data electrode are open.

The array substrate of the liquid crystal display according to another exemplary embodiment of the present invention is characterized in that the pixel electrode 17 'is formed on the data line 15' where the partial region 42 is open. .

Here, the pixel electrode 17 'is in electrical contact with the data line 15', and the electrical contact between the pixel electrode 17 'and the data line 15' is in contact with the gate line 13. The contact hole 44 is formed in a portion of the region where the line 15 'does not overlap. As such, the pixel electrode 17' is in electrical contact with the data line 13 and the data line 15 'thereon. ), The partial region 42 of the data line corresponding to the overlap region 40 is opened, thereby making it possible to compensate for the increase in the resistance of the portion.

6A to 6B are cross-sectional views of specific portions B-B 'and C-C' of FIG. 5. That is, FIG. 6A is a cross-sectional view of a region where the gate line and the data line overlap each other in the liquid crystal display array substrate according to another embodiment of the present invention, and FIG. 6B is a cross-sectional view of the liquid crystal display array substrate according to another embodiment of the present invention. A cross-sectional view of a data line.

FIG. 6A is similar in configuration to that of the cross-section shown in FIG. 4, except that a pixel electrode 17 ′ is formed on the passivation layer 34. The capacitance Ccross formed between the data line and 15 'is reduced in size as described above, thereby overcoming the problem of deterioration in image quality of the liquid crystal display.

However, in this case, as the width of the data line 15 'decreases, a resistance of the region increases due to the property of the resistance inversely proportional to the width of the conductor.

In order to overcome this, another embodiment of the present invention is formed by patterning the pixel electrode 17 'on the data line 15' in which the partial region 42 is open.

Here, the pixel electrode 17 'is in electrical contact with the data line 15', and the electrical contact between the pixel electrode 17 'and the data line 15' is in contact with the gate line 13. The contact hole 44 is formed in a part of the region where the line 15 'does not overlap.

By forming the pixel electrode 17 'in contact with the data line 15' and the data line 15 'as described above, the partial region 42 of the data line corresponding to the overlap region 40 is opened to open the portion. Will be able to compensate for the increased resistance.

However, the pixel electrode 17 'does not serve to form a pixel of the liquid crystal display like the general pixel electrode 17, but merely to compensate for the resistance of the data line 15' in which a partial region is opened. It is characterized in that it is formed by being in electrical contact thereon patterned at the time of forming the general pixel electrode 17.

In addition, the pixel electrodes 17 and 17 'generally use a transparent conductive metal having a relatively high transmittance of light, such as indium-tin oxide (ITO).

As described above, according to the liquid crystal display device according to the present invention, the image quality of the liquid crystal display device is improved by reducing the size of parasitic capacitance generated between the overlapping gate line and the data line.

Claims (5)

In a liquid crystal display device in which a gate line, a gate electrode, a gate insulating film, an active layer, a data line and a source / drain electrode, a protective film layer, and a pixel electrode are sequentially formed on a substrate, And a portion of the data electrode is opened in a region where the gate line and the data line overlap each other. The method of claim 1, And an area of the open data electrode is formed in a central portion of the data line region overlapping the gate line. The method of claim 1, And a pixel electrode formed on the data line in which the partial region is open. The method of claim 3, wherein And the pixel electrode is in electrical contact with the data line. The method of claim 4, wherein And the electrical contact between the pixel electrode and the data line is due to a contact hole formed in a portion of the region where the gate line and the data line do not overlap.