KR20040056032A - Method of forming a micro photoresist pattern in a semiconductor device - Google Patents
Method of forming a micro photoresist pattern in a semiconductor device Download PDFInfo
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- KR20040056032A KR20040056032A KR1020020082553A KR20020082553A KR20040056032A KR 20040056032 A KR20040056032 A KR 20040056032A KR 1020020082553 A KR1020020082553 A KR 1020020082553A KR 20020082553 A KR20020082553 A KR 20020082553A KR 20040056032 A KR20040056032 A KR 20040056032A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
- H01L21/0275—Photolithographic processes using lasers
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/40—Treatment after imagewise removal, e.g. baking
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- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
Description
본 발명은 반도체 소자의 미세 감광막 패턴 형성 방법에 관한 것으로 특히, 임계 치수 측정시 패턴 무너짐(pattern collaspse) 현상이 발생하지 않는 미세 감광막 패턴 형성 방법에 관한 것이다.The present invention relates to a method of forming a fine photoresist pattern of a semiconductor device, and more particularly, to a method of forming a fine photoresist pattern in which a pattern collapsing phenomenon does not occur when a critical dimension is measured.
최근에 반도체 소자의 집적도가 증가함에 따라 소자 제조를 위한 최소 선폭(Minimum feature size)이 급격히 작아지고 있으며, 이러한 최소선폭은 노광장비 능력에 의존한다.Recently, as the degree of integration of semiconductor devices increases, the minimum feature size for fabricating devices decreases rapidly, and the minimum line width depends on the exposure equipment capability.
현재의 노광장비의 패턴 형성 능력은 i-line의 365nm파장의 광원을 사용할시 0.28㎛의 선폭을 형성할 수 있고, DUV(Deep Ultra Violet)의 248nm파장의 광원을 사용시 0.18㎛의 선폭을 형성할 수 있다.The pattern forming ability of the current exposure equipment can form a line width of 0.28 μm using an i-line 365 nm wavelength light source and a line width of 0.18 μm using a DUV (Deep Ultra Violet) 248 nm wavelength light source. Can be.
최근에는, 248nm파장의 광원을 발생하는 KrF 엑시머 레이저를 이용한 DUV광원을 이용하는 스테퍼(Stepper)나 주사방식(Scanning)의 노광장비를 사용하고 있다. 이러한 DUV-리소그래피(Lithography)에서 해상력(Resolution)을 높이기 위한 여러가지 기술을 조합하여도 0.1㎛이하의 패터닝은 불가능하므로, 새로운 광원, 예컨대, 전자빔(Electron beam), X-ray ＆ EUV(Extreme Ultra Violet)를 갖는 리소그래피의 개발이 활발히 진행되고 있다.Recently, a stepper or scanning exposure apparatus using a DUV light source using a KrF excimer laser that generates a light source having a wavelength of 248 nm has been used. The combination of various techniques for increasing resolution in such DUV-lithography is impossible to pattern less than 0.1 μm, so new light sources such as electron beam, X-ray & Extreme Ultra Violet (EUV) are not possible. The development of lithography with) is actively underway.
그러나, 전자빔(E-beam) 노광은 낮은 제품산출량(Throughput)으로 양산에 불합리하며, X-ray의 경우, 마스크, 정렬, 레지스트 및 제품 생산성 등이 아직 미비하여 문제점으로 남아있다.However, E-beam exposure is unreasonable in mass production due to low throughput, and in the case of X-ray, masks, alignment, resists, and product productivity remain insufficient.
그러므로 0.1㎛ 이하의 패턴을 구현하려면 ArF 감광막과 ArF(193nm)엑시머 레이저를 사용해야만 한다. 그러나 ArF 감광막을 패터닝 한 후 임계 치수(CD)를 측정하면 시간이 지남에 따라 CD SEM 장비에서 나오는 전자로 인해 감광막 패턴의 사이즈가 변하는 슬림 현상이 발생한다. 즉, ArF 감광막을 패터닝 하는 경우, 임계 치수 슬림 현상, 패턴 무너짐, 에치 레지스턴트등의 문제가 있다.Therefore, in order to realize a pattern of 0.1 μm or less, an ArF photosensitive film and an ArF (193 nm) excimer laser must be used. However, if the critical dimension (CD) is measured after the ArF photoresist is patterned, a slim phenomenon occurs in which the size of the photoresist pattern changes due to the electrons from the CD SEM equipment. That is, when patterning an ArF photosensitive film, there exist problems, such as a critical dimension slim phenomenon, a pattern collapse, and an etch resist.
도 1a 내지 도 1c를 참조하여 종래의 미세 패턴 형성 방법을 설명하기로 한다.Referring to Figures 1a to 1c it will be described a conventional fine pattern formation method.
도 1a 를 참조하면, 반도체 기판(1)상에 산화막 또는 질화막과 같은 절연막(2)이 형성되고 그 상부에 ArF 감광막(3)이 형성된다. 광차단 영역인 크롬(4)이 형성된 마스크(5)와 193nm ArF 파장을 갖는 ArF 엑시머 레이저(도시 안됨)를 이용한 노광 공정이 실시된다.Referring to FIG. 1A, an insulating film 2 such as an oxide film or a nitride film is formed on a semiconductor substrate 1, and an ArF photosensitive film 3 is formed thereon. The exposure process using the mask 5 in which the chromium 4 which is a light blocking area | region was formed, and the ArF excimer laser (not shown) which has a 193 nm ArF wavelength are performed.
도 1b 는 현상 공저을 실시하여 감광막 패턴(30)이 형성된 상태의 단면도를 나타낸다.1B is a cross-sectional view of a state in which a photosensitive film pattern 30 is formed by developing a developer.
도 1c 는 CD SEM 장비를 이용하여 감광막 패턴(30)의 임계 치수를 측정한 후 시간이 경과함에 따라 CD SEM장비에서 나오는 전자로 인해 감광막의 임계 치수가 변화된 상태를 보여 주고 있다.FIG. 1C illustrates a state in which the critical dimension of the photoresist film is changed due to the electrons from the CD SEM device after the critical dimension of the photoresist pattern 30 is measured using the CD SEM equipment.
즉, ArF 감광막을 패터닝 한 후 임계 치수(CD)를 측정하면 시간이 지남에 따라 CD SEM 장비에서 나오는 전자로 인해 감광막 패턴의 사이즈가 변하는 슬림 현상이 발생한다.That is, if the critical dimension (CD) is measured after the ArF photoresist is patterned, a slim phenomenon occurs in which the size of the photoresist pattern changes due to the electrons from the CD SEM equipment.
따라서, 본 발명은 임계 치수 측정후에도 패턴 슬림 또는 패턴 무너짐이 발생하지 않는 미세 감광막 패턴 형성 방법을 제공하는데 그 목적이 있다.Accordingly, an object of the present invention is to provide a method for forming a fine photoresist pattern in which a pattern slim or pattern collapse does not occur even after a critical dimension measurement.
도 1a 내지 도 1c 는 종래의 반도체 소자의 미세 감광막 패턴 형성 방법을 설명하기 위한 단면도이다.1A to 1C are cross-sectional views illustrating a method of forming a fine photosensitive film pattern of a conventional semiconductor device.
도 2a 내지 도 2c 는 본 발명에 따른 반도체 소자의 미세 감광막 패턴 형성 방법을 설명하기 위한 단면도이다.2A to 2C are cross-sectional views illustrating a method of forming a fine photosensitive film pattern of a semiconductor device according to the present invention.
* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
1: 반도체 기파 2: 절연막1: semiconductor wave 2: insulating film
3: 감광막 30: 감광막 패턴3: photosensitive film 30: photosensitive film pattern
5: 마스크5: mask
상술한 목적을 달성하기 위한 본 발명에 따른 반도체 소자의 미세 감광막 패턴 형성 방법은 하부 구조가 형성된 반도체 기판을 제공하는 단계;According to another aspect of the present invention, there is provided a method of forming a fine photoresist pattern of a semiconductor device, the method including: providing a semiconductor substrate having a lower structure;
상기 반도체 기판상에 ArF 감광막을 형성하는 단계;Forming an ArF photosensitive film on the semiconductor substrate;
상기 ArF 감광막을 ArF 엑시머 레이저를 이용하여 노광하는 단계;Exposing the ArF photosensitive film using an ArF excimer laser;
상기 ArF 감광막을 현상하여 ArF 감광막 패턴을 형성하는 단계;Developing the ArF photoresist to form an ArF photoresist pattern;
상기 감광막 패턴을 UV 베이킹 공정을 통해 경화시키는 단계를 포함하여 이루어 진 것을 특징으로 한다.It characterized in that it comprises a step of curing the photosensitive film pattern through a UV baking process.
이하, 첨부된 도면을 참조하여 본 발명의 실시예를 상세히 설명하기로 한다.Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 2a 내지 도 2c 는 본 발명에 따른 반도체 소자의 미세 감광막 패턴 형성 방법을 설명하기 위한 단면도이다.2A to 2C are cross-sectional views illustrating a method of forming a fine photosensitive film pattern of a semiconductor device according to the present invention.
도 2a 를 참조하면, 반도체 기판(1)상에 산화막 또는 질화막과 같은 절연막(2)이 형성되고 그 상부에 ArF 감광막(3)이 형성된다. 광차단 영역인 크롬(4)이 형성된 마스크(5)와 193nm ArF 파장을 갖는 ArF 엑시머 레이저(도시 안됨)를 이용한 노광 공정이 실시된다.Referring to FIG. 2A, an insulating film 2 such as an oxide film or a nitride film is formed on the semiconductor substrate 1, and an ArF photosensitive film 3 is formed thereon. The exposure process using the mask 5 in which the chromium 4 which is a light blocking area | region was formed, and the ArF excimer laser (not shown) which has a 193 nm ArF wavelength are performed.
도 2b 는 현상 공정을 실시하여 감광막 패턴(30)이 형성된 상태의 단면도를 나타낸다.2B shows a cross-sectional view of a state in which a photosensitive film pattern 30 is formed by performing a developing step.
도 2c 는 감광막(3)내에서 크로스 링킹(cross-liking)이 일어나면서 경화되도록 UV(ultra violet)베이킹을 실시하는 상태의 단면도이다. 감광막의 경화 방법은 트랙 장비에서도 이루어지나 베이킹 온도의 한계 즉, 온도가 너무 높으면 감광막이 플로잉(flowing)되거나 연소(burning)되므로로 바람직 하지 않다. UV 베이킹 공정은 수은이 첨가된 제논 램프 또는 딥 UV 램프(Deep UV Lamp)를 사용하여 실시되는데 후자가 본 발명에 있어서는 적합하다.FIG. 2C is a cross-sectional view of a state in which UV (ultra violet) baking is performed to harden while cross-liking occurs in the photosensitive film 3. The hardening method of the photoresist film is also performed in track equipment, but it is not preferable because the photoresist film flows or burns when the limit of baking temperature, that is, the temperature is too high. The UV baking process is carried out using a mercury-added xenon lamp or a Deep UV Lamp, the latter being suitable for the present invention.
상술한 공정에 의해 형성된 감광막 패턴의 임계 치수는 CD SEM 장비를 이용하여 측정한 후 시간이 경과하더라도 변하지 않게 된다. 즉, CD SEM장비에서 나오는 전자로 인해 감광막의 임계 치수가 변화되는 현상을 제거할 수 있게된다.The critical dimension of the photoresist pattern formed by the above-described process does not change even if time passes after the measurement using the CD SEM equipment. In other words, it is possible to eliminate the phenomenon that the critical dimension of the photosensitive film is changed due to the electrons from the CD SEM equipment.
따라서, ArF 감광막을 패터닝 한 후 임계 치수(CD)를 측정하면 시간이 지남에 따라 CD SEM 장비에서 나오는 전자로 인해 감광막 패턴의 사이즈가 변하는 슬림 현상은 본 발명의 바람직한 실시예에 의해 개선될 수 있게 된다.Therefore, if the critical dimension (CD) is measured after patterning the ArF photoresist film, the slim phenomenon in which the size of the photoresist pattern changes due to electrons from the CD SEM equipment may be improved by the preferred embodiment of the present invention. do.
상술한 바와 같이 본 발명에 의하면 감광막 패턴의 임계 치수 측정 후 시간이 경과 함에 따라 그 치수가 감소되는 현상을 방지 할 수 있는 탁월한 효과가 있다.As described above, according to the present invention, there is an excellent effect of preventing the phenomenon that the dimension decreases with time after measuring the critical dimension of the photoresist pattern.
본 발명은 실시예를 중심으로 하여 설명되었으나 당 분야의 통상의 지식을 가진 자라면 이러한 실시예를 이용하여 다양한 형태의 변형 및 변경이 가능하므로 본 발명은 이러한 실시예에 한정되는 것이 아니라 다음의 특허 청구 범위에 의해 한정된다.Although the present invention has been described with reference to the embodiments, one of ordinary skill in the art can modify and change various forms using such embodiments, and thus the present invention is not limited to these embodiments. It is limited by the claims.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100784389B1 (en) * | 2006-06-22 | 2007-12-11 | 삼성전자주식회사 | Photo lithography system and method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100784389B1 (en) * | 2006-06-22 | 2007-12-11 | 삼성전자주식회사 | Photo lithography system and method |
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