KR20040044241A - Compensation apparatus and method of clock declination of system using round trip - Google Patents

Abstract

PURPOSE: A system clock deviation correction apparatus and a method by using a round-trip-delay are provided to minimize the data slip generated by the difference between each of the reference system clocks at time of final packet transmission and reception. CONSTITUTION: A system clock deviation correction apparatus by using a round-trip-delay includes a global positioning system(GPS) receiver(200), a system clock generation and division part(210), a plurality of clock receivers(221-22n) and a round-trip correction part(230). The GPS receiver(200) generates a reference clock by using a position and a time information received from the GPS. The system clock generation and division part(210) creates and divides the system clock required for the packet transmission and reception by using the reference clocks of the GPS receiver(200). The plurality of clock receivers(221-22n) is connected to each of the cables of the system clock generation and division part(210). And, the round-trip correction part(230) measures the round-trip-delay of each clock receiver loop backed by the clock loop path installed on the cable junction portions of the clock receivers(221-22n).

Description

Compensation apparatus and method of clock declination of system using round trip}

The present invention relates to an apparatus and method for correcting a system clock deviation using a round trip delay for minimizing a deviation between system clocks provided for transmitting and receiving a packet in a system clock generation and distribution apparatus of a mobile communication system.

The location tracking service in the CDMA network detects and tracks the location of the mobile terminal using a GPS (Global Positioning System) and a mobile phone network (Cell Tracking).

The location tracking service using the mobile communication network is largely classified into three types. There is a BASE ID (or pilot PN) method in which the first is simply determined as being within an area serviced by one base station. Secondly, there is a method of using the RTD (Round Trip Delay) or Phase as a method of identifying the position information to some extent. Finally, it is divided into a method of processing with the help of a mobile communication network using GPS in the terminal.

1 is a block diagram showing a conventional system clock distribution device.

Referring to FIG. 1, a GPS receiver 100 generating a high-precision reference clock by receiving position and time information transmitted from a GPS, and a system clock required for packet transmission and reception using a clock generated by the GPS receiver. The system clock generation and distribution unit 110 generates and distributes and transmits the clocks to the clock receivers 121 to 12n.

Here, each of the receivers 121 to 12n is a base station controller (BSC) that is matched to one CAN (Central ATM network) in a CDMA system, and is generally composed of 12.

Referring to the operation, the GPS receiver 100 receives the position and time information from the GPS satellites, and generates a reference clock (10 MHz, 1 PPS) as a reference for generating the system clock by using the received position and time information. The clock generation and distribution unit 110 is transferred.

The system clock generation and distribution unit 110 generates a system clock necessary for packet transmission and reception by operating an internal PLL logic using the received clocks (10 MHz, 1 PPS) and uses 12 distribution receivers 121 to 12 through a distribution element. 12n) to transmit.

Here, since each clock receiver is used in a separate device at the time of system clock distribution, the system clock generation and distribution unit 110 and the respective clock receivers 121 to 12n are connected by a PECL (Pesudo Emmitter Couple Logic) method. Each cable is used for transmission. These system clocks are different for individual devices and may vary with network architecture design.

Then, each clock receiving unit 121 to 12n corresponds to a base station controller (BSC), and performs packet transmission and reception using the transferred system clock.

However, in the related art, as a distribution scheme for simply distributing the same clock in the system clock generation and distribution unit, each delay time due to different cable lengths according to electrical individual characteristics or installation positions is different. This may cause data sleep or the like as each system clock is different at the time of the last packet transmission and reception.

The present invention has been made to solve the above problems, and an object thereof is to provide an apparatus and method for correcting a system clock deviation using a round trip delay to differentially distribute a system clock transmitted to a lower clock receiver.

Another feature includes a round trip path at the cable matching section of the clock receiver, which receives feedback from the distributed system clocks sent to the round trip path to measure the round trip delay and compensates for each round trip path. It is an object of the present invention to provide an apparatus and method for correcting a system clock deviation using a trip delay.

It is another object of the present invention to provide an apparatus and method for correcting a system clock deviation using a round trip delay to compensate a clock having a phase equal to each round trip delay fed back to provide a differentiated system clock to a clock receiver. have.

1 is a block diagram showing a system clock distribution device in a conventional mobile communication system.

2 is a diagram illustrating a system clock deviation correction apparatus using a round trip delay according to an exemplary embodiment of the present invention.

3 is a flowchart illustrating a system clock correction method using a round trip delay according to the present invention.

<Description of the symbols for the main parts of the drawings>

200 ... GPS receiver 210 ... System clock generation and distribution

221 ~ 22n ... Clock receiver 230 ... Round trip delay correction unit

231 Phase detection section 232 Phase delay correction section

System clock deviation correction apparatus using a round trip delay in accordance with the present invention for achieving the above object,

A GPS receiver for generating a reference clock using position and time information received from the GPS;

A system clock generation and distribution unit for generating and distributing a system clock for packet transmission and reception using a reference clock of the GPS receiver;

A plurality of clock receivers for transmitting and receiving packets by receiving system clocks distributed by cables connected to the system clock generation and distribution units, respectively;

Round trip correction for measuring the round trip delay of each clock receiver looped back by the clock loop path provided in the cable matching part of the clock receiver and correcting the measured round trip delay deviation to differentially distribute the system clock. It is characterized by including a wealth.

Preferably, the round trip correction unit detects a phase difference by measuring a difference between the system clock and a clock looped back from the clock receiver, and a signal for compensating for the phase delay according to the detected phase difference of the phase detector. It characterized in that it comprises a phase delay correction unit for transmitting to the system clock generation and distribution unit.

Hereinafter, with reference to the accompanying drawings as follows.

The GPS receiver 200 receives a position and time information from a GPS satellite to generate a reference clock, and receives a reference clock received from the GPS receiver 200 to operate a PLL logic to round trip a system clock for packet transmission and reception. A system clock generation and distribution unit 210 for distributing a round trip path, and a plurality of clock receivers 221 connected to the system clock generation and distribution unit 210 by cables and transmitting and receiving packets with the received system clock. 22 n) and round trip delay loops looped back by the cable loop paths of the clock receivers 221 to 22 n to compensate for each measured round delay deviation so as to differentially distribute the system clock deviation. The configuration includes the government 230.

Here, the round trip delay correction unit 230 is detected by the phase detector 231 for detecting a phase difference between the clock of the round trip path of the clock receivers 221 to 22n and the system clock, and the phase detector 231. The phase difference correction unit 232 is configured to transmit the phase difference to the system clock generation and distribution unit 210 so as to differentially distribute the system clock.

The system clock deviation correction apparatus using the round trip delay as described above will be described with reference to the accompanying drawings.

Referring to FIG. 2, the GPS receiver 200 receives location and time information from a GPS satellite and generates a reference clock (10MHz, 1PPS) that is a reference for generating a system clock by using the received location and time information. The clock generation and distribution unit 210 is transferred.

The system clock generation and distribution unit 210 generates internal system clocks for packet transmission and reception by operating internal PLL logic using the received reference clocks (10MHz, 1PPS) and uses a plurality of clock reception units 221 using a distribution device. ~ 22n) is distributed by the round trip path (round trip path) and transmitted. These system clocks are different for individual devices and may vary with network architecture design.

Here, a clock loop path is provided at a cable matching part connected to each clock receiver 221 to 22n, so that a system clock transmitted to each clock receiver is a loopback path.

Each of the clock receivers 221 to 22n corresponds to a base station controller BSC and performs packet transmission and reception using the transferred system clock.

At this time, the round trip delay correction unit 230 measures a round trip delay (RTD: Round Trip Delay) from the clock receivers 221 to 22n connected to each port and compensates each round trip delay by the measured phase difference. By transmitting to the system clock generation and distribution unit 210, it is possible to differentially distribute the system clock.

In other words, the round trip delay correction unit 230 is configured as a digital DLL (Delay Lock Loop), generates and samples a clock equal to a predetermined frequency or more than a corresponding frequency, and then accurately counts using a count logic. I can measure it.

To this end, the round trip correction unit 230 constitutes a phase detector 231 and a phase delay correction unit 232, and the phase detector 231 refers to a system clock provided from the system clock generation and distribution unit 210. By comparing the clocks looped back to the round trip path of each port, a round trip delay (RTD) in a specific transmission path is measured to detect a phase difference.

In addition, the phase delay correction unit 232 transmits a corresponding control signal for generating a clock having a phase corresponding to the phase difference to the system clock generation and distribution unit 210. As a result, the system clock generation and distribution unit 210 differentially distributes the system clock to compensate for each round trip delay.

In addition, by comparing the clock looped back to the round trip path and the original system clock to determine whether it is the same, and by setting the same value as the offset value of the clock receiver (221 ~ 22n), the system clock is divided and distributed to the clock receiver (221 ~ 22n).

As such, even if each clock receiver matched with the system clock generation and distribution unit 210 has distortion, delay, PLL error, and physical and electrical distinct characteristics, it is possible to minimize and provide deviations between individual clocks.

3 is a flowchart illustrating a system clock deviation compensation method using a round trip.

Referring to FIG. 3, a reference clock is generated and transmitted by receiving location and time information from a GPS satellite (S201), and a system clock is generated using the received reference clock by the system clock generator and distributor. The clock receiver transfers the round trip path (S202).

Thereafter, each round trip delay fed back from each round trip path is measured by comparing with the system clock (S203), and compensated for each round trip delay, respectively, and transmitted to the system clock generation and distribution unit (S204).

The system clock generation and distribution unit differentially distributes the system clock by transmitting the compensated system clock in the corresponding round trip path (S205).

Thereafter, the clocks looped back from the round trip path and the original clock are compared with each other, and S204 to S206 are repeatedly performed until they are identical.

As described above, the system clock deviation compensation device using the round trip delay according to the present invention does not simply distribute the system clock but compensates each round trip delay measured by the round trip correction unit so as to differentially distribute the system clock. By compensating for the delay caused by the electrical individual characteristics of the matching clock receiver or the cable length difference according to the installation location, data slippage due to the difference of the respective reference system clocks at the time of the final packet transmission and reception can be minimized. It works.

Claims (4)

A GPS receiver for generating a reference clock using the position and time information received from the GPS, a system clock generation and distribution unit for generating and distributing a system clock for packet transmission and reception using the reference clock of the GPS receiver, and the system A plurality of clock receivers for transmitting and receiving packets by receiving system clocks distributed by cables connected to the clock generation and distribution units, respectively, and each clock receiver looped back by a clock loop path provided at a cable matching portion of the clock receiver. And a round trip correction unit for measuring the round trip delay and correcting each measured round trip delay deviation to differentially distribute the system clock. The method of claim 1, The round trip correction unit measures a difference between a clock looped back from the system clock and a clock receiver and a reference system clock to detect a phase difference, and compensates for the phase delay according to the detected phase difference of the phase detector. And a phase delay correction unit for transmitting a signal for the system clock generation and distribution unit. The method of claim 1, The round trip correction unit is a system clock deviation compensation device using a round trip delay, characterized in that the digital DLL. Generating and transmitting a reference clock using location and time information received from a GPS satellite; Generating and distributing a system clock for transmitting / receiving a packet to a lower clock receiving unit by using the reference clock and transferring it to a round trip path; Measuring each round trip delay fed back from the round trip path and correcting the measured round trip delay; And transmitting a system clock differentiated according to the corrected specific round trip delay to a round trip path of a lower clock receiver.