KR20040031766A - Data modulation apparatus - Google Patents

Abstract

PURPOSE: An apparatus for modulating data is provided to form a modulation code for improving the DC-free performance by applying a multi-coding method to a weak DC-free modulation code. CONSTITUTION: An apparatus for modulating data includes a multiplexing unit(20), an encoding unit(40), and a selection unit(50). The multiplexing unit(20) multiplexes input data divided according to a constant length and provides multiplexed data streams by using the multiplexing information. The encoding unit(40) performs a weak DC-free RLL(Run Length Limited) modulation process for the multiplexed data streams in order not to use a DC control conversion table including additional bits. The selection unit(50) selects the code stream having the minimum quantity of DC components from the multiplexed and RLL-modulated code streams.

Description

Data modulation apparatus

The present invention relates to a method, apparatus and code arrangement method for modulating an n-bit source code into an m-bit channel code, and more particularly, a modulation method and apparatus and code arrangement for providing a modulation code with excellent high code efficiency and DC suppression capability. It is about a method.

There is a multimode coding scheme among the methods for giving DC suppression capability to modulation codes without DC suppression capability. This inserts the additional information of a bit to the inputted data, the addition even if making the 2 ^a different random data sequence in accordance with the information performs modulation without DC suppression ability to heat the 2 ^a different random data of the DC component in the It is a method of having a DC suppression capability by selecting this less modulated data string.

Conventionally, a code of d = 1, k = 7, m = 2, n = 3, as exemplified in “Device for encoding / decoding n-bit source words into corresponding m-bit channel words, and vice versa” in US Pat. No. 6,225,921 The code rate of R is R = 49/75 = 0.6533 when the redundancy of about 2% is included, and the code efficiency R / C (d, k) is 0.6533. /0.6793=96.2%. The modulation code used in US Pat. No. 6,225,921 is referred to hereinafter as "A-Code" for convenience of description.

Code of code d = 1, k = 8, m = 8, n = 12 as exemplified in "Method of allocating RLL code having enhanced DC suppression capability, modulation method, demodulation method, and demodulation apparatus therefor" of US Pat. No. 6,281,815. The rate (R) is R = 32/49 = 0.6531 when the redundancy of about 2% is included and the code efficiency (R / C (d, k)) is R / C (d, k) = 0.6531 / 0.6853 = 95.3%. . The modulation code used in US Pat. No. 6,281,815 is referred to hereinafter as "B-Code" for convenience of description. C means capacity according to d and k of code.

In addition, using the Guided Scrambling method described in Chapter 13 of Kees A. Schouhamer Immink, "Codes for Mass Data Storage Systems," Shannon Foundation Publishers, 1999, inserts four bits of redundancy every 25 bytes of data and d = 1, k = 7 When modulation is performed, the code rate R is R = 200/306 = 0.6536, and the code efficiency R / C (d, k) is R / C (d, k) = 0.6536 / 0.6793 = 96.2%. The modulation code used in the above document is hereinafter referred to as "C-Code" for convenience of explanation.

The power spectral density (PSD) curves showing similar code efficiencies of 95.3% to 96.2% according to the three prior art modulation methods and indicating the DC suppression capability of these codes are shown in FIG.

However, the multi-mode coding scheme exemplified in the above-mentioned document also needs to increase the frequency of additional information for making the data sequence random data in order to have sufficient DC suppression capability. In addition, even if a modulation scheme with high code efficiency is developed, the DC suppression capability may not be sufficient. For example, the B-Code disclosed in the above-mentioned US Patent No. 6,281,815 can also suppress DC without redundancy but does not have satisfactory DC suppression performance without additional bits. In the following, DC suppression is possible without redundancy, but there is no additional bit, so the suppression performance is referred to as a poor DC suppression modulation code (week dc-free modulation code).

Accordingly, an object of the present invention is to provide a modulation code with high DC efficiency and high DC efficiency by combining an insufficient DC suppression modulation code and a multimode coding scheme while maintaining DC suppression performance as in the three prior arts. To provide a data modulation method and apparatus.

Another object of the present invention is to create an insufficient DC suppression modulation code, to generate codewords with constraint restrictions and to retain the original code string characteristics even when codewords are replaced according to boundary rules in code string placement. To provide a code placement method for placing codewords so as to.

1 is a diagram showing a power spectral density (PSD) curve of conventional codes;

2 is a block diagram according to an embodiment of a data modulation device according to the present invention;

3 is a table summarizing the codeword characteristics of major conversion code groups;

4 is a table summarizing the codeword characteristics of auxiliary conversion code groups for DC control;

5 is a table summarizing the next code group (ncg) determined according to the end zero number (EZ),

6 is a view for explaining the condition of the constraint when the codewords a and b are connected,

FIG. 7 is a table illustrating a change in parameter INV before and after code conversion when the condition of the constraint is not satisfied through FIG. 6.

8 illustrates an example of branching of a code string due to DC controllable codewords b1 and b2;

9 is a conversion table showing an example of conversion of multiplexed information to multiplexed ID in the synchronization and multiplexed ID inserter shown in FIG. 2;

10A to 10E illustrate a main conversion code table generated and arranged in consideration of the above matters;

11 is a table of auxiliary conversion codes for DC control generated and arranged in consideration of the above matters;

12 shows a PSD curve of an RLL (1,7) code of the present invention;

13 is a table comparing the recording density and recording efficiency of the RLL (1,7) code and the existing code of the present invention;

14 shows a PSD curve of an RLL (2,10) code of the present invention;

Fig. 15 is a table comparing the recording density and the recording efficiency of the RLL (2,10) code of the present invention and the existing EFMP code.

According to the present invention, the above object is a data modulation method for converting a source data of m bits into a codeword of n bits (n≥m) while restricting the minimum constraint d and the maximum constraint k to: (a) input data Dividing a column into a predetermined length and multiplexing the divided input data string by using a multiplexing scheme using multiplexing information to provide a multiplexed data string; And (b) perform weak DC-free Run Length Limited (RLL) modulation without using a DC control conversion table to which an additional additional bit is added to the multiplexed data string, and performing the most DC among the multiplexed and RLL modulated code strings. A component is achieved by a data modulation method comprising providing a small code string.

According to another aspect of the present invention, the above object is a modulation apparatus for converting m-bit source data into an n-bit (n≥m) codeword while restricting it to a minimum constraint d and a maximum constraint k. Multiplexing means for multiplexing input data divided into predetermined lengths to provide multiplexed data sequences; Encoding means for performing weak DC-free Run Length Limited (RLL) modulation on the multiplexed data string without using a DC control conversion table to which an additional additional bit is added; And selecting means for selecting a code string having the smallest DC component among the multiplexed and RLL modulated code strings.

According to another field of the present invention, the above object is a code placement method of arranging codewords of n bits (n ≧ m) while restricting m bits of source data to minimum constraint d = 1 and maximum constraint k = 7. In: A code string in which codeword a and codeword b are concatenated, codeword a is a preceding codeword, codeword b is selectable between codeword b1 and codeword b2, and codeword a and codeword b1 are concatenated. When code string X1 and codeword a and codeword b2 are connected to code string X2, the codewords b1 and b2 are the next codeword depending on whether the number of bits " 1 " Arranging the INV parameters for predicting the transition to have opposite values; And when the codeword a and the codeword b1 or b2 are connected, even if the codeword a or the codewords b1 and b2 are converted to other codewords by the boundary rule, the code strings X1 and X2 are arranged so that the INV parameter values remain intact. To provide a method of deploying code that includes steps.

According to another aspect of the present invention, the above object is, in a data modulation apparatus, includes an encoder for modulating the source data into a codeword while restricting the source data to a minimum constraint d and a maximum constraint k, wherein the encoder comprises a preceding code. A code indicating the number of " 0s " consecutive in the wordword a, which represents the number of " 0 " contiguous in the direction of the LSB of the word a and in the MSB direction, and the number of " 0 " If the sum of the lead zero of word b is less than the minimum constraint d or is greater than the maximum constraint k, then the end zero of the codeword a and the lead zero of the codeword b are the minimum constraint d. An embodiment of the present invention provides a data modulation device, wherein the codeword a is changed to be equal to or smaller than the maximum constraint length k.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

2 is a block diagram according to an embodiment of a data modulation device according to the present invention.

Referring to FIG. 2, the input data string may be represented by x = (x ₀ , x ₁ , ..., x _k-1 ) as shown in Equation 1, and the input data is input by the vXu divider 10. The column is divided by vXu (= k) as shown in Equation 2, i.e., divided by u bytes for the input data string in units of v bytes.

Where x _{i, j} = x _{ixu + j} .

The multiplexer 20 attaches a bit additional information to each data string of vXu divided by the divider 10, multiplexes the data into L = 2 ^a data strings, and randomizes the data string according to the added multiplexing information s. Convert to After the conversion to the random data, as shown in equations (3) and (4), data of different contents multiplexed into 2 ^a for each data string y _i is generated.

Where function f ( / s) uses multiplexed information s Means the result made with random data.

Synchronizing and multiplexing ID plurality inserter 30 according to the added multiplexing information (in this case L = 2 ^a) may be composed of channels, and, 2 ^a dog with a random data string that is against the multiplexing information is added multiplex multiplexed data A synchronization pattern is inserted into the column, and the multiplexed information is converted into a multiplexed identifier (ID).

The encoder 40 may be composed of a plurality of channels (here, L = 2 ^a ) according to the added multiplexing information, and performs RLL (Run Length Limited) modulation on an insufficient DC suppression code. Since the encoder 30 of the present invention does not have a separate DC suppression code conversion table with additional bits added, it is possible to suppress DC without redundancy but use a code having poor suppression performance. RLL (1,7,8,12) codes can be used as the minimum constraint length d) and the maximum constraint length k = 7. In the synchronization and multiplexing ID inserter 30, the conversion of the multiplexing information into the multiplexing ID is performed by increasing the minimum constraint length with the minimum constraint length (d) = 2 and the maximum constraint length (k) = 7. By increasing the size, you can reduce the interference noise of the signal. As another example, the minimum constraint length d = 2 and the maximum constraint length k = 10 of the encoder 40 may be RLL (2, 10, 8, 15) codes.

The comparator and selector 50 selects one modulation stream with the lowest DC component for the RLL modulated 2 ^a modulation streams.

The following describes the weak dc-free RLL conversion code proposed in the present invention.

In the RLL code represented by (d, k, m, n), among the factors expressing the performance of the code, the aspect of recording density and the ability to suppress the DC component are largely evaluated, and the superiority of the code is evaluated. Where m is the number of data bits (also called the number of bits of source data, information word bits), n is the number of codeword bits after modulation (also called channel bits), and d is between 1 and 1 in the codeword. The minimum number of consecutive zeros that can exist in the (called the minimum run length limit), k is the maximum number of consecutive zeros that can exist between 1 and 1 in the codeword (Maximum Run Length Limit). The bit interval in the codeword is represented as T (corresponding to the clock period during recording or reproduction).

In the modulation method, a method of improving the recording density is to reduce the number of bits n of the codeword while d and m are given under given conditions. However, the RLL code must satisfy the minimum constraint d and the maximum constraint k in the codeword. When the number of data bits is m while satisfying this (d, k) condition, the number of codewords satisfying RLL (d, k) may be 2 ^m or more. However, in order to actually use such a code, the run length constraint, that is, the RLL (d, k) condition must be satisfied even at the part where the codeword and the codeword are connected. If it affects performance, the code you want to use must have DC suppression capability.

In the present invention, two code tables of codewords to be converted with respect to the source code are largely generated, that is, 1) main conversion table and 2) auxiliary conversion table for DC control.

The codeword generation method in each conversion table is as follows, and the following description will be given using (1,7) codes having a minimum constraint of 1 and a maximum constraint of 7 as an example.

3 is a table showing various codeword groups of the main code conversion table and codeword characteristics of the corresponding codegroup.

The minimum constraint length of the code is d, the maximum constraint length is k, the number of bits of the source data is m, and the number of bits of the codeword after modulation is n. The LSB (Least Significant Bit) from the codeword is the direction of the MSB (Most Significant Bit). D = 1, k = 7, m = 8, n = 12, 0≤ when the number of consecutive zeros is EZ (End Zero) and the number of consecutive zeros in the direction from the MSB to LSB is LZ (Lead Zero). Codewords having EZ≤5 are classified according to the conditions of LZ as follows.

(1) Number of codewords satisfying 1≤LZ≤7: 210

(2) Number of codewords satisfying 0≤LZ≤4: 316

(3) Number of codewords satisfying 0≤LZ≤2: 264

In order to modulate source data with m = 8, the number of codewords should be at least 256. However, in the case of (1) above, the number of codewords does not reach 256. The number of codewords can be satisfied. In this case, subtracting 51 of 1010xxxxxxxx from the codewords of LZ = 0 in (2) and adding them to the group of (1) results in the number of codewords belonging to the group (1) being 261 and the group of (2) The number of codewords belonging to 316-51 = 265 is 264, and the number of codewords belonging to the group of (3) is 264, and each group of (1) to (3) has more than 256 codewords. The number of codewords in the corresponding group can satisfy the minimum number of modulation codewords of 256 for 8-bit source data. Of these, only 256 codewords are selected and three main code conversion tables (MCG1 to MCG3) are created. In the table of FIG. 3, MCG (Main Code Group) 1 is a name of a group including codewords corresponding to the condition of (1) above and some (51) codewords taken from a group satisfying (2). , MCG2 and MCG3 are the names of groups including codewords corresponding to the conditions of (2) and (3), respectively, and only 256 codewords from each of these main code groups MCG1-MCG3 are source code. Can be used as transform codes for.

4 is a table showing various codeword groups of the auxiliary conversion table for DC control and codeword characteristics of the corresponding codegroup.

Codewords in the auxiliary control table for DC control are codewords satisfying 6≤EZ≤7 among the codewords of d = 1, k = 7, m = 8, and n = 12 and codes remaining in the main code group. Words and a codeword with LZ = 5, 6 or LZ = 3 are combined and used as a codeword of an ACG for DC control. The conditions for generating this codeword will be described in detail as follows. Each item is indicated in order as the names of the DC control auxiliary conversion tables in the table of FIG. 4 as ACG1, ACG2, and ACG3.

ACG1: 8 codewords with 6≤EZ≤7 and satisfying LZ ≠ 0 + 5 codewords remaining in MCG1 + 2 codewords with 6≤EZ≤7 and LZ = 0 with 1010xxxxxxxx = 15

ACG2: 12 codewords satisfying 6≤EZ≤7 and satisfying 0≤LZ≤6 + 21 codewords satisfying 0≤EZ≤5 and satisfying 5≤LZ≤6 + 9 codewords remaining in MCG2-6≤ 2 codewords with EZ≤7 and LZ = 0 and 1010xxxxxxxx = 40

ACG3: 10 codewords satisfying 6≤EZ≤7 and satisfying 0≤LZ≤3 + 33 codewords satisfying 0≤EZ≤5 and satisfying LZ = 3 + 8 remaining codewords in MCG3 = 51

FIG. 5 shows the next code group M = ncgdet, that is, the previous codeword a determined according to the end zero EZ_a of the previous codeword a in the main conversion table described in FIG. 3 and the auxiliary conversion table for DC control shown in FIG. The following table summarizes the parameter ncg, which represents the next code group in. Codeword b determines the code group to which codeword b belongs according to the end zero number EZ_a of previous codeword a. If EZ_a is 0, the codegroup to which next codeword b belongs is 1 (= MCG1). ), If EZ_a is 1 or more and 3 or less, the code group to which the next codeword b belongs is 2 (= MCG2) .If EZ_a is 4 or more and 7 or less, the code group to which codeword b belongs is 3 (= MCG3). to be.

Meanwhile, the constraint length (d, k) condition must also be satisfied at the point where the codeword a and the codeword b are connected. Figure 6 shows that the codeword a and b are to be considered for the condition of the constraint when connected. In FIG. 6, the sum of the end zero (EZ_a) of the codeword a and the read zero (LZ_b) of the codeword b is a minimum run length d or more and a maximum run length k or less. .

FIG. 7 illustrates a change of the parameter INV before and after code conversion when a case in which a condition of the constraint field described with reference to FIG. 6 does not meet occurs. The parameter INV is a parameter for knowing the transition of the next codeword. If the number of bits "1" is even in the codeword, the INV value is "0". If the number of bits "1" is odd in the codeword, INV is INV. The value of is "1". In addition, the digital sum value (DSV) is a digital sum value in a codeword stream, and when the absolute value of the DSV is small, it means that a DC component or a low frequency component is small. The CSV is a digital sum value within the codeword, and a small CSV means that the DC component or low frequency component of the codeword is small. The CSV is used to evaluate the DC component or the low frequency component during code conversion. If the value of INV accumulated from the codeword stream to the current codeword is "0", the DSV value is updated by adding the CSV value of the next codeword to the accumulated DSV value until the codeword as it is, and the accumulated INV value is " 1 ", the sign of the CSV value of the next codeword is inverted, and the DSV value is updated in addition to the accumulated DSV value until the codeword.

Referring to FIG. 7, the codeword b is determined by the code group to which the codeword b belongs according to the EZ of the previous codeword a. The codeword b lacks the number of codewords in the main conversion table and the auxiliary control table for DC control. When the code group borrowing the codeword is specified in the table, the (d, k) condition may not be satisfied. In FIG. 7, a case of violating d ≦ EZ_a + LZ_b ≦ k is illustrated. In this case, the EZ of the codeword a is changed. Thus, a codeword change occurs because the constraint condition is not satisfied. The parameter INV indicating whether the number of bits "1" in the codeword stream is even or odd may change from the state before the code change by the boundary rule. Due to this feature, care must be taken when placing codewords, especially among code conversion tables that can be DC-controlled.

8 illustrates an example of branching of a code string due to DC controllable codewords b1 and b2. One of the biggest features of the code conversion of the present invention is that the codewords in the two code conversion tables selectable for DC control reverse the INV (the number of bits " 1 " in the codeword stream represents an even or odd number). It is supposed to be maintained. In this case, since the codewords in the two code conversion tables have the opposite INV, one of the two codewords may proceed in a direction in which DC control is optimal. However, as explained in the boundary rules above, there is a case where a change occurs in the INV. In this case, the same phenomenon occurs in the two selectable code conversion tables at the time of DC control, that is, the INV is the same in the two selectable code conversion tables. If it changes, there is no problem. To this end, the present invention designed the code conversion table in consideration of the following matters.

First, in the case of A of FIG. 8, i.e., b1 and b2 which are selectable as codeword b at the point where the codeword a and the codeword b are connected, LZ_b1 (zero lead number of codeword b1) when EZ_a is "xxxxxxxxx101" ) Is " 101xxxxxxxxx ", then LZ_b2 (the number of read zeros of the codeword b2) becomes "101xxxxxxxxx", respectively. That is, codewords with a lead number of "101xxxxxxxxx" are placed in the same position in MCG1 and ACG1, and all codes with EZ "xxxxxxxxx101" are placed in the same position in MCG1 and ACG1, MCG2 and ACG2, MCG3 and ACG3, respectively. In the case where the end zero number of word a is "xxxxxxxxx101", the code string to which codeword b1 belongs or the code string to which codeword b2 belongs is changed according to the boundary rule. Keeps the opposite.

Next, when codewords b1 and b2 are connected to codeword c, respectively, in FIG. 8, that is, codeword b and codeword c are connected, codewords b1, b2 or codeword c are different from each other by a boundary rule. Even if it is converted to a word, the parameter string of INV is maintained as it is while the code string to which the codeword b1 and the codeword c are connected and the code string to which the codeword b2 and the codeword c are connected.

The synchronization pattern and the multiplexed ID will be described.

In a modulation scheme in which the maximum number of zeros k = 7 between bits 1 and 1 is used, "010000000010000000010" is used to violate the limitation of k = 7 as a synchronization pattern.

Sync Pattern: 010000000010000000010

The multiplexing ID is converted into 6 bits as shown in FIG. 9 using 4 bits of multiplexing information for multiplexing the data strings. In this case, one data string is converted into a random data string of L = 2 ⁴ = 16 types.

10A to 10E are main conversion code tables created and arranged in consideration of the above-described matters.

11 is a code conversion table for auxiliary DC control generated and arranged in consideration of the above-described matters. When using codewords in the auxiliary control table for DC control, it is only necessary to check whether the run length violation between the previous codeword (codeword a in FIG. 8) and the following codeword (codeword c in FIG. 8) is checked and not violated. Should be used.

12 is a diagram illustrating a PSD curve for a code string after performing RLL (1,7) modulation according to the method proposed by the present invention.

FIG. 13 is a table summarizing the code rate and code efficiency obtained by comparing the RLL (1,7) code proposed in the present invention with conventional codes A-Code, B-Code and C-Code. The RLL (1,7) code of the present invention has a similar DC suppression capability as compared to the conventional code string, and has the advantage of high code efficiency and an increase in recording density of about 2%.

14 shows a PSD curve comparing DC suppression capability with an EFMP (Eight to Fourteen Modulation Plus) code used in a conventional DVD when the RLL (2, 10, 8, 15) code is applied to the present invention. Here, the EFMP code is a code for performing DC suppression using a DC control code conversion table separate from the main conversion code table. An example of the RLL (2,10,8,15) code is disclosed in Korean application No. P2001-0021360 filed by the same applicant, and the present invention does not use a DC conversion code conversion table using additional bits. Insufficient DC suppression RLL modulation is performed using the main conversion table and the auxiliary conversion table for DC control.

15 is a table summarizing the code rate and the code efficiency by comparing the conventional EFMP code and the RLL (2, 10, 8, 15) code to which the present invention is applied. The RLL (2,10,8,15) codes of the proposed method have a similar DC suppression capability as compared to EFMP, have high code efficiency and improve recording density by about 5.4%.

As described above, the present invention provides high efficiency in terms of recording density by providing a high-efficiency modulation code that improves DC suppression capability by combining a multimode coding scheme for an insufficient DC suppression modulation code.

In addition, the present invention provides a code string by arranging the codeword so as to maintain the DC suppression capability of the code string even when the codeword is replaced with another codeword because the constraint condition is not satisfied between the codewords during insufficient DC suppression RLL modulation. Provides better DC suppression capability.

Claims (14)

A data modulation apparatus for converting a source data of m bits into a codeword of n bits (n ≧ m) while restricting the minimum data length d and the maximum length k, Multiplexing means for multiplexing input data divided into predetermined lengths using the multiplexing information to provide a multiplexed data string; Encoding means for performing weak DC-free RLL (Run Length Limited) modulation on the multiplexed data string without using a DC control conversion table to which an additional additional bit is added; And And selecting means for selecting a code string having the smallest DC component among the multiplexed and RLL modulated code strings. The method of claim 1, Dividing means for dividing the input data string into a predetermined length; And And a synchronization and multiplex ID inserting means for inserting a synchronization pattern into the multiplexed data string to which the multiplexed information has been added and converting the multiplexed information into multiplexed identifier information (ID). The method of claim 1, And said multiplexing means converts the divided input data into random data using a scramble method. The method of claim 1, And said multiplexing means converts the divided input data into random data using an interleaving method. The method of claim 1, The encoding means is characterized in that two kinds of code groups selectable for DC control, that is, codewords for the same data in the main conversion code group and the auxiliary control code group for DC control have opposite INV values, and INV is a code And a parameter for predicting the transition direction of the next codeword according to whether the number of bits " 1 " in the word stream is odd or even. The method of claim 1, And said encoding means has a minimum constraint field (d) = 1 and a maximum constraint field (k) = 7. The method of claim 6, And when the bit length of the source word is 8, the length of the modulation codeword is 12 bits. The method of claim 2, And said synchronizing and multiplexing ID inserting means has a minimum constraint length (d) = 1 and a maximum constraint length (k) = 7. The method of claim 2, The encoding means has a minimum constraint length (d) = 1, a maximum constraint length (k) = 7, and the synchronization and multiplexing ID insertion means has a minimum constraint length (d) = 2 and a maximum constraint length (k) = 7. A data modulation device, characterized in that the size of the minimum mark (or pit) is increased by increasing the constraint field. The method of claim 2, And said encoding means is a minimum constraint field (d) = 2 and a maximum constraint field (k) = 10. The method of claim 10, And when the bit length of the source word is 8, the length of the modulation codeword is 15 bits. The method of claim 10, And said synchronizing and multiplexing ID inserting means has a minimum constraint length (d) = 2 and a maximum constraint length (k) = 10. In a data modulation device, An encoder that modulates the source data into a codeword while limiting the source data to a minimum constraint d and a maximum constraint k, wherein the encoder comprises: End zero of codeword a representing the number of consecutive "0s" in the MSB direction from the LSB of the preceding codeword a and the number of "0" consecutive in the LSB direction from the MSB of the codeword b connected to the codeword a. When the sum of the lead zeros of the codeword b is equal to or smaller than the minimum constraint d, or greater than the maximum constraint k, the end zero of the codeword a plus the lead zero of the codeword b is the minimum. And changing the codeword a to be greater than or equal to a constraint d or less than or equal to the maximum constraint k. The method of claim 13, The encoder, When the minimum constraint d is 1 and the maximum constraint k is 7, if the end zero of the codeword a is 0 and the lead zero of the codeword b is 0, then the LSB is " And a codeword of 0 ".