KR20040005050A - Method managing for memory access violation and computer system therefor - Google Patents

Abstract

PURPOSE: A memory access violation processing method and a computer system for the same are provided to block an access violation in a system having a CPU without an MMU(Memory Management Unit) by using a hardware. CONSTITUTION: The method comprises several steps. A CPU stores an address of an instruction next to next to an instruction which generates a data stopping interrupt(S701). The CPU moves a program counter to a position at an interrupt vector table and executes the data stopping interrupt service routine(S702). The data stopping interrupt service routine copies stack data and status data of a current program to another stack(S703), and converts a program execution mode into an interrupt processing mode for preventing another interrupt from being generated(S704). The data stopping interrupt service routine is performed, and stores an interrupt service routine return address at a link register(S705). The data stopping interrupt service routine recovers the stored stack data and status data, and moves the program counter to the stored instruction address(S706).

Description

METHOD MANAGING FOR MEMORY ACCESS VIOLATION AND COMPUTER SYSTEM THEREFOR}

The present invention is directed to a method of handling access violations that result from improper memory access of a program.

An access violation occurs when an application accesses an area of memory that should not be accessed. An access violation occurs when real memory is not allocated, for example when referring to a NULL pointer, or when a memory area for which access is prohibited is referenced. In case of access violation, incorrect use of memory may affect other programs or affect the whole system, causing malfunction. Therefore, in case of an access violation, the system usually stabilizes by terminating the program that caused the access violation and making a predetermined exception.

In general, a system using a central processing unit (CPU) that incorporates a memory management unit (hereinafter referred to as MMU) handles this access violation in the MMU. The MMU is responsible for mapping virtual memory requested by the program to real memory.

Variables that remain initialized with NULL pointers in the program are replaced by specific addresses in virtual memory (typically using zeros for predefined address values), which are then converted to physical memory by the MMU. Is converted to belong to an inaccessible region on memory. In other words, access to a NULL pointer in virtual memory results in a violation of memory access restrictions during the MMU's translation to a physical memory address. When this occurs, the MMU generates a data abort interrupt. The offending program is terminated or handled according to a separate exception handling policy.

However, this method is not available on systems using CPUs that do not have a built-in MMU, so access violations must be handled in software. For software processing, you should always run a verification routine to verify that an object is initialized with a NULL pointer before referencing it. As described above, in order to handle an access violation in software, a verification routine must be added in front of a routine referencing an object in a program code, thereby increasing the program size and increasing the overhead of verification.

An object of the present invention is to provide a method for hardware-handling an access violation in a system using a CPU that does not have an MMU.

1 is a diagram illustrating a computer system for performing access violation processing on a memory according to an embodiment of the present invention.

2 is a diagram illustrating misaligned memory access.

3 is a diagram illustrating an interrupt vector table stored in a memory as an example of an ARM CPU.

4 is a flowchart illustrating an access violation processing method according to an embodiment of the present invention.

5 is a pseudo program code defining a NULL pointer according to an embodiment of the present invention.

6 is a simulated program code in which an access violation occurs according to an embodiment of the present invention.

7 is a flowchart illustrating a method of processing a data stop interrupt service routine according to an embodiment of the present invention.

8 is a simulated program code of a data stop interrupt service routine according to an embodiment of the present invention.

To achieve this task, the present invention uses misaligned memory access to handle access violations.

According to the present invention there is provided a method for dealing with a memory access violation in a computer system that generates an interrupt in accordance with a misaligned memory access. According to this method, the address of the NULL pointer is first defined as an address that can cause misaligned memory access. When misaligned memory access occurs due to the NULL pointer reference of an application program, an access violation is handled by executing a predetermined interrupt service routine.

In this case, it is preferable to define the address of the NULL pointer as an odd address.

In the memory access violation processing method of the present invention, an address of an instruction to be executed next when an interrupt occurs due to a misaligned memory access is stored. The program counter is moved to the location of the interrupt service routine, and the interrupt service routine is executed to handle the access violation.

When the interrupt service routine is executed in the memory access violation processing method of the present invention, first, stack information and state information of a currently executing program stored in a register are copied. Next, the interrupt service routine designates the address of the specified access violation processing routine as the return address of the interrupt service routine. It recovers the copied stack and state information and moves the program counter to the specified access violation handling routine.

Such a method is recorded in a computer program product according to the invention.

The computer system according to the present invention includes a memory storing an interrupt vector table in which an address of an interrupt service routine to be processed when an interrupt occurs, and an interrupt generated when an misaligned memory access occurs and an address stored in the interrupt vector table. And a controller for executing the interrupt service routine. In addition, the operating system is installed in this computer system and defines as the address where misaligned memory access occurs when referring to the address of NULL pointer, and the return address of the interrupt service routine is an access violation handling according to NULL pointer access. define.

At this time, the interrupt service routine may include a routine for copying stack information and status information of a currently executing program stored in a register, a routine for storing an address of an access violation handling routine as a return address of an interrupt service routine, and a copied stack. It is desirable to include a routine for recovering information and status information.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

A method of processing a memory access violation and a computer system therefor according to an embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a diagram illustrating a computer system for processing a memory access violation according to an embodiment of the present invention, FIG. 2 is a diagram illustrating an unaligned memory access, and FIG. 3 is an interrupt vector table stored in a memory in the case of an ARM CPU. It is a figure which shows, for example.

As shown in FIG. 1, a computer system according to an embodiment of the present invention includes a memory 100, a CPU 200, and an operating system (OS) 300.

The memory 100 includes an area 110 in which data or instructions are stored and an area 120 in which an interrupt vector table is stored. In general, most computer systems store data or instructions in memory areas starting at the memory address that is a multiple of the length of the data type supported by the hardware (character, integer, long integer, etc.) for efficient memory access.

For example, in a reduced instruction set computer (RISC) -based computer system, when data is read from memory, it is read in chunks of 4 bytes or 8 bytes according to the data type. At this time, the address of the memory to be read must start from a multiple of the chunk length as indicated by (A) in FIG. 2, and the memory access that is not read is referred to as misaligned memory access.

In detail, a misaligned memory access occurs when the memory access is performed such that the boundary line is divided into chunks as indicated by (B) in FIG. 2. When such misaligned memory access occurs, the CPU 200 stops executing the original program and generates a data abort interrupt. When a data stop interrupt occurs, the CPU 200 performs an interrupt process according to the contents of the data stop item of the interrupt vector table stored in the memory 120 as shown in FIG.

In the interrupt vector table, there is one 32-bit vector, which is predetermined for each interrupt type, and a branch instruction or a program counter (PC) load instruction is recorded in the vector. The CPU 200 executes an appropriate interrupt service routine according to the contents recorded in the vector corresponding to the interrupt occurrence.

Hereinafter, the access violation processing method according to the embodiment of the present invention will be described in detail with reference to FIGS. 4 to 6.

FIG. 4 is a flowchart illustrating a method of performing an access violation according to an embodiment of the present invention, and FIG. 5 is a diagram illustrating pseudo program code defining a NULL pointer according to an embodiment of the present invention. 6 is a diagram illustrating a mock program code in which an access violation occurs.

To detect an access violation that occurs when a NULL pointer is referenced first, misaligned memory access occurs when a NULL pointer is referenced. To this end, the address of the NULL pointer is defined as an address where misaligned memory access occurs when referencing the address (S401). For example, when reading data from the memory 110 in chunks of 2 bytes or 4 bytes, the operating system 300 reads the address of the NULL pointer as an odd address (as shown in FIG. 5). In this example, 0x1231). The address of such a NULL pointer can be any address as long as it can cause an odd address as well as a misaligned memory access that refers to the address. The address of the NULL pointer is replaced with the specified address when compiling a program that uses the NULL macro.

In the case of referring to getWidth (), which is a method of pBookCover, in a program as shown in FIG. 6, since misaligned memory access occurs because pBookCover is initialized with a NULL pointer (address 0x1231) (S402). As such, when the misalignment memory access occurs, the CPU 200 generates a data stop interrupt (S403). When a data stop interrupt occurs, the CPU 200 executes a data abort interrupt service routine according to the contents recorded in the data stop area of the interrupt vector table stored in the memory 120 (S404). The return address of this data stop interrupt service routine is the address of the routine that handles the access violation. Accordingly, when the data stop interrupt service routine finishes execution and returns, processing for the access violation is executed, and the program causing the access violation is terminated or another processing routine is executed according to the previously recorded contents (S405).

Hereinafter, a data stop interrupt service routine will be described in detail with reference to FIGS. 7 and 8, taking an example of using an ARM processor as the CPU 200.

7 is a flowchart illustrating a method of processing a data stop interrupt service routine according to an embodiment of the present invention, and FIG. 8 is a simulation program code of a data stop interrupt service routine according to an embodiment of the present invention.

In the embodiment of the present invention, in order to execute the data stop interrupt service routine in case of misaligned memory access (access violation), the data stop area of the vector table is recorded as follows.

LDR pc, [pc, # offset]

Where pc represents the program counter and #offset is the difference between the address of the original processing routine and the address of the new processing routine to be installed.

Then, when a data stop interrupt occurs, the processing routine does not run until it is originally executed, but the newly installed data stop interrupt service routine runs at an address that is #offset away. As an example of such a data stop interrupt service routine, an algorithm as shown in FIG. 8 may be used.

A detailed description will be given of a processing method when a data stop interrupt occurs. First, when a data stop interrupt occurs due to a misalignment memory access, the CPU 200 stores the address of the instruction following two steps of the instruction that caused this. (S701). Next, the CPU 200 moves the program counter PC to the position specified in the interrupt vector table, and a data stop interrupt service routine is performed (S702).

As shown in FIG. 8, the data stop interrupt service routine copies the stack information and the state information of the current program stored in the register to a separate location (stack) (S703), and changes the program execution mode to the interrupt processing mode. The change is prevented to generate another interrupt (S704). The information copied in step S703 also includes a link register (LR).

The data stop interrupt service routine performs the designated interrupt, and stores the address of the raiseAV to be returned by the interrupt service routine as shown in FIG. 8 (S705). raiseAV is a routine that actually handles access violations. With raiseAV, this can be a routine or other processing routine that terminates the program that caused the access violation. Next, the copied stack information, state information, and the like are restored to their original positions, and the program counter PC is moved to the address of the instruction stored in step S701 (S706).

In this way, proper handling can be taken in the case of an access violation caused by a NULL pointer reference.

Such a method can be recorded as a computer program and mounted on an appropriate system, and in particular, can be recorded and used as a program of a mobile communication terminal using an ARM processor.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, according to the present invention, when an access violation occurs due to an incorrect memory reference of an application in a system that does not support access violation processing in hardware, appropriate processing can be performed.

Claims (8)

In a method for dealing with a memory access violation in a computer system that generates an interrupt upon misaligned memory access, The first step of defining the address of a NULL pointer as an address that can cause misaligned memory access, and The second step in executing an access violation process by executing a predetermined interrupt service routine when an misaligned memory access occurs due to a NULL pointer reference of an application. Memory access violation processing method comprising a. The method of claim 1, The first step of the memory access violation processing method of defining the address of the NULL pointer as an odd address. The method of claim 1, The second step is A third step of storing an address of an instruction to be executed next when an interrupt occurs due to misaligned memory access, A fourth step of moving a program counter to a position of the interrupt service routine to execute the interrupt service routine to deal with an access violation Memory access violation processing method comprising a. The method of claim 3, The fourth step is Copying stack information and status information of the currently running program stored in the register; Designating an address to be executed after the interrupt service routine is executed as an address of a specified access violation processing routine; and Restoring the copied stack information and state information and moving the program counter to the address specified in the third step. Memory access violation processing method comprising a. A computer program product comprising a method of handling a memory access violation as claimed in claim 1. In a computer system that generates an interrupt according to misaligned memory access, A memory storing an interrupt vector table addressed to an interrupt service routine to be processed when the interrupt occurs; A controller that generates an interrupt when the misaligned memory access occurs and executes the interrupt service routine according to an address stored in the interrupt vector table; and An operating system that defines an address of a NULL pointer as an address where the misaligned memory access occurs when referring to a NULL pointer, and defines a return address of the interrupt service routine as a routine that handles an access violation according to a NULL pointer access. Computer system comprising a. The method of claim 6, The interrupt service routine is A routine that copies the stack and status information of the currently running program stored in a register A routine for storing the address of the routine that handles the access violation as a return address of an interrupt service routine; and A routine for recovering the copied stack information and state information Computer system comprising a. The method of claim 6, And an odd address as the address of the NULL pointer as the address where the misaligned memory access occurs.