KR20040001734A - D grade power amp preventing distortion of out waveform - Google Patents

Abstract

PURPOSE: A D-level power amplifier capable of preventing output waveform distortion is provided to be capable of compensating the voltage varied due to the resistance of a wire by installing a compensation circuit including an analog-digital converter, between a power amplifying circuit and a waveform control circuit. CONSTITUTION: A D-level power amplifier is provided with a waveform control circuit(100) for outputting a digitalized audio signal and controlling the pulse width of the digitalized audio signal, a power amplifying circuit(110), a noise removing circuit(120) for receiving the output signal of the power amplifying circuit and removing the high frequency noise of the output signal, and a speaker(130) for receiving the audio output signal of the noise removing circuit and outputting the corresponding sound. The D-level power amplifier further includes compensation circuits(140a,140b) of an output waveform installed between the waveform control circuit and the power amplifying circuit for controlling the pulse width of the digitalized audio signal to a predetermined level.

Description

D grade power amp preventing distortion of out waveform

The present invention relates to a class D power amplifier, and more particularly, to a pulse width modulated signal (PWM) power amplifier capable of compensating for distortion of an output waveform.

Currently used power amplifiers are mostly composed of analog circuits, such as Class A, Class B, and Class AB. Such class A, B, and AB amplifiers have the advantage of excellent linearity, but when implementing a large output, huge power loss occurs. That is, since the energy of the current acoustic amplifier is converted to heat except for the energy converted into voice energy, the temperature of the amplifier is increased, and a large heat sink is inevitably required to forcibly cool the amplifier. This makes the analog power amplifier bulky, and its output efficiency is low.

On the other hand, the class-D amplifier, which amplifies the digital signal modulated by the digital modulator, directly amplifies the digital signal without converting it into an analog signal, so that the power amplification efficiency is very high, close to about 100%. Accordingly, miniaturization can be realized, and the price is also low, and an audio spec can be obtained which is much superior to conventional analog amplification.

Accordingly, switching power amplifiers can be used as long as they convert digital signals to analog power signals, and examples thereof include home hi-fi amplifiers, theater multichannel amplifiers, HDTVs, DVD players, and mobile communication terminals. The application range is very wide such as a small amplifier and a built-in computer amplifier.

1 is a circuit diagram schematically showing a conventional class D power amplifier. Referring to FIG. 1, a conventional class D power amplifier 80 includes a pulse width modulated signal generation circuit 10, a power amplification circuit 20, a low pass filter 30, and a speaker. And 40.

As is known, the PWM signal generating circuit 10 adjusts and outputs a pulse width according to a signal level. The PWM signal generating circuit 10 of the class D power amplifier adjusts the pulse width of the audio signal digitized by the PCM (not shown).

The power amplification circuit 20 restores and amplifies the digitized audio signal and includes a PMOS transistor P1 and an NMOS transistor N1. The PMOS transistor P1 is switched according to the first output o1 of the PWM signal generation circuit 10, and the actual power supply voltage Vcc2 is applied to the source. The NMOS transistor N1 is also switched in accordance with the second output o2 of the PWM signal generating circuit 10, the drain of which is connected to the drain of the PMOS transistor P1, and its source is connected to the ground voltage Vss2. Connected. Here, Vcc1 and Vss1 are ideal voltages applied from the voltage source, and Vcc2 and Vss2 are voltages dropped by a predetermined value by the resistors R1 and R2 in the conductor 50 connecting between the voltage source and the power amplification circuit 20. , Is the actual voltage applied to the power amplification circuit 20. In addition, R1 and R2 represent resistances generated in the conductive line connecting between the voltage source and the power amplification circuit 20.

The low pass filter 30 is composed of an inductor 32 and a capacitor 34, and serves to remove high frequency components of the output signal of the power amplification circuit 20.

The speaker 40 receives the output signal of the low pass peter 30 and outputs it in an acoustic form.

In the conventional class D power amplifier, the PWM generation circuit 10 receiving digital audio data decomposed by the PCM supplies a pulse to the power amplifier 20 while adjusting the pulse width. Then, the PMOS transistor P1 and the NMOS transistor N1 are selectively driven according to the output signal of the PWM generation circuit 10 to output an analog amplified audio signal. At this time, the amplified audio signal is removed by the low pass filter 30 to remove high frequency components and noise, and is reproduced by the speaker 40.

However, the conventional class D power amplifier has a problem that the waveform is distorted as the output is increased.

In more detail, in order to increase the output of the speaker 40, the power supply voltage supplied to the power amplification circuit 20 must be increased. However, when the power supply voltage of the power amplification circuit 20 is raised in this manner, the amount of current flowing through the resistors R1 and R2 is also increased, so that the power supply impedance value generated in the conductive wire is not negligible.

That is, even though the internal resistances R1 and R2 in the conductive wire have a small value, as the high power supply voltage is supplied, a voltage drop is performed by a predetermined voltage in the resistors R1 and R2, so that the actual MOS transistor P1 is provided. The voltages Vcc2 and Vss2 supplied to N1 are different from the set (ideal) power supply voltages Vcc1 and Vss1. Accordingly, as shown in FIG. 2, a gap g is generated between the theoretical output waveform out1 and the actual output waveform out2, thereby distorting the output waveform.

Therefore, the technical problem to be achieved by the present invention is to provide a class D power amplifier capable of preventing the distortion of the output waveform of the class D power amplifier to obtain a high output signal by applying a high voltage.

1 is a circuit diagram showing a conventional class D power amplifier.

2 is a view showing the output waveform of the conventional class D power amplifier.

3 is a circuit diagram showing a class D power amplifier according to the present invention.

4 is a diagram illustrating an ideal power supply voltage (or ground voltage) and a power supply voltage (or ground voltage) that is actually applied.

(Explanation of symbols for the main parts of the drawing)

100: waveform control circuit 110: power amplification circuit

120: noise reduction circuit 130: speaker

140a, 140b: output waveform compensation circuit 150: lead wire

Other objects and novel features as well as the objects of the present invention will become apparent from the description of the specification and the accompanying drawings.

In order to achieve the above object of the present invention, the present invention outputs a digitized audio signal, the waveform control circuit for adjusting the pulse width of the digitized audio signal, and the output signal of the waveform control circuit input A power amplifying circuit for amplifying and restoring an audio signal swinging between a power supply voltage and a ground voltage, a noise removing circuit for receiving an output signal of the power amplifying circuit and removing noise, and an audio output of the noise removing circuit. A speaker that receives and acoustics a signal, and is provided between the waveform control circuit and the power amplifier circuit, and between a power supply voltage (or ground voltage) and an ideal power supply voltage (or ground voltage) actually applied to the power amplifier circuit. By measuring the difference, the restored audio signal can swing between the ideal supply voltage and ground voltage. And an output waveform compensation circuit for controlling the pulse width of the digitized audio signal.

The output waveform compensating circuit may further include a capacitor for measuring a difference between an ideal power supply voltage (or ground voltage) and an actual power supply voltage by removing a DC component of a power supply voltage (or ground voltage) applied to the actual power amplifier circuit; And an analog-to-digital converter for converting the difference between the ideal power supply voltage (or ground voltage) and the actual power supply voltage (or ground voltage) measured by the capacitor into digital data and transferring the waveform control circuit.

The waveform control circuit includes a PWM signal generation circuit for substantially adjusting the pulse width, and a signal control circuit for controlling the pulse width adjustment of the PWM signal generation circuit by receiving an output signal of the analog-to-digital converter.

The power amplification circuit is connected in series between a power supply voltage and a ground voltage, and is composed of a PMOS transistor and an NMOS transistor responsive to an output signal of a waveform control circuit.

The noise cancellation circuit is a low pass filter including an inductor and a capacitor.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below.

Embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and the like of the elements in the drawings are exaggerated to emphasize a more clear description, and the elements denoted by the same reference numerals in the drawings means the same elements.

FIG. 3 is a circuit diagram illustrating a class D power amplifier according to the present invention, and FIG. 4 is a diagram illustrating an ideal power supply voltage (or ground voltage) and a power supply voltage (or ground voltage) that is actually applied.

3, the PWM power amplifier 200 of the present invention, the waveform control circuit 100, the power amplification circuit 110, the noise removing circuit 120, the speaker 130 and the output waveform compensation circuit 140a, 140b).

The waveform control circuit 100 includes a PWM signal generation circuit 101 and a signal control circuit 103. The PWM signal generating circuit 101 serves to adjust the pulse width of the input digital signal. In the present embodiment, the PWM signal generating circuit 101 adjusts the pulse width of the audio signal converted into a digital form, and supplies it to the power amplifying circuit 110. At this time, the original audio signal is an analog signal, decomposed by a PCM (not shown), and provided to the PWM signal generating circuit 101 in a digital state. The signal control circuit 103 directly controls the pulse width of the PWM signal generating circuit 101. The signal control circuit 103 of this embodiment receives the output signals of the output waveform compensation circuits 140a and 140b and adjusts the pulse period of the PWM signal generation circuit 101.

The power amplifier circuit 110 restores and amplifies the digitized audio signal supplied from the waveform control circuit 100 to an audio signal in an analog state. At this time, the restored audio signal swings between the set power supply voltage and the ground voltage. The power amplification circuit 110 is composed of a PMOS transistor P and an NMOS transistor N connected in series between a power supply voltage Vcc3 and a ground voltage Vss3, and is a kind of switch. The gate of the PMOS transistor P is connected to the first output terminal o1 of the waveform control circuit 100 to respond to the output signal of the waveform control circuit 100. The source of the PMOS transistor P is connected with the power supply voltage Vcc4 and the drain is connected with the drain of the NMOS transistor N. The gate of the NMOS transistor N1 is also connected to the second output terminal o2 of the waveform control circuit 100 to respond to the output signal of the waveform control circuit 100. The drain of the NMOS transistor N is connected to the drain of the PMOS transistor P, and the source is connected to the ground voltage Vss3.

Here, Vcc3 and Vss3 are ideal voltages applied from a voltage source, and Vcc4 and Vss4 are actual voltages applied to the power amplifier circuit 110. At this time, the actual voltage (Vcc4, Vss4) is somewhat different from the ideal voltage (Vcc3, Vss3) applied from the voltage source. This is because the voltage is changed, such as a voltage drop, by the resistor R11 generated in the conductive line 150 connecting between the voltage source and the power amplification circuit 110. The resistance R12 in the conductive wire 150 is very small, but at the present time, the power supply voltage and the ground voltage are increased to obtain a high output, and thus the amount of current flowing through the resistor becomes very large. As a result, the voltage fluctuation is also very large.

4 is a diagram illustrating an ideal voltage and an actual voltage, and the actual voltages Vcc4 and Vss4 are varied by the resistors R11 and R12 from the ideal voltages Vcc3 and Vss3 by a predetermined value.

The noise removing circuit 120 includes an inductor 121 and a capacitor 123. That is, the noise removing circuit 120 is a low pass filter composed of L-C (inductor-capacitor) and removes high frequency components. The noise removing circuit 120 removes high frequency noise generated in the output signal of the power amplifying circuit 110.

The speaker 130 receives the output signal of the low pass filter 30 and outputs it in an acoustic form.

Meanwhile, the output waveform compensation circuits 140a and 140b of the present embodiment are connected between the power amplifier circuit 110 and the waveform control circuit 100. The first output waveform compensation circuit 140a is connected between the time point at which the actual power supply voltage Vcc4 is applied and the signal control circuit 103 of the waveform control circuit 100, and the second output waveform compensation circuit 140 is actually It is connected between the time point at which the ground voltage Vss4 is applied and the signal control circuit 103 of the waveform control circuit 100.

Each of the output waveform compensation circuits 140a and 140b includes an analog-digital converter 141 and a capacitor 143. The capacitor 143 removes the DC components of the actual voltages Vcc4 and Vss4 to obtain a difference between the ideal power supply voltage (or ground voltage) and the power supply voltage (or ground voltage) actually applied. The analog-to-digital converter 141 converts the difference between the ideal voltages Vcc3 and Vss3 and the actual voltages Vcc4 and Vss4 obtained from the capacitor 143 into digital data to control the signal control circuit 103 of the waveform control circuit 100. To pass on.

Then, the signal control circuit 103 adjusts the pulse width of the output signal of the PWM signal generating circuit 101 by the digital data received from the analog-digital converter 141.

Hereinafter, the operation of the PWM power amplifier of the present invention will be described.

First, the waveform control circuit 100 outputs the digitized audio signals out1 and out2 to the power amplifier circuit 110. Then, the PMOS transistor P and the NMOS transistor N of the power amplifier circuit 110 are selectively operated to restore the digitized audio signal to an analog form. In this process, the voltage delivered to the power amplification circuit 110 may be partially changed by the resistor R of the conductor connecting the voltage source and the power amplification circuit 110. When the voltage is changed in this way, the output signal of the power amplifier circuit 110 is distorted without obtaining the desired output waveform.

Accordingly, the analog-to-digital converter 141 of the output waveform compensation circuits 140a and 140b converts the voltage variation in the analog state into digital data form and then feeds it back to the signal control circuit 103 of the waveform control circuit 100. Let's do it. The signal control circuit 103 then restores the waveform of the power amplifier by adjusting the pulse width of the waveform adjusting circuit 100. That is, as is known, for example, when the turn off time of the PMOS transistor P becomes short (high signal band becomes narrow), the power amplifying circuit 110 linearly increases in voltage. On the other hand, when the turn-off time of the PMOS transistor P becomes long (high signal band is widened), the output signal of the power amplifier circuit 110 is linearly reduced. Using this point, the signal control circuit 103 outputs a control signal to the PWM signal generating circuit 101 so as to compensate for the input voltage variation value. The PWM signal generation circuit 101 then adjusts the pulse width to restore the original waveform of the distorted output waveform.

Accordingly, the output signal without waveform distortion can be obtained by compensating for the difference between the actual voltage and the abnormal voltage by the output compensation circuits 140a and 140b.

As described in detail above, according to the present invention, in the class D PWM power amplifying apparatus, an output waveform including an analog-digital converter for compensating a voltage drop between a power amplifying circuit and a waveform adjusting circuit including a PWM signal generator Install a compensation circuit.

Accordingly, an output waveform free of waveform distortion can be obtained by compensating for a voltage fluctuating by the lead resistance.

Although the present invention has been described in detail with reference to preferred embodiments, the present invention is not limited to the above embodiments, and various modifications may be made by those skilled in the art within the scope of the technical idea of the present invention. .

Claims (5)

A waveform adjusting circuit for outputting a digitized audio signal and adjusting a pulse width of the digitized audio signal; A power amplifying circuit that receives the output signal of the waveform control circuit and amplifies and restores the audio signal swinging between a power supply voltage and a ground voltage; A noise removing circuit for receiving an output signal of the power amplifying circuit and removing high frequency noise; A speaker for receiving an audio output signal of the noise canceling circuit and making a sound; And It is installed between the waveform control circuit and the power amplifier circuit, and measures the difference between the power supply voltage (or ground voltage) and the ideal power supply voltage (or ground voltage) actually applied to the power amplification circuit, the ideal power supply voltage and ground voltage And an output waveform compensation circuit for controlling the pulse width of the digitized audio signal so that the restored audio signal can swing between them. The method of claim 1, wherein the output waveform compensation circuit, A capacitor measuring a difference between an ideal power supply voltage (or ground voltage) and an actual power supply voltage by removing a DC component of a power supply voltage (or ground voltage) applied to the actual power amplifier circuit; A class D analog to digital converter converting the difference between the ideal power supply voltage (or ground voltage) and the actual power supply voltage (or ground voltage) measured by the capacitor into digital data and transmitting the waveform control circuit. Power amplifier. The waveform control circuit of claim 1 or 2, PWM signal generating circuit for substantially adjusting the pulse width, And a signal control circuit which receives the output signal of the analog-to-digital converter and controls the pulse width adjustment of the PWM signal generation circuit. 3. The class D of claim 1 or 2, wherein the power amplification circuit is connected in series between a power supply voltage and a ground voltage, and is composed of a PMOS transistor and an NMOS transistor responsive to an output signal of a waveform control circuit. Power amplifier. 3. The power amplifier of claim 1 or 2, wherein the noise is a low pass filter comprising an inductor and a capacitor.