KR200375389Y1 - driving circuit of Light Emitting Diode for full color display - Google Patents

Abstract

According to an embodiment of the present invention, a LED driving circuit capable of displaying full color includes: first, second, and third register units for temporarily storing digital image data input from an external device; A latch configured to simultaneously output digital image data temporarily stored in each of the first, second, and third register units; And a first, second and third pulse width modulator for receiving the output digital image data and outputting a gray level pulse corresponding to the data value stored in each of the first, second and third registers.

According to the present invention, since each of R, G, and B 1 byte (8 bits), that is, 3 grays, each of red (R), green (G), and blue (B) can implement 256 gray levels, the data transmission rate Has the advantage of expressing full color with superiority than the existing (256 byte).

Description

Driving circuit of light emitting diode for full color display

The present invention relates to a light emitting diode (LED) for use in an electronic board, and more particularly, to a light emitting diode driving circuit capable of full color display.

In the LED system equipped with a light emitting diode (hereinafter referred to as LED), the LEDs are arranged in a matrix form to display information such as various characters and pictures, and the video signal can be received from an AV device such as a DVD, VCR, broadcasting equipment, or the like. After receiving and converting the received signal from the LED driving circuit into a signal suitable for the LED board, the LED is displayed to emit an image according to the signal.

1 is a block diagram of a conventional LED driving circuit.

As shown in FIG. 1, in the conventional LED driving circuit, when serial data is input as a standard serial interface (SPI) from a DVD, a VCR, a broadcasting equipment, or the like, an 8-bit data value is outputted through a latch and a buffer. It is output from the stage, and the LEDs of red, green, and blue are connected to each of the output bit stages, and the LED is turned on to be driven.

However, the conventional LED driver circuit not only increases the number of output ports, but also the speed of the clusters forming one pixel composed of red, green, and blue LEDs. 256 gray scale) has a disadvantage in that there is a restriction in the expression.

For example, when displaying 256 gray levels, one LED driving circuit requires a large amount of data of 256 bytes.

The present invention is provided with a pulse width modulator (Pulse Width Modulator) in the LED driving circuit, the 8-bit serial data input to the LED driving circuit is input to the pulse width modulator, which is a 256-step PWM to implement 256 gray levels An object of the present invention is to provide a full color displayable LED driving circuit and a driving method for generating a full color by generating an output and inputting the red, green, and blue LEDs.

In order to achieve the above object, a full-color display LED driving circuit according to the present invention includes: first, second, and third register units for temporarily storing digital image data input from the outside; A latch configured to simultaneously output digital image data temporarily stored in each of the first, second, and third register units; And a first, second and third pulse width modulator for receiving the output digital image data and outputting a gray level pulse corresponding to the data value stored in each of the first, second and third registers.

The digital image data is SPI serial data sequentially input to the first, second and third registers, and the serial data stored in the first, second and third registers are red (R) and green (G), respectively. ), And data for displaying blue (B).

In addition, the digital image data stored in each of the first, second, and third register units may be one byte (8 bits) of data, and the pulse width modulator outputs a signal having a pulse width of 256 steps. And outputs a signal having a predetermined pulse width corresponding to red, green, and blue digital data input from the first, second, and third register units, wherein the pulse width modulator is a digital pulse width modulator.

In addition, a signal having a predetermined pulse width output through the first, second, and third pulse width modulators is input to LEDs emitting red, green, and blue light, respectively, through a buffer.

In addition, the digital image data input to the first, second and third registers may be divided into two parts and input.

In addition, a full-color display LED driving circuit according to another embodiment of the present invention, the first, second, and third register unit for temporarily storing the digital image data input from the outside; A latch configured to simultaneously output digital image data temporarily stored in each of the first, second, and third register units; A digital analog converter which receives the output digital image data and converts the digital image data into an analog signal; And a first, second and third pulse width modulator for receiving the converted analog signal and outputting a pulse of a gray level corresponding to a data value stored in each of the first, second and third registers.

The pulse width modulator outputs a signal having a pulse width of 256 steps, and outputs a signal having a predetermined pulse width corresponding to red, green, and blue digital data stored in the first, second, and third registers. The pulse width modulator may be an analog pulse width modulator.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram showing a schematic configuration of a full color displayable LED driving circuit according to a first embodiment of the present invention, Figure 3 is a circuit diagram schematically showing an embodiment of the configuration of the LED driving circuit shown in FIG. It is a block diagram.

However, this shows a driving circuit for one cluster portion forming a pixel composed of red, green, and blue LEDs.

2 and 3, the LED driving circuit 100 according to the present invention includes: first, second, and third register units 102, 104, and 106 for temporarily storing digital image data input from the outside; A latch 110 for outputting digital image data temporarily stored in each of the first, second, and third register units at once; First, second, and third pulse width modulators 122, 124, and 126 that receive the output digital image data and output pulses of gray levels corresponding to data values stored in the first, second, and third registers, respectively. It is configured.

Here, the digital image data is SPI serial data sequentially input to the first, second, and third register units 102, 104, and 106, and the serial data is a serial input provided at one side of the first register unit 102. For example, 8 bits are sequentially input through the port 140 and temporarily stored in the first, second, and third registers.

At this time, the 8-bit serial data stored in the first, second, and third registers are data for displaying red (R), green (G), and blue (B), respectively.

However, the 8-bit serial data is only an embodiment of the present invention, and is not necessarily limited thereto. 6-bit or 10-bit data may be input and processed.

That is, one byte (8 bits) of data stored in each of the first, second, and third registers shown in FIG. 2 is finally displayed in red, green, and blue having a gray level corresponding to the data.

In addition, the serial output port 142 provided at the rear end of the third register unit 106 is connected to the serial input port of the next cluster and serves to sequentially transfer predetermined data to each register unit of the next cluster.

The register unit may include a plurality of flip-flops, and the sequentially input SPI serial data may be temporarily provided to the flip-flop 30 by a predetermined clock applied to the flip-flop. Is stored, and is simultaneously output by the latch 110 and the data enable signal.

The present invention is characterized in that the red, green, blue 8-bit digital data output from each register unit is input to the pulse width modulator 120 to represent 256 gray levels, the pulse width modulator is the first, second And first, second and third pulse width modulators 122, 124 and 126 corresponding to the three register units.

The first, second, and third pulse width modulators analyze 8-bit digital data, respectively, and output a signal having a corresponding pulse width. That is, the pulse width modulator outputs a signal having a pulse width of 256 steps for implementing 256 gray levels, and outputs a signal of a specific level, that is, a specific pulse width, corresponding to 8-bit digital data, respectively. Outputs a signal.

Accordingly, a signal having a predetermined pulse width output through the first, second, and third pulse width modulators 122, 124, and 126 is passed through a buffer 130 to LEDs (not shown) that emit red, green, and blue light, respectively. In this way, a full-color displayable LED signage, which finally represents 256 gray levels, can be implemented.

Pulse Width Modulation (PWM) performed by the pulse width modulator 120 adjusts the duty ratio of the output pulse signal. In the present invention, the duty ratio of the pulse signal is adjusted in 256 steps through 8-bit digital data input. By adjusting it and outputting it, it is possible to finally express 256 gray levels. Here, the duty ratio refers to the time ratio of the high signal for one period (T).

However, the aforementioned pulse width modulator is a digital pulse width modulator that receives a digital signal.

In this case, the pulse width modulator may be implemented as an analog pulse width modulator that receives an analog signal. In this case, the digital-analog converter converts the digital signal into an analog signal before the pulse width modulator. (Not shown) should be provided.

2 and 3, the driving circuit portion shown in FIG. 2 is equal to the number of clusters provided in the display board in order to supply pulse signals of a predetermined gray level to each of the matrix clusters (composed of R, G, and B LEDs) disposed on the display board. It is provided by cascade connection.

FIG. 4 is a circuit block diagram schematically showing another embodiment of the configuration of the LED driving circuit shown in FIG.

However, the same reference numerals are used for the same components as those shown in FIG. 3 and the description thereof will be omitted.

Referring to FIG. 4, the digital image data input to the first, second, and third register units is divided into two and input.

That is, a pair of serial input ports 140 and 140 provided on one side of the first register part and serial output ports 142 and 142 provided on one side of the third register part are provided.

When the digital image data is divided and inputted in this manner, the speed of storing 3 bytes (1 byte (8 bits) for each of R, G, and B) in the flip-flop of the register part is doubled, thereby improving the data transfer rate. There is an advantage that is quite advantageous.

As described above, the digital image data is SPI serial data sequentially input to the first, second, and third register units, and the serial data is, for example, 8 bits each through a serial input port provided at one side of the first register unit. They are sequentially input and temporarily stored in the first, second and third registers.

At this time, the 8-bit serial data stored in the first, second, and third registers are data for displaying red (R), green (G), and blue (B), respectively.

That is, one byte (8 bits) of data stored in each of the first, second, and third registers is finally displayed in red, green, and blue having a gray level corresponding to the data.

According to the present invention, since each of R, G, and B 1 byte (8 bits), that is, 3 grays, each of red (R), green (G), and blue (B) can implement 256 gray levels, the data transmission rate Has the advantage of expressing full color with superiority than the existing (256 byte).

1 is a block diagram of a conventional LED driving circuit.

2 is a block diagram showing a schematic configuration of a LED driving circuit capable of displaying full color according to a first embodiment of the present invention;

3 is a circuit block diagram schematically showing an embodiment of the LED driving circuit configuration shown in FIG.

4 is a circuit block diagram schematically showing another embodiment of the LED driving circuit configuration shown in FIG.

<Explanation of symbols for the main parts of the drawings>

100: LED driving circuit 102: first register unit

104: second register portion 106: third register portion

110 latch 120 pulse width modulator

130: buffer

Claims (13)

First, second, and third register units for temporarily storing digital image data input from the outside; A latch configured to simultaneously output digital image data temporarily stored in each of the first, second, and third register units; The first, second and third pulse width modulators may be configured to receive the output digital image data and output pulses of gray levels corresponding to data values stored in the first, second and third registers, respectively. LED driving circuit. The method of claim 1, And the digital image data is SPI serial data sequentially input to the first, second and third registers. The method of claim 1, The serial data stored in the first, second, and third register units are data for displaying red (R), green (G), and blue (B), respectively. The method of claim 1, And the digital image data respectively stored in the first, second and third registers is one byte (8 bits) of data or 6 bits or 10 bits of data. The method of claim 1, The pulse width modulator outputs a signal having a pulse width of 256 steps, and outputs a signal having a predetermined pulse width corresponding to red, green, and blue digital data input from the first, second, and third register units. A full color displayable LED driving circuit. The method of claim 5, And the pulse width modulator is a digital pulse width modulator. The method of claim 5, And a signal having a predetermined pulse width output through the first, second, and third pulse width modulators is input to LEDs emitting red, green, and blue light through a buffer, respectively. The method of claim 1, 2. The LED driving circuit of claim 1, wherein the digital image data input to the first, second and third registers is divided into two parts. First, second, and third register units for temporarily storing digital image data input from the outside; A latch configured to simultaneously output digital image data temporarily stored in each of the first, second, and third register units; A digital analog converter which receives the output digital image data and converts the digital image data into an analog signal; Full-color display light emission including first, second and third pulse width modulators for receiving the converted analog signal and outputting pulses of gray levels corresponding to data values stored in each of the first, second and third registers Diode driving circuit. The method of claim 9, The pulse width modulator outputs a signal having a pulse width of 256 steps, and outputs a signal having a predetermined pulse width corresponding to red, green, and blue digital data stored in the first, second, and third register parts. LED driving circuit capable of full color display. The method of claim 9, And the pulse width modulator is an analog pulse width modulator. The method of claim 10, And a signal having a predetermined pulse width output through the first, second, and third pulse width modulators is input to LEDs emitting red, green, and blue light through a buffer, respectively. The method of claim 9, 2. The LED driving circuit of claim 1, wherein the digital image data input to the first, second and third registers is divided into two parts.