KR200335402Y1 - Digital channel packet data interface device at the exchange - Google Patents

Abstract

The present invention relates to a digital channel packet data interface at an exchange, and more particularly, to a digital channel packet data exchange between a packet coordinator and a digital subscriber board. It relates to a channel packet data interface device.

The present invention allows the controller to allocate time slots variably at the request of a higher processor so that the capacity of the subscriber can be variably interfaced when the subscriber of the digital channel packet service increases by e-mail or Internet access. So you can respond quickly.

Description

Digital channel packet data interface device in exchange

The present invention relates to a digital channel packet data interface at an exchange, and more particularly, to a digital channel packet data exchange between a packet coordinator and a digital subscriber board. It relates to a channel packet data interface device.

In the conventional switchboard, the digital channel packet data interface device includes a digital subscriber board 10, an interface board 20, a time switch unit 30, and a packet adjusting unit 40, as shown in FIG. Is done.

One time slot is allocated between the digital subscriber board 10 and the packet controller 40 to communicate with each other, and serial communication is performed between the interface board 20 and the digital subscriber board 10. .

The time switch unit 30 interfaces data between the multiplexing units 22 and 23 and the packet adjusting unit 40.

The packet adjuster 40 receives digital packet data applied from the digital subscriber board 10 and performs LAPB (Link Access Protocol Balance) processing to transmit and receive data to or from a destination subscriber or another network in the same network.

Meanwhile, the interface board 20 includes a CPU 21 for storing and converting data applied from the digital subscriber board 10, and data applied from the CPU 21 and the digital subscriber board 10. It consists of two multiplexing units (23, 24) for multiplexing.

The CPU 21 communicates with the serial communication control units 21-1 and 21-2 for applying data from the digital subscriber board 10 in a High Level Data Link Control (HDLC) format. And a time slot assignment control unit 21-3 for converting and applying data applied from the control units 21-1 and 21-2 into a sub highway interface.

As described above, in the conventional exchange, the interface of the digital channel packet data between the digital subscriber board and the packet coordinator is performed by the following operation.

First, briefly, two time slots between the digital subscriber board 10 and the packet controller 40 are allocated to communicate at 64 Kbps, respectively, and 1 Mpps between the interface board 20 and the digital subscriber board 10. It is supposed to do serial communication.

The HDLC controller of the CPU 21 of the interface board 10 and the HDLC controller of the digital subscriber board 10 are directly connected to perform digital channel signal data and digital channel packet data communication, and transmit digital channel packet data and digital channel signal data. Put parameters to distinguish.

Accordingly, the interface board 20 sees parameters when receiving data from the digital subscriber board 10, transmits data to the control processor in the case of digital channel signal data, and transmits and receives in HDLC format in the case of digital channel packet data.

Then, a method of transmitting digital channel packet data from the digital subscriber board 10 to the packet controller 40 is described. In the digital subscriber board 10, the accepted ISDN subscriber receives the digital channel packet. The digital channel packet data is applied to the serial communication control units 21-1 and 21-2 of the interface board 20 in the HDLC format in order to communicate data by using.

Accordingly, each board has a unique address for bidirectional communication between the interface board 20 and the digital subscriber board 10, and the two serial communication control units 21-21 in the CPU 21 of the corresponding interface board 20. 1, 21-2) is used to communicate with the digital subscriber board 10 in HDLC format of 1 Mpps.

At this time, the first serial communication controller 21-1 communicates from the first digital subscriber board to the sixteenth digital subscriber board, and the second serial communication controller 21-2 communicates from the seventeenth digital subscriber board to the thirty-second digital subscriber board. Communicate to the board.

Therefore, in the serial communication control unit 21-1 to 21-2, when the data applied from the digital subscriber board 10 and the address of the HDLC are matched with the interface board 20, the corresponding data. Is stored inside the CPU 21, and at the same time, the data applied from the digital subscriber board 10 is transferred to the timeslot allocation control unit 21-3 of the CPU 21.

Accordingly, the timeslot assignment control unit 21-3 in the CPU 21 converts the digital packet data stored in the CPU 21 into a 64kps Sub Highway interface.

Then, the multiplexers 22 and 23 in the interface board 20 multiplex the data applied from the corresponding timeslot assignment control unit 21-3 and the data applied from the digital subscriber board 10.

In addition, the time switch unit 30 applies the data multiplexed from the multiplexing units 22 and 23, that is, digital channel packet data authorized from the originating subscriber of the digital subscriber board 10 to the packet adjusting unit 40. do.

Therefore, the packet adjusting unit 40 receives the digital packet data applied from the digital subscriber board 10 and performs LAPB (Link Acess Protocol Balance) processing to transmit the data to the called subscriber or another network in the same network.

Meanwhile, referring to a method of receiving digital channel packet data from the packet controller 40 to the digital subscriber board 10, the packet controller 40 is authorized from the originating subscriber in another network or the same network. The data is processed by the LAPB protocol and transmitted to the time switch unit 30 in HDLC format.

Accordingly, the time switch unit 30 applies the data applied from the packet adjusting unit 40 to the called subscriber block through the interface board 20, and the time slot allocation control unit in the interface board 20 ( 21-3) is connected to check the data and if it is valid data is stored inside

The serial communication controller 21-1 to 21-2 in the interface board 20 transmits the data to the digital subscriber board 10 in the form of serial data.

As such, one time slot is allocated and communicated at 64 Kpbs per 256 digital subscribers. Therefore, when a digital subscriber's digital channel packet service demand increases due to an e-mail or an Internet connection, the number of subscribers is met. There is a problem that cannot be used.

The present invention has been made in view of the above-described problems, and the present invention allows the controller to allocate time slots variably at the request of a higher processor, thereby increasing the number of subscribers using digital channel packet services through e-mail or Internet access. In this case, there is a purpose to respond quickly because the variable capacity of the subscriber to the interface to be variable.

1 is a block diagram showing a digital channel packet data interface device in a conventional exchange.

2 is a block diagram illustrating a digital channel packet data interface device in an exchange according to an embodiment of the present invention;

3 is a timing diagram of data transmitted and received between a digital subscriber board and a packet adjusting unit in FIG.

Explanation of symbols on the main parts of the drawings

50, 51 ~ 54: Digital subscriber board 60: Interface board

61: multiplexer 62,63: receiver

64: first time switch unit 65: demultiplexer

66, 67: transmitter 68: controller

70: second time switch unit 80: packet adjusting unit

In order to achieve the above object, the present invention is a switch having a digital subscriber board and a packet coordinator for providing a digital channel packet service to the digital subscriber board, between the digital processor board and the packet coordinator from an upper processor. And an interface board for variably allocating timeslots required for processing digital channel packet data and controlling the digital subscriber board.

On the other hand, the interface board includes a multiplexer for multiplexing the digital channel packet data applied in the serial data format from the digital subscriber board; A first receiver converting serial data applied from the multiplexer into parallel data; A second receiver for inserting and applying parallel data applied from the first receiver into a specific timeslot of a sub highway; A second time for receiving a specific time slot of the corresponding sub highway from the second receiver and applying the specific time slot to the first time switch, or for receiving and transmitting data applied from the packet controller through the first time switch to the sub highway; A switch unit; A first transmitter for receiving digital channel packet data from the second time switch unit as a specific timeslot of a sub highway and converting the digital channel packet data into parallel data; A second transmitter for converting parallel data applied from the first transmitter into serial data for the digital subscriber; Demultiplexing and demultiplexing serial data applied from the second transmitter to the digital subscriber board; And a controller configured to variably allocate time slots capable of processing digital channel packet data according to the number of digital channel packet users from an upper processor, and to allocate one time slot in predetermined group units, and to control the digital subscriber data line. It is characterized by.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

As shown in FIG. 2, a digital channel packet data interface device in an exchange according to an embodiment of the present invention includes a digital subscriber board 50, an interface board 60, a first time switch unit 70, A packet adjusting unit 80 is provided.

Here, a data line is connected to each of the digital subscriber boards 50 in order to communicate digital channel packet data between the packet controller 80 through the digital subscriber board 50 and the interface board 60.

In addition, the interface board 60 variably allocates a time slot necessary for processing digital channel packet data between the digital subscriber board 50 and the packet controller 80 from an upper processor.

The packet coordinator 70 provides a digital channel packet service to a digital subscriber by a LAPB protocol, and performs matching and switching functions by a signaling scheme protocol between packet data networks with an ISDN exchanger.

The first time switch unit 80 functions to switch voices and data of subscribers, and switches to provide a digital channel packet communication path between the corresponding interface board 60 and the packet adjusting unit 80.

Meanwhile, the interface board 60 includes a multiplexer 61, a first receiver 62, a second receiver 63, a second time switch 64, a first transmitter 67, The second transmitter 66, the demultiplexer 65, and the controller 68 are provided.

The multiplexer 61 multiplexes digital channel packet data applied from the digital subscriber board 50 in a serial data format.

The first receiver 62 converts serial data applied from the multiplexer 61 into parallel data.

The second receiver 63 inserts and applies parallel data from the first receiver 62 into a specific timeslot of the sub highway.

The second time switch unit 64 receives a specific time slot of the sub highway from the second receiver 63 and applies it to the first time switch unit 70 or from the packet controller 80. The data applied through the first time switch unit 70 is applied to the sub highway and is applied to the first transmitter 67.

The first transmitter 67 converts the digital channel packet data from the second time switch unit 64 into a specific time slot of the sub highway and converts the data into parallel data.

The second transmitter 66 converts the parallel data applied from the first transmitter 67 into the serial data for the digital subscriber.

The demultiplexer 65 demultiplexes serial data applied from the second transmitter and applies the deserialized data to the digital subscriber board 50.

The controller 68 receives a time slot that can process digital channel packet data according to the number of digital channel packet users from an upper processor, and assigns one time slot in predetermined group units, and allocates the digital subscriber data line. To control.

Referring to the operation of the present invention configured as described above in detail with reference to Figures 2 and 3 as follows.

First, the interface board 60 is assigned a time slot necessary for processing digital channel packet data from an upper processor upon initialization. The standard of the time slot assignment is to be assigned as the number of digital channel packet users increases. In addition, 32 digital subscriber boards 50 are also assigned to multiple groups.

That is, one timeslot allocation may be performed per digital subscriber board 50, or one timeslot may be allocated in units of 2, 4, or 8 sheets.

In this case, the control unit 68 allocates one time slot to each of the second time switch unit 64, the second receiver 63, and the first transmitter 67 in the allocated group unit. For example, the first digital subscriber board 51 allocates a first time slot, and the thirty-second digital subscriber board 54 allocates a thirty-second time slot.

Next, a method of transmitting digital channel packet data from the first digital subscriber board 50 to the packet controller 80 will be described.

First, before the digital subscriber board 50 transmits the digital channel packet data, the digital subscriber board 50 makes a flag indicating that there is data to be transmitted as a request signal, and the interface board 60 periodically checks the flag to output an output signal when it is a request signal. In this case, the digital subscriber board 50 transmits data.

At this time, the interface board 60 enables the digital subscriber line in the multiplexer 61 and disables other digital subscriber boards belonging to the same group before changing the flag to the output signal.

Therefore, the multiplexer 61 multiplexes data applied from the digital subscriber board 50 and applies the serial data to the first receiver 62 as serial data, and the first receiver 62 latches the serial data. After converting the data into parallel data, it is applied to the second receiver 63.

Accordingly, the second receiver converts the parallel data applied from the first receiver 62 into sub-highway specific timeslot data to be applied to the first time switch unit 70 through the second time switch unit 64. do.

In this case, when one time slot is allocated, the first digital subscriber board 51 is connected to TS0 (Time Slot 0), and the 32nd digital subscriber board 54 is connected to TS31 (Time Slot 31).

In the second time switch unit 70, the control unit 68 receives the time slot of the first time switch unit 70 under the control of the upper processor, and connects the same. The first time switch unit 70 is connected to the second time switch unit 70. In the function of switching the voice and data of the subscriber, and switching to provide a digital channel packet communication path between the interface board 60 and the packet controller 80.

Thus, the packet coordinator 80 provides digital subscribers with digital channel packet services by the LAPB protocol, and performs matching and switching functions by using a protocol which is a signaling system between the packet data network with the PSPDN and the ISDN exchange.

Meanwhile, referring to a method of receiving digital channel packet data from the packet controller 80 to the digital subscriber board 50, the packet controller 80 receives data received from an originating subscriber in another network or the same network. The LAPB protocol is transmitted to the first transmitter 67 through the time switch units 70 and 64 in the HDLC format.

Accordingly, the first transmitter 67 converts the sub-highway specific timeslot data applied through the corresponding time switch units 70 and 64 into parallel data, transfers the data to the second transmitter 66, and then transmits the corresponding second transmitter 66. ) Converts the parallel data applied from the first transmitter 67 into serial data and applies it to the demultiplexer 65.

Accordingly, the demultiplexer 65 initializes and transmits the demultiplexer 65 to the corresponding digital subscriber board 50 which is allocated to use the same timeslot when the time slot is allocated from the upper processor. The serial data coming into the input terminal of) is transmitted.

Then, the digital subscriber board 50 receives the data when the address of the data matches the magnetic address.

As described above, the present invention allows the control unit to allocate time slots variably at the request of a higher processor so that the capacity of the subscriber can be changed when the subscriber of the digital channel packet service is increased by E-mail or Internet access. You can do that.

As described above, the present invention allows the controller to allocate time slots variably at the request of a higher processor so that the capacity of the subscriber can be increased when the number of subscribers of the digital channel packet service is increased through e-mail or Internet access. Variable interface allows quick response.

Claims (1)

In a switch having a digital subscriber board 50 and a packet adjuster 80 for providing digital channel packet service to the digital subscriber board, A multiplexer (61) for multiplexing digital channel packet data applied from the digital subscriber board (50) in a serial data format; A first receiver 62 for converting serial data applied from the multiplexer 61 into parallel data; A second receiver 63 for inserting and applying parallel data applied from the first receiver 62 into a specific timeslot of a sub highway; The specific time slot of the corresponding sub highway is received from the second receiver 63 and applied to the first time switch unit 70, or from the packet controller 80 through the first time switch unit 70. A second time switch unit 64 receiving and transmitting the data to the service highway; A first transmitter 67 for converting the digital channel packet data from the second time switch unit 64 into a specific timeslot of the sub highway and converting the digital channel packet data into parallel data; A second transmitter (66) for converting parallel data applied from the first transmitter (67) into serial data for the digital subscriber; A demultiplexer (65) for demultiplexing serial data applied from the second transmitter and applying it to the digital subscriber board (50); Time slots capable of processing digital channel packet data are variably allocated according to the number of digital channel packet users from an upper processor, and the digital subscriber board 50 is allocated one time slot in a predetermined group unit, and the digital subscriber data line And a control unit (68) for controlling the digital channel packet data interface device in the exchange.