KR200308146Y1 - Rice-selecting device by color light intensity - Google Patents

Abstract

The present invention relates to a fine particle color sorting apparatus, and in particular, it is possible to automatically control the accurate delay time for sorting out and removing the defective taste by accurately measuring the falling speed or falling time of any defective taste in the drop passage. It relates to a particulate color sorting device, characterized in that.

In the prior art, there was a problem that automatic control of the delay time for sorting removal was impossible because the exact dropping speed or the dropping time of each arbitrary bad taste was not known.

The present invention is provided with an upper optical sensor and a lower optical sensor to selectively detect that any defective taste falls between a predetermined upper end point and a predetermined lower end point in a drop passage, and any defective taste from the upper optical sensor. According to the screening detection signal of and the random detection signal of any defective taste from the lower light sensor, a "timing circuit" for outputting a corresponding "clock pulse count start signal" and "clock pulse count stop signal" respectively; A counter (counter) and DA (digital-analog) for measuring the fall time of the arbitrary defective taste in the drop passage by the "clock pulse count start signal" and the "clock pulse count stop signal". ) A converter, an offset circuit, and a differential amplifier, and the output voltage from the differential amplifier is VF (voltage-frequency) of a normal delay circuit. And a color sorting device circuit-connected to be applied to the transducer.

According to the present invention, it is possible to accurately measure the fall rate or fall time of any defective rice in the drop passage, and to remove and remove the defective rice accurately. Automatic control of the exact delay time for the operation of the air jet nozzle is possible.

Description

Fine-selecting device by color light intensity}

The present invention relates to a fine particle color sorting apparatus, and particularly, to accurately measure a drop rate or a drop time of any defective rice in a drop passage, so that the defective rice can be selectively removed. Fine color sorting device, characterized in that it is possible to automatically control the precise delay time for the operation of the solenoid valve and the air jet nozzle to match the drop speed or the drop time. It is about.

In the prior art, in the fine particle color sorting apparatus which sorts and detects the defective rice mixed in the raw rice using optical means, and operates the solenoid valve and the air injection nozzle to selectively remove the defective rice using air pressure. In the chute supplied to the defect detection optical means, the dropping speed of the fine particles is not constant and the scattering phenomenon is scattered due to the particle flow rate, the shape of the fine particles, and the state of the surface thereof. As a result, even if the solenoid valve and the air injection nozzle are operated, there is a problem that the bad taste is not removed.

Regarding the structure of the particulate color sorting apparatus, as shown in FIG. 6, the particulate matter from the hopper is supplied to the chute 12 from the feeder 11. It flows from the chute upper side to the chute lower side, aligns and falls, and reaches the defective taste detection optical means 20.

The colored defective rice is separated from the chute 12 by the optical sensor 22 in the air of the raw material drop flow path, and is selectively removed by the air pressure by the air injection nozzle 43 provided thereunder. Since the air jet nozzle 43 is provided at an angle of about 40 mm to 120 mm in the vertical direction from the optical axis of the optical sensor 22 so as not to disturb the field of view of the optical sensor 22, the optical sensor 22 selectively detects the defective taste. The time for operating the solenoid valve 42 and the air injection nozzle 43 to sort out and remove the defective rice afterwards needs to be precisely matched to the falling time of the defective rice, and according to this need, a normal delay time (delay) Time) is required.

Furthermore, the speed of the fine particles flowing through the upper part of the chute is scattered due to the shape of the chute structure, the flow rate of the fine particles, and the state of the particulate surface. For this reason, it was necessary to change the delay time until the solenoid valve and the air injection nozzle were operated, but there was a problem in that automatic control of the delay time was impossible because the exact drop speed or the drop time of each arbitrary defect was not known.

In the prior art, in order to measure the fall rate or fall time of a defective rice, it is necessary to install a new optical sensor in a chute unit in the defective rice flow direction, or to process a signal from the optical sensor by introducing an image processing technique. There is a problem that the configuration becomes complicated, the installation cost goes up.

In the prior art, in order to adjust the operation timing of the solenoid valve and the air jet nozzle, a method of directly adjusting the human eye while watching the falling flow of the raw material rice yields the brightness of the reflected light of the background plate of the defective taste detection optical means. It is set to be brighter than the reflected light of beauty, adjusts so that all good quality looks dark, falls raw material at small flow rate little by little, and adjusts delay time while visually confirming more removable condition. There was a problem that required time and expense.

Furthermore, in the prior art, in order to remove the defective rice, as long as the operation time of the air jet nozzle is blown away and the defective rice is blown out, 7 to 10 grains of good quality are blown together to remove one defective rice. There was a problem.

As a result, in the prior art, the granular color sorting device which automatically measures the drop speed or fall time of the defective rice, or automatically controls the precise delay time for the accurate operation of the solenoid valve and the air jet nozzle for sorting and removing the defective rice. Was not realized.

The present invention is to solve the above problems of the prior art,

An object of the present invention is provided with an upper optical sensor and a lower optical sensor to selectively detect that any bad taste falls between a predetermined upper end point and a predetermined lower end point in a drop passage, A "timing circuit" for outputting a corresponding "clock pulse count start signal" and a "clock pulse count stop signal" corresponding to each of the bad taste sorting detection signals and the arbitrary bad taste sorting detection signal from the lower light sensor; And a counter (counter, counter) for measuring the fall time of the arbitrary defective rice in the drop passage by the "clock pulse count start signal" and the "clock pulse count stop signal", and DA (Digital-to-analog) converters, offset circuits, and differential amplifiers are provided, and the output voltages from these differential amplifiers are typically delayed. Circuit-connected to be applied to a V-F (voltage frequency) converter of the circuit,

The operation of the solenoid valve driving circuit, the solenoid valve, and the air injection nozzle can be accurately measured at the dropping speed and the dropping time so that the dropping speed and the dropping time of any defective rice in the drop passage can be accurately measured. An object of the present invention is to provide a particulate color sorting device, which enables automatic control of accurate delay time.

1 is a longitudinal cross-sectional view showing the configuration and operation of the embodiment according to the present invention in a general and schematic manner;

Figure 2 is a longitudinal cross-sectional view schematically showing the configuration and operation of the upper optical sensor and the lower optical sensor of the embodiment according to the present invention,

3 is a block diagram of a circuit of an embodiment according to the present invention;

4 is a block diagram of the circuit of M in FIG.

5 is a waveform diagram showing waveforms of a clock pulse count start signal, a clock pulse count stop signal, a hold signal, a reset signal, and the like, and their correlations according to the present invention;

6 is a longitudinal sectional view schematically and schematically showing the construction and operation of the particulate color sorting apparatus in the prior art;

7 is a block diagram of a circuit in the prior art.

* Explanation of the codes for the main parts of the present invention

1: bad rice 1-a: random bad rice, 1-a ': random bad rice dropping distance L, 1-b: new random bad rice,

2: good quality rice (良 品 米), 3 raw material rice (原料 米),

10: fine grain supply means, 11 feeder, 12 chute, fine runway, 15 raw material fall flow path,

20: optical means for detecting bad taste

21: fluorescent lamp as light source,

22: optical sensor (ie photodiode),

22-a: lens,

23-1: background plate corresponding to the other optical sensor,

23-2: background plate corresponding to the light sensor on one side,

30: signal processing means, 31: amplifying circuit,

32-1, 32-2: comparison circuit, 32-1-a, 32-2-a: setter,

34: OR circuit,

35: one shot multivibrator (mono-stable multivibrator), 36: VF (voltage-frequency) converter (converter, converter), 37: shift register, 38: delay ) Circuit,

40: bad taste removal means, 41: solenoid valve drive circuit,

42: solenoid valve, 43: air injection nozzle,

51-1: upper optical sensor (ie photodiode), 51-2: lower optical sensor (ie photodiode), 52: light source, 53, 53 ' : Background plate, 54: lens,

61-1: first amplifier circuit, 61-2: second amplifier circuit,

62-1: first comparison circuit, 62-1-a: first setter,

62-2: second comparison circuit, 62-2-a: second setter,

70: timing circuit,

81: a clock pulse generator,

82: counter,

85: D-A (Digital-Analog) Converter,

86: offset circuit, 86-1: resistor, 86-2: variable resistor

90: differential amplifier, 90-a: setter

P: predetermined upper point, Q: predetermined lower point,

L: a predetermined distance between P and Q,

CL: waveform of the clock pulse,

ST: clock pulse count start signal,

SP: clock pulse count stop signal,

HO: hold signal,

RE: reset signal,

CO: waveform of the clock pulse applied to the counter from the time of application of the clock pulse count start signal to the time of application of the clock pulse count stop signal

V2: Voltage of the output signal from the D-A (Digital-Analog) converter.

The present invention will be described in detail with reference to the accompanying drawings and embodiments thereof.

The configuration of the present invention, as shown in Figures 1 to 5,

To detect and remove defective rice 1;

Fine-grained supply means for supplying the raw-material rice (3) in which the defective rice (1) and the good rice (2) are mixed to the defective rice detecting optical means (20). 10;

Fluorescent lamp 21 as a light source and an optical sensor (that is, a photodiode) so that the defective rice 1 mixed in the raw rice 3 can be detected selectively. 22, a lens 22-a, and a background plate 23 (background plates 23-1 and 23-2 in FIG. 1) corresponding to the optical sensor 22 are provided. The defective taste detection optical means 20 is provided;

An amplification circuit (100) is driven to drive an electromagnetic valve (42) in accordance with an output signal from the optical sensor (22) to remove the defective taste (1) that has been selectively detected by the optical sensor (22). 31, comparison circuits 32-1 and 32-2, setters 32-1-a and 32-2-a, OR circuits 34, and one-shot multivibrator ( one shot multivibrator (mono-stable multivibrator) 35, VF (voltage-frequency) converter (36) and a shift register (37) A signal processing means 30 provided with a delay circuit 38 is provided;

In the VF (voltage-frequency) converter 36, the optical sensor 22 (i.e., one side in FIG. 1) in the raw material fall flow path (hereinafter referred to as "falling flow path") 15; Is required for the defective rice 1 to drop the distance from the optical axis of the optical sensor 22 and the optical sensor 22 of the other side to the air injection nozzle 43. The predetermined average fall time T1 is defined as the " predetermined average delay time T1 " of the operation of the solenoid valve drive circuit 41, the solenoid valve 42, and the air injection nozzle 43. A predetermined reference voltage V1 (hereinafter referred to as "the predetermined reference voltage V1 for the average delay time T1") to be delayed is applied;

The solenoid valve drive circuit 41 and the solenoid valve so that the bad rice 1 which passes the fall flow path 15 by the solenoid valve drive signal from the said signal processing means 30 may be removed. In the fine particle color sorting apparatus which consists of 42 and the bad taste removal means 40 provided with the air injection nozzle 43;

An upper optical sensor (ie, an upper optical sensor) capable of selectively detecting that any defective taste 1-a passes through a predetermined upper end point P in the drop passage 15. A photodiode) 51-1 (that is, an optical sensor for detecting a top screen) and the defective taste 1-a in the drop passage 15, the predetermined top point P. A lower optical sensor (i.e. photodiode) to allow selective detection of passing through a predetermined lower end point Q located below the predetermined distance L from the 51-2) (i.e., an optical sensor for bottom sorting detection), a light source 52, a background plate 53 (53 '), and a lens 54 are provided.

Preferably, the light source 52 is configured to use the fluorescent lamp 21 as a light source of the ordinary bad taste detection optical means 20 as it is, and the background plates 53 and 53 'are formed of the upper optical sensor. The structure which uses the background plate 23 of the said normal bad taste detection optical means 20 provided in the position corresponding to 51-1 and the said lower light sensor 51-2, respectively is preferable.

The upper optical sensor 51-1 and the lower optical sensor 51-2 are installed at the defective light detecting optical means 20, and the predetermined distance L, that is, the predetermined upper end point P is provided. And a distance between the predetermined lower end point Q, that is, a falling flow path between the optical axis of the upper optical sensor 51-1 and the optical axis of the lower optical sensor 51-2. The distance at 15 is between the optical axis of the conventional optical sensor 22 (that is, the optical sensor 22 on one side and the optical sensor 22 on the other side) and the air jet nozzle 43. As a distance in the falling flow path 15, it consists of 20 mm-80 mm in a preferable embodiment.

Reflected light of the background plates 53 and 53 'such that the upper photo sensor 51-1 and the lower photo sensor 51-2 detect and detect the random defect 1-a. The brightness of [the reflected light according to the light ray of the said light source 52] is comprised so that the brightness of the reflected light (the reflected light according to the light ray of the said light source 52) of the good quality 2 may be matched.

The lens 54 is installed on the optical axis of the upper optical sensor 51-1 and the optical axis of the lower optical sensor 51-2.

In addition, by the upper optical sensor (51-1) to enable the selective detection of the random defective taste (1-a); A first amplifier circuit 61-1 for amplifying the output signal from the upper optical sensor 51-1; When the brightness of the reflected light of the arbitrary defective rice 1-a with respect to the upper optical sensor 51-1 is darker than the brightness of the reflected light of the background plate 53, that is, 2) is less than a predetermined brightness when the reflected light of the non-defective product 2 is the darkest], the voltage of the output signal from the first amplifier circuit 61-1 and the predetermined comparison reference voltage Vg [ That is, the voltage of the output signal from the upper optical sensor 51-1 according to the predetermined brightness when the reflected light of the non-defective product 2 is the darkest among the non-defective products 2 is the first amplifying circuit 61-1. A first comparator circuit capable of outputting a digital signal high level for the selective elimination of any defective taste 1-a according to the presence of the difference of the voltage amplified by 62-1); A first setter 62-1-a is provided for setting the predetermined comparison reference voltage Vg of the first comparison circuit 62-1 and applying it to the first comparison circuit 62-1. .

In addition, by the lower optical sensor (51-2) to enable the selective detection of the random defective taste (1-a); A second amplifying circuit 61-2 for amplifying an output signal from the lower optical sensor 51-2; When the brightness of the reflected light of the defective rice 1-a with respect to the lower optical sensor 51-2 is darker than the brightness of the reflected light of the background plate 53 '(i.e., good quality 2) ) Is less than the predetermined brightness when the reflected light of the non-defective product 2 is the darkest], the voltage of the output signal from the second amplifying circuit 61-2 and the predetermined comparison reference voltage Vg [ That is, the voltage of the output signal from the lower optical sensor 51-2 according to the predetermined brightness when the reflected light of the non-defective product 2 is the darkest among the non-defective products 2 is the second amplifying circuit 61-2. A second comparison circuit capable of outputting a digital signal high level for the selective elimination of any of the defective tastes 1-a according to the presence of the difference between the voltage amplified by (62-2); A second setter 62-2-a is provided for setting the predetermined comparison reference voltage Vg of the second comparison circuit 62-2 and applying it to the second comparison circuit 62-2. .

In addition, the present invention is provided with a timing circuit 70, the timing circuit 70,

Application of the output signal of the digital signal high level from the first comparison circuit 62-1 when the random defective taste 1-a is selectively detected at the predetermined upper point P. Accordingly, the timing circuit 70 outputs a " clock pulse count start signal " (clock pulse pulse timing signal) so that it can be applied to a counter 82;

In addition, when the random defect 1-a is detected at the predetermined lower end point Q, the output signal of the digital signal high level from the second comparison circuit 62-2 may be used. Upon application, the timing circuit 70 outputs a " clock pulse count stop signal " (clock pulse pulse stop signal) so that it can be applied to a counter 82;

Further, from the time of application of the "clock pulse coefficient start signal" according to the random defect 1-a to the time of application of the "clock pulse coefficient stop signal" according to the random defect 1-a. The counter 82 counts the clock pulses applied to the counter 82 so as to be applied to the DA (digital-analog) converter 85 as a "unit signal according to the same defective taste". A "hold signal of a counted signal" (hereinafter referred to as a "hold signal"), which is maintained as a state of a " signaled signal " Immediately following the output of the "clock pulse count stop signal" according to the defective taste (1-a), the timing circuit 70 outputs and the "hold signal" is applied to the counter 82, so that the counter ( 82 outputs the " counted signal " according to the random taste 1-a, so that DA (digital-analog) To be applicable to the transducer 85;

Further, when the " hold signal " is output from the timing circuit 70 and applied to the counter 82, immediately afterwards, the counter 82 is newly renewed and any new defect in the drop passage 15 A reset signal for initializing the counter 82 so that the count of the clock pulses can be started in response to the application of the "clock pulse count start signal" according to US 1-b. 70 is provided as a timing circuit 70 for outputting the reset signal to the counter 82.

In addition, a clock pulse generator 81 for applying a clock pulse to the timing circuit 70 and the counter 82 is provided.

The counting of the clock pulses is started in accordance with the application of the "clock pulse count start signal" output from the timing circuit 70, and the application of the "clock pulse count stop signal" output from the timing circuit 70. Stops the counting of the clock pulse and outputs the " counted signal " according to the random defect 1-a in response to the application of the " hold signal " output from the timing circuit 70. Applied to the DA (digital-to-analog) converter 85, and the counter 82 is applied with the " reset signal " output from the timing circuit 70, and any new defects in the drop passage 15 A counter 82 is provided to reset the clock pulse to start again in accordance with the "clock pulse count start signal" according to US 1-b. .

The counter 82 is a preferred embodiment and is composed of, for example, a decimal three stage counter.

In addition, the present invention, the DA (digital-analog) converter 85 receives the "counted signal" according to the random defect (1-a) output from the counter 82, the analog signal In the case of the time when the arbitrary defective taste 1-a falls the distance L is "predetermined average fall time T2", it is determined according to the "counted signal". The voltage V2 of the output signal from the DA (digital-to-analog) converter 85 to be a voltage V1 equal to the " predetermined reference voltage V1 for the average delay time T1 " In addition, when the time when the arbitrary defective taste 1-a falls the distance L is longer than the "predetermined average falling time T2", DA (according to the "counted signal"), The voltage V2 of the output signal from the digital-to-analog converter 85 is higher than the "predetermined reference voltage V1 for the average delay time T1". When the time when the arbitrary defective taste 1-a falls the distance L is shorter than the "predetermined average fall time T2", Signal V2 of the output signal from the DA (digital-analog) converter 85 according to the " signal " is lower than the " predetermined reference voltage V1 for the average delay time T1 " A DA (digital-analog) converter 85 is provided;

The voltage V2 of the output signal from the DA (digital-to-analog) converter 85 is equal to an absolute voltage (i.e., "the predetermined reference voltage V1 for the average delay speed T1"). V1), there is provided an offset circuit 86 for offsetting.

The DA (Digital-Analog) Converter 85 is a conventional DA (Digital-Analog) Converter 85 having a resolution of the output signal from the counter 82, and preferably 10 or more bits of resolution. In the preferred embodiment, for example, the resolution is 11 bits.

The offset circuit 86 is a conventional offset circuit composed of a resistor 86-1 and a variable resistor 86-2.

Further, in the present invention, the "predetermined reference voltage V1 for the average delay time T1" is applied to the + terminal (non-inverting terminal) of the differential amplifier 90, and the distance The voltage V2 of the output signal from the DA (digital-analog) converter 85 in response to the application of the "counted signal" according to the arbitrary defective taste 1-a dropping (L) is- A voltage V3 offset to a voltage (i.e., -V1) is applied to the negative terminal (inverting terminal) of the differential amplifier 90, so that the predetermined value for the " average delay time T1 " And a differential amplifier 90 configured to output the difference voltage V4 of the reference voltage V1 " and the offset voltage V3, wherein the " average " A setter 90-a is provided which is set to a predetermined reference voltage V1 for the delay time T1 and is applicable to the differential amplifier 90;

Accurate automatic control of the delay time for the correct operation of the solenoid valve drive circuit 41, the solenoid valve 42, and the air injection nozzle 43 to selectively remove the defective taste 1-a It is a fine color sorting device circuit-connected so that the difference voltage V4 output from the differential amplifier 90 can be applied to the VF (voltage-frequency) converter 36. .

In a preferred embodiment, the voltage amplification factor for the differential voltage V4 of the differential amplifier 90 is configured as "1".

The action of the present invention of the above configuration is as follows.

In the conventional fine particle color sorting apparatus, as shown in FIG. 6, in order to selectively detect and remove the defective rice 1, the raw rice 3 in which the defective rice 1 and the good quality rice 2 are mixed is It moves to the said defect detection optical means 20 via the said particulate supply means 10. As shown in FIG.

The defective rice 1 and the good quality rice 2 mixed in the raw rice 3 are collected by the optical sensor 22 in the drop passage 15 in the defective rice detecting optical means 20. 1) is selectively detected and removed by the signal processing means 30 and the defective taste removing means 40 having a normal configuration. In other words,

The brightness of the reflected light of the defective light 1 with respect to the fluorescent light 21 as the light source in the drop passage 15 is the background plate 23 for the fluorescent light 21 as the light source by the optical sensor 22. Compared with the brightness of the reflected light, the bad taste 1 is detected to be brighter than the predetermined brightness or darker than the predetermined brightness, so that it is adjusted to match the brightness of the reflected light of the good quality 2. The defective taste 1 is distinguished from the good quality 2 by the difference between the brightness of the reflected light of the background plate 23, and the defective taste 1 can be selectively detected.

The output signal from the optical sensor 22 according to the defective taste 1 detected by the drop passage 15 is, as shown in Figs. 31, the comparison circuits 32-1 and 32-2, the OR circuit 34, and the one shot multivibrator (monostable multivibrator) ( A signal processing means having a delay circuit 38 equipped with a VF (voltage-frequency) converter (converter) 36 and a shift register 37; 30, the solenoid valve drive signal delayed by the fall time of the said defective rice 1 or the delay time matched with the fall time is output, and the said solenoid valve drive circuit 41 and the said which are a normal structure are said The defect which passes the fall flow path 15 by the solenoid valve 42 and the air injection nozzle 43 (1) it can be selectively removed. In other words,

A defect in contrast with the brightness of the reflected light of the background plate 23 (that is, the background plates 23-1 and 23-2 in FIGS. 6 and 1) matched to the brightness of the reflected light of the good quality 2 The brightness of the reflected light of the rice (1) is selectively detected by the optical sensor (22);

The output signal from the optical sensor 22 is amplified by the amplifying circuit 31, and by the setter 32-2-a, the reflected light of the good quality 2 from the good quality 2 is the darkest. Comparison circuit 32-2, in which the voltage of the output signal from the optical sensor 22 according to the predetermined brightness is set to the usual predetermined reference voltage Vg, which is a voltage amplified by the amplifier circuit 31. Wow; By the setter 32-1-a, the voltage of the output signal from the optical sensor 22 according to the predetermined brightness in which the reflected light of the non-defective rice 2 is the brightest among the non-defective rice 2 is supplied to the amplification circuit ( The background plate (compared by the comparison circuit 32-1 set to the usual predetermined comparison reference voltage Vf, which is the voltage amplified by 31), is matched with the brightness of the reflected light of the good quality 2 ( 23) When the difference from the brightness of the reflected light of [the background plates 23-1 and 23-2 in Figs. 6 and 1] is less than the predetermined brightness (that is, the brightness of the reflected light of the defective taste 1). Is the brightness less than the darkest predetermined brightness as the good quality 2, and when the difference is more than the predetermined brightness (that is, the brightness of the reflected light of the defective rice 1 is the best quality as the good quality 2). In the case of the brightness exceeding the bright predetermined brightness], it is detected as the defective taste (1). In other words,

When the brightness of the reflected light of the defective rice 1 is darker than the darkest predetermined brightness as the good rice 2, the voltage of the output signal from the optical sensor 22 in this case passes through the amplifier 31. Amplified, the voltage lower than the set comparison reference voltage (Vg) is output, and the digital signal high level for removing the bad taste (1) is output by the comparison circuit 32-2,

When the brightness of the reflected light of the defective rice 1 is brighter than the brightest predetermined brightness as the good rice 2, the voltage of the output signal from the optical sensor 22 in this case passes through the amplifier 31. Amplified, a voltage higher than the set reference voltage Vf is output, and the digital signal high level for removing the defective tail 1 is output by the comparison circuit 32-1.

Subsequently, the digital signal high level for the removal of the defective rice 1 from the comparison circuit 32-2 and the digital for removing the defective rice 1 from the comparison circuit 32-1. The signal high level is output by the OR circuit 34 as the digital signal high level for the removal of the bad taste 1.

Subsequently, when the digital signal high level for removing the bad taste 1 is output from the OR circuit 34, the one shot multivibrator (monostable multivibrator) is output. The solenoid valve drive signal is outputted by the reference numeral 35, and the solenoid valve drive signal is generated by the VF (voltage-frequency) converter (converter)) 36 and the shift register 37. The delay circuit 38 is provided as a solenoid valve driving signal delayed by a normal " predetermined average delay time T1 " The defective taste 1 can be selectively removed by the normal action of the solenoid valve drive circuit 41, the solenoid valve 42, and the air injection nozzle 43.

The " predetermined average delay time T1 " measures in advance the " predetermined average fall rate " to the fall time of the defective rice 1, so that the " VF (voltage-frequency) converter 36 " A predetermined average required for the defective rice 1 to drop the distance from the optical axis of the optical sensor 22 to the air injection nozzle 43 in the drop passage 15. The predetermined reference voltage to delay the fall time T1 "as" predetermined average delay time T1 "of the operation of the solenoid valve 42 and the air injection nozzle 43. By applying (V1) (i.e., " predetermined reference voltage V1 for average delay time T1 "), the configuration and operation of the " predetermined average delay time T1 " is possible.

The present invention, as shown in Figures 1 to 5,

In the falling flow path 15 of the defective rice 1, the upper optical sensor (1) may be used to selectively detect that any defective rice 1-a passes through a predetermined upper point P. An upper optical sensor 51-1, a light source 52, a background plate 53, and a lens 54,

The light source 52 is preferably a configuration in which a fluorescent lamp 21 as a conventional light source is used, and thus the manufacturing cost thereof is saved, and the background plate 53 is a conventional background plate 23 (that is, FIG. 1 and 2 are preferably used, and the manufacturing cost thereof is saved.

Reflected light of the background plate 53 (the light source 52 of the light source 52 so that the upper photo sensor 51-1 detects and detects the random defective taste 1-a in the drop passage 15). The brightness of the reflected light according to the light beam] is configured to coincide with the brightness of the reflected light (the reflected light according to the light beam of the light source 52) of the good quality 2,

In the case where the random defective taste 1-a has the reflected light darker than the reflected light of the background plate 53 in the drop passage 15 and less than the predetermined brightness, from the optical sensor 51-1 The voltage of the output signal is amplified by the first amplifier circuit 61-1, and the first comparison reference voltage Vg set by the first setter 62-1-a is applied. The comparison circuit 62-1 compares the predetermined comparison reference voltage Vg,

From the first comparison circuit 62-1, a signal according to the selective detection of the arbitrary defective rice 1-a, that is, a digital signal high level, can be output.

Since the reflected light of the defective rice 1 is generally darker than the reflected light of the non-defective product 2 in the darkest of the non-defective products 2, the above-described configuration includes only the configuration for comparison with the predetermined comparison reference voltage Vg. In the case of the reflected light of the defective rice 1 which is brighter than the reflected light of the brightest good rice 2 among the brightest good rice 2, the case is few, but the predetermined comparison criteria is required as necessary. A configuration for comparison with the voltage Vf can also be made.

The arbitrary defective rice 1-a is detected and detected by the upper optical sensor 51-1 in the drop passage 15, and the arbitrary defective rice is detected from the upper optical sensor 51-1. When a signal according to (1-a) is output, the signal is amplified by the first amplifier circuit 61-1, and

In accordance with the presence of the difference between the voltage of the output signal from the first amplifier circuit 61-1 and the predetermined comparison reference voltage Vg set by the first setter 61-a, 1 The digital signal high level is output by the comparison circuit 62-1 and applied to the timing circuit 70, whereby the timing circuit 70 is " clock pulse coefficient start signal " ST at 5) is output to the " counter "

The counter 82 to which a clock pulse is applied from the clock pulse generator 81 is a clock clock count start signal which is the digital signal high level according to the output signal of the upper optical sensor 51-1. According to " (ST in FIG. 5), the clock pulses start counting.

In addition, the present invention enables selective detection that any defective rice 1-a passes through a predetermined lower end point Q in the falling flow path 15 of the defective rice 1. The lower optical sensor 51-2, the light source 52, the background plate 53 ', and the lens 54 are provided.

The light source 52 is preferably a configuration in which a fluorescent lamp 21 as a conventional light source is used, and the manufacturing cost thereof is saved, and the background plate 53 'can be a configuration in which a normal background plate is used. The manufacturing cost is saved.

The background plate so that the lower optical sensor 51-2 detects and detects the random defect 1-a (that is, 1-a 'in FIG. 2) in the drop passage 15. The brightness of the reflected light (which is the reflected light according to the light beam of the light source 52) of 53 'is configured to match the brightness of the reflected light of the good quality 2 (the reflected light according to the light beam of the light source 52),

From the optical sensor 51-2, in the case where the random defective taste 1-a has the reflected light darker than the reflected light of the background plate 53 'in the drop passage 15, less than the predetermined brightness. The voltage of the output signal of is amplified by the second amplifying circuit 61-2, and the first comparison reference voltage Vg set by the second setter 62-2-a is applied. 2 is compared with the predetermined comparison reference voltage Vg by the comparison circuit 62-2,

From the second comparison circuit 62-2, a signal according to the selective detection of the arbitrary defective taste 1-a, that is, a digital signal high level, can be output.

Since the reflected light of the defective rice 1 is generally darker than the reflected light of the non-defective product 2 in the darkest of the non-defective products 2, the above-described configuration includes only the configuration for comparison with the predetermined comparison reference voltage Vg. In the case of the reflected light of the defective rice 1 which is brighter than the reflected light of the brightest good rice 2 among the brightest good rice 2, the case is few, but the predetermined comparison criteria is required as necessary. A configuration for comparison with the voltage Vf can also be made.

The arbitrary defective rice 1-a is detected and detected by the lower optical sensor 51-2 in the drop passage 15, and the arbitrary defective rice is detected from the lower optical sensor 51-2. When the signal according to (1-a) is output, the signal is amplified by the second amplifying circuit 61-2,

In accordance with the presence of the difference between the voltage of the output signal from the second amplifier circuit 61-2 and the predetermined comparison reference voltage Vg set by the second setter 61-2-a, The digital signal high level is output by the second comparison circuit 62-2, and applied to the timing circuit 70, whereby the timing circuit 70 receives a "clock pulse count stop signal". (SP in Fig. 5) is output and applied to the counter 82.

The counter 82 to which a clock pulse is applied from the clock pulse generator 81 is a clock clock count stop signal that is the digital signal high level according to the output signal of the lower optical sensor 51-2. According to " (SP in Fig. 5), counting of the clock pulses is stopped.

In the counter 82, from the time when the count of the clock pulse is started in accordance with the application of the "clock pulse count start signal" (ST in Fig. 5) according to the random defect 1-a, the arbitrary Until the count of the clock pulse stops in response to the application of the "clock pulse count stop signal" (SP in FIG. 5) according to the defective taste (1-a) of the following (hereinafter referred to as "start to stop"). The clock pulses applied to the counter 82 are the same as the indication of CO in FIG. 5, and in a preferred embodiment, the drop rate in the drop passage 15 of any bad taste 1-a is " a predetermined average. In the case of "falling speed", the number of clock pulses applied to the counter 82 in the "from start to stop" is, for example, about 1000.

In the case of the drop speed slower than the "previous average drop speed" in the drop passage 15 of any defective rice 1-a, it is applied to the counter 82 at the "from start to stop". The number of clock pulses is, for example, about 1100,

In the case of the drop speed in which the drop passage 15 of any defective rice 1-a falls faster than the "predetermined average drop speed", it is applied to the counter 82 in the "from start to stop" state. The number of clock pulses is, for example, about 900.

By the timing circuit 70,

When the random defective taste 1-a is detected at the predetermined upper end point P, the application of the output signal of the digital signal high level from the first comparison circuit 62-1 is applied. Accordingly, the timing circuit 70 outputs a " clock pulse count start signal " to the counter 82,

In addition, when the random defective taste 1-a is selectively detected at the predetermined lower end point Q, the application of the output signal of the digital signal high level from the second comparison circuit 62-2 is applied. In response, the timing circuit 70 outputs a " clock pulse count stop signal " to the counter 82.

Further, the "clock pulse coefficient stop according to the arbitrary defective taste 1-a is stopped from the application of the" clock pulse coefficient start signal "(ST in FIG. 5) according to the arbitrary defective taste 1-a. The counter 82 counts the clock signal (CO in FIG. 5) applied to the counter 82 until the application of the signal " (SP in FIG. 5). "Counted signal", which is maintained as a state of a "counted signal" (i.e., the "counted signal") so as to be applicable to the DA (digital-analog) converter 85 as a "signal". The hold signal " (i.e., " hold signal ") (HO in FIG. 5) immediately following the output of the " clock pulse count stop signal " according to the random defect 1-a. As the circuit 70 outputs and this "hold signal" is applied to the counter 82, the counter 82 causes the "count" according to the random defect 1-a. Received signal " and applied to the D-A (digital-analog) converter 85,

In addition, when the " hold signal " is output from the timing circuit 70 and applied to the counter 82, immediately afterwards, the counter 82 is newly renewed, and any new defects in the drop passage 15 are new. A reset signal (in FIG. 5) that initializes the counter 82 so that the counter of the clock pulse can be started in response to the application of the "clock pulse count start signal" according to (1-b). RE) is output by the timing circuit 70 to apply the reset signal to the counter 82.

The clock pulse generator 81 applies a clock pulse to the timing circuit 70 and the counter 82.

The counter 82 starts the counting of the clock pulse in accordance with the application of the "clock pulse counting start signal" (ST in FIG. 5) output from the timing circuit 70. The count of the clock pulse is stopped in response to the application of the "clock pulse count stop signal" (SP in FIG. 5) output from the timing circuit 70, and the "hold signal" output from the timing circuit 70. According to the application of (HO in Fig. 5), the " counted signal " according to the random defect 1-a is outputted and applied to the DA (digital-analog) converter 85, and the timing In response to the application of the " reset signal " (RE in FIG. 5) output from the circuit 70, the counter 82 is changed to " a " The clock pulse counting start signal "can be started again. It resets (reset) to reset.

The output signal from the counter 82 is " according to the random defect 1-a " by an indicator (not shown) so that the user can easily grasp the state in real time. It is possible that the numerical value of "counted signal" is displayed.

The " counted signal " in the counter 82, according to the arbitrary defective taste 1-a, is immediately output after the " clock pulse count stop signal " and applied to the counter 82. And the DA from the timing circuit 70 maintains its state as a " counted signal " as the " unit signal according to the same defective taste " according to the arbitrary defective taste 1-a. Is applied to the (digital-analog) converter 85.

The number of clock pulses applied to the counter 82 in the " start to stop ", in the preferred embodiment, is that the drop rate is " a predetermined average " For example, about 1000 drops, for example,

In the case of the drop speed slower than the "predetermined average drop speed" in the drop passage 15 of any defective rice 1-a, it is about 1100, for example.

If the dropping speed in the drop passage 15 of any defective rice 1-a is faster than the " predetermined average dropping speed "

The number of such clock pulses is determined by the DA converter 85 having a resolution for the " counted signal " by the counter 82, i.e. preferably at least 10 bits of resolution, in the embodiment as 11 bits of resolution. Is output as an analog signal by the DA converter 85 having a resolution of ¹¹ powers (i.e., 2 ¹¹ = 2048) of the voltage, according to the corresponding drop rate or drop time of any defective taste 1-a. (V2) is output.

Immediately following the output and the application of the hold signal, a reset signal is output from the timing circuit 70 and applied to the counter 82, and the reset signal causes the random defect in the counter 82 to be lost. The counting state of the clock pulse according to (1-a) is restored to a state in which no clock pulse is newly applied, that is, a clear state that is an initialization state, that is, a state of zero.

Thus, before the arbitrary defective taste 1-a arrives at the predetermined lower end point Q, a new separate arbitrary defective taste 1-b is added to the predetermined upper end point in the drop passage 15. Is detected by the upper optical sensor 51-1 through (P), and a "clock pulse count start signal" is applied to the counter 82 from the timing circuit 70 according to the output signal. In addition, before any " clock pulse count stop signal " according to the new distinct random defect 1-b is applied, the random defect 1-a (i.e., 1-a 'in Fig. 2). By the hold signal and the reset signal which are generated and applied immediately after the "clock pulse count stop signal" according to], the "counted signal" according to the random defect 1-a is the new distinction. Not affected by any defective taste (1-b).

The DA (digital-to-analog) converter 85 receives the " counted signal " according to the random defect 1-a, which is output from the counter 82, so that the DA (digital-analog) converter 85 converts the analog signal and outputs the analog signal. In this case, by the DA (digital-analog) converter 85, the time when the arbitrary defective taste 1-a drops the distance L is " predetermined average falling time T2. (I.e., in the case of "the predetermined average drop speed"), the voltage V2 of the output signal from the DA (digital-analog) converter 85 according to the "counted signal" A voltage V1 equal to the "predetermined reference voltage V1 for average delay time T1 "; In addition, when the time that the arbitrary defective taste 1-a falls the distance L is longer than the "predetermined average fall time T2" (that is, the "predetermined average fall speed"). At a slower falling rate], the voltage V2 of the output signal from the DA (digital-analog) converter 85, according to the " counted signal " Becomes a predetermined voltage higher than the reference voltage V1 " In addition, when the time that the arbitrary defective taste 1-a falls the distance L is shorter than the "predetermined average fall time T2" (that is, the "predetermined average fall speed"). At a faster drop rate], the voltage V2 of the output signal from the DA (digital-analog) converter 85, according to the " counted signal " Becomes a predetermined voltage lower than the reference voltage V1 "

In a preferred embodiment, when the time when any bad taste 1-a falls the distance L is the "predetermined average fall time T2" (ie, the "predetermined average fall speed"). Is an output signal from the DA (digital-analog) converter 85, the " predetermined reference voltage V1 for average delay time T1 "

When the time that any bad taste 1-a falls the distance L is longer than the "predetermined average fall time T2" (ie, slower than the "predetermined average fall speed"). The output signal from the DA (digital-analog) converter 85 is output at a voltage of, for example, 4.7 V as a predetermined higher voltage than the " predetermined reference voltage V1 for the average delay time T1 " ,

When the time that any bad taste 1-a falls the distance L is shorter than the "predetermined average fall time T2" (ie, faster than the "predetermined average fall speed"). The output signal from the DA (digital-analog) converter 85 is output as a voltage lower than the " predetermined reference voltage V1 for the average delay time T1 "

The voltage V2 of the output signal from the DA (digital-analog) converter 85 is, by the offset circuit 86, a predetermined reference voltage V1 for the " average delay speed T1. &Quot; Is offset by an absolute-voltage (ie, -V1) such as

When the time that any defective rice 1-a falls the distance L is the "predetermined average fall time T2" (that is, the "predetermined average fall speed"), The voltage V2 of the output signal from the DA (digital-analog) converter 85 is output at a voltage of, for example, 4.5V, so that the offset circuit 86 provides a predetermined reference for the " average delay speed T1. &Quot; Is offset to an absolute -voltage (i.e., -Vl) (i.e., -4.5V) such as a voltage V1 "(e.g., 4.5V), so that the -terminal (inverting terminal) of the differential amplifier 90 is offset. The voltage V3 applied to the counter voltage becomes 0V (ie, 4.5V-4.5V = 0V).

Similarly, if the time for any bad taste 1-a to drop the distance L is longer than the "predetermined average fall time T2" (ie, the "predetermined average fall speed") Case], the voltage V2 of the output signal from the DA (digital-analog) converter 85 is output at a voltage of, for example, 4.7V, so that the " average delay speed T1 " Is offset to an absolute voltage (i.e., -Vl) (i.e., -4.5V) such as a predetermined reference voltage (V1) "(e.g., 4.5V), so that the-terminal of the differential amplifier 90 The voltage V3 applied to the inverting terminal is 0.2V (that is, 4.7V-4.5V = 0.2V).

Similarly, if the time for any bad taste 1-a to drop the distance L is shorter than the "predetermined average fall time T2" (i.e., faster than the "predetermined average fall speed"). Case], the voltage V2 of the output signal from the DA (digital-analog) converter 85 is output at a voltage of, for example, 4.3 V, so that the offset circuit 86 provides the " average delay speed T1 " Is offset to an absolute voltage (i.e., -Vl) (i.e., -4.5V) such as a predetermined reference voltage (V1) "(e.g., 4.5V), so that the-terminal of the differential amplifier 90 The voltage V3 applied to the inverting terminal becomes -0.2V (that is, 4.3V-4.5V = -0.2V).

On the other hand, from the setter 90-a, the " predetermined reference voltage V1 for the average delay time T1 " is the + terminal of the differential amplifier 90 (non-inverting terminal). Of the output signal from the DA (digital-analog) converter 85 upon application of the " counted signal " according to the random defect 1-a which is applied to and falls the distance L. A voltage V3 whose voltage V2 is offset by the -voltage (i.e., -V1) is applied to the-terminal (inverting terminal) of the differential amplifier 90 so that the differential An amplifier 90 has a difference voltage V4 between the " predetermined reference voltage V1 for the average delay time T1 " and the offset voltage V3. Will print

The difference voltage V4 output from the differential amplifier 90 is applied to the VF (voltage-frequency) converter 37 so as to selectively remove the random badness 1-a, Accurate automatic control of the delay time for the correct operation of the solenoid valve drive circuit 41, the solenoid valve 42, and the air injection nozzle 43 is possible. In other words,

When the time that any defective rice 1-a falls the distance L is the "predetermined average fall time T2" (that is, the "predetermined average fall speed"), The voltage V3 applied to the negative terminal (inverting terminal) of the differential amplifier 90 is 0V (i.e., 4.5V-4.5V = 0V), and the predetermined reference voltage for the "average delay speed T1." (V1) "[e.g., 4.5V] is applied to the + terminal (non-inverting terminal) so that the output voltage V4 from the differential amplifier 90 is the difference voltage {result of the 4.5V-0V}. Is output to the VF (voltage-frequency) converter 36 that is equal to the " predetermined reference voltage V1 for the average delay speed T1 " Since the voltage does not change, the "predetermined average delay time T1" for driving the defective taste removing means 40 does not change.

When the time that any bad taste 1-a falls the distance L is longer than the "predetermined average fall time T2" (that is, it is slower than the "predetermined average fall speed"). ] Is the voltage (V3) applied to the negative terminal (inverting terminal) of the differential amplifier 90 is 0.2V (that is, 4.7V-4.5V = 0.2V), the "average delay speed (T1) A predetermined reference voltage V1 " (e.g., 4.5V) is applied to the positive terminal (non-inverting terminal) of the differential amplifier 90, so that the output voltage V4 from the differential amplifier 90 As a voltage, 4.3V which is a result of {the 4.7V-the 0.2V} is output, and a voltage lower than the "predetermined reference voltage V1 for the average delay speed T1" (for example, the 4.5V) is output. Since the voltage applied to the VF (voltage-frequency) converter 36 is lowered, the frequency of the output signal from the VF (voltage-frequency) converter 36 is lessened and accordingly The period of frequency is long, and as a result, the delay time for driving the defective taste removing means 40 is longer than the " predetermined average delay time T1 " The exact fall time of -a) can be adjusted.

When the time that any bad taste 1-a falls the distance L is shorter than the "predetermined average fall time T2" (ie, faster than the "predetermined average fall speed"). The voltage V3 applied to the negative terminal (inverting terminal) of the differential amplifier 90 is -0.2V (that is, the 4.3V-the 4.5V = -0.2V), and the " average delay speed T1 " A predetermined reference voltage V1 " (e.g., 4.5V) is applied to the + terminal (non-inverting terminal) of the differential amplifier 90, so that the output voltage V4 from the differential amplifier 90 is the difference voltage. As a result, 4.7V, which is a result of {the 4.5V-(the -0.2V)}, is output, so that a voltage higher than the " predetermined reference voltage V1 for the average delay speed T1 " As the output voltage is applied to the VF (voltage-frequency) converter 36, the frequency of the output signal from the VF (voltage-frequency) converter 36 increases, and thus the frequency The period of time is shortened, and as a result, the delay time for driving the defective taste removing means 40 is shorter than the " predetermined average delay time T1 " It is possible to fit the exact fall time of 1-a).

In a preferred embodiment, the conventional shift register 37 has 128 stages, so that if any bad taste 1-a has the " predetermined average falling speed " The delay time for screening out the defective taste 1-a of, for example, is 12.8 ms, and in the preferred embodiment, if any defective taste 1-a is slower than the " predetermined average falling rate " The delay time for screening out any defective rice 1-a is, for example, a delay time of more than 12.8 ms to within 12.8 x 1.1 ms, and any defective rice 1-a is " predetermined average drop. In the case of faster than "speed", the delay time for screening out any defective rice 1-a is, for example, a delay time of more than 12.8 x 0.9 ms to within 12.8 ms.

As described above, according to the present invention, accurate operation of the solenoid valve driving circuit 41, the solenoid valve 42, and the air injection nozzle 43 to selectively remove the random defective taste 1-a. Accurate automatic control of the delay time is possible.

Therefore, according to the present invention, only the difference between the actual falling speed and the falling time of the arbitrary defective rice 1-a and the predetermined average falling speed of the defective rice 1 and the predetermined average falling time By the method of measuring and controlling the pressure, the solenoid valve driving circuit can be automatically controlled by an easy and simple configuration, and automatically controlling the delay time accurately adjusted to the falling speed or falling time of the arbitrary defective rice 1-a. 41, the solenoid valve 42 and the air injection nozzle 43 can be accurately and automatically controlled.

According to the present invention of the above-described configuration and action, the falling speed or falling time of any defective rice in the drop passage can be easily and accurately measured, and the defective rice can be sorted out to be removed. Automatic control of the valve drive circuit and precise delay time for the operation of the solenoid valves and air injection nozzles is possible.

Furthermore, according to the present invention, it is easy to measure and control only the difference between the actual falling speed and the falling time of any defective rice and the predetermined average falling speed and the predetermined average falling time of the defective rice. And the simple configuration has the advantage of making the manufacturing cost low.

In addition to being able to selectively remove defective grains from fine grains, the present invention can be used to selectively remove defective grains of other grains.

Claims (1)

In order to be able to selectively detect and remove defective rice 1, Fine-grained supply means for supplying the raw-material rice (3) in which the defective rice (1) and the good rice (2) are mixed to the defective rice detecting optical means (20). 10, Fluorescent lamp 21 as a light source and an optical sensor (that is, a photodiode) so that the defective rice 1 mixed in the raw rice 3 can be detected selectively. 22, a defective light detecting optical means 20 provided with a lens 22-a, a background plate 23 corresponding to the optical sensor 22, An amplification circuit (100) is driven to drive an electromagnetic valve (42) in accordance with an output signal from the optical sensor (22) to remove the defective taste (1) that has been selectively detected by the optical sensor (22). 31, comparison circuits 32-1 and 32-2, setters 32-1-a and 32-2-a, OR circuits 34, and one-shot multivibrator ( one shot multivibrator (mono-stable multivibrator) 35, VF (voltage-frequency) converter (36) and a shift register (37) A signal processing means 30 provided with a delay circuit 38, The VF (voltage-frequency) converter 36 includes air from an optical axis of the optical sensor 22 in a raw material fall flow path (hereinafter referred to as a "fall flow path") 15. (air) The solenoid valve drive circuit 41 and the solenoid valve as much as "the predetermined | prescribed average fall time T1" which it takes for the bad rice 1 to fall the distance to the injection nozzle 43. valve " predetermined average delay time T1 " of the operation of the air blowing nozzle 43 and the predetermined reference voltage V1 (hereinafter referred to as " average delay time T1 " A predetermined reference voltage V1 "is applied, The solenoid valve drive circuit 41 and the solenoid valve so that the bad rice 1 which passes the fall flow path 15 by the solenoid valve drive signal from the said signal processing means 30 may be removed. In the fine particle color sorting apparatus which consists of 42 and the bad taste removal means 40 provided with the air injection nozzle 43; The upper optical sensor which enables the selective detection and detection that any defective taste 1-a passes through a predetermined upper end point P in the drop passage 15. 51-1) and the predetermined lower end point in which the said arbitrary defective rice 1-a is located below the predetermined upper end point P by the predetermined distance L in the said fall flow path 15. FIG. Lower light sensor 51-2, light source 52, background plate 53, 53 ', and lens 54 to allow selective detection of passage through (Q). ) Is provided; A first amplifying circuit for amplifying an output signal from the upper optical sensor 51-1 so that the upper optical sensor 51-1 detects and detects any defective taste 1-a. 61-1) and the brightness of the reflected light of the random defectiveness 1-a with respect to the upper optical sensor 51-1 is darker than the brightness of the reflected light of the background plate 53 by less than a predetermined brightness. Digital display for the selective elimination of any defective taste 1-a according to the presence of the difference between the voltage of the output signal from the first amplifier circuit 61-1 and the predetermined comparison reference voltage Vg. The first comparison circuit 62-1, which enables the output of the signal high level, and the predetermined comparison reference voltage Vg of the first comparison circuit 62-1 are set to set the first comparison circuit ( A first setter 62-1-a for applying to 62-1); A second amplifying circuit for amplifying an output signal from the lower light sensor 51-2 so that the lower light sensor 51-2 detects and detects any defective taste 1-a. 61-2) and when the brightness of the reflected light of the defective rice 1-a with respect to the lower optical sensor 51-2 is darker than the brightness of the reflected light of the background plate 53 'by a predetermined brightness, For the selective elimination of the arbitrary bad taste 1-a according to the presence of the difference between the voltage of the output signal from the second amplifying circuit 61-2 and the predetermined comparison reference voltage Vg, The second comparison circuit 62-2, capable of outputting a digital signal high level, and the predetermined comparison reference voltage Vg of the second comparison circuit 62-2 are set to perform the second comparison. A second setter 62-2-a applied to the circuit 62-2; Timing circuit 70 is provided, the timing circuit 70, Application of the output signal of the digital signal high level from the first comparison circuit 62-1 when the random defective taste 1-a is selectively detected at the predetermined upper point P. Accordingly, the timing circuit 70 outputs a "clock pulse count start signal" (clock pulse pulse timing signal) so that the timing circuit 70 can be applied to the counter 82, In addition, when the random defect 1-a is detected at the predetermined lower end point Q, the output signal of the digital signal high level from the second comparison circuit 62-2 may be used. In response to the application, the timing circuit 70 outputs a "clock pulse count stop signal" (clock pulse value) so that it can be applied to a counter 82, Further, from the time of application of the "clock pulse coefficient start signal" according to the random defect 1-a to the time of application of the "clock pulse coefficient stop signal" according to the random defect 1-a. The counter 82 counts the clock pulses applied to the counter 82 so as to be applied to the DA (digital-analog) converter 85 as a "unit signal according to the same defective taste". A "hold signal of a counted signal" (hereinafter referred to as a "hold signal"), which is maintained as a state of a " signaled signal " Immediately following the output of the "clock pulse count stop signal" according to the defective taste (1-a), the timing circuit 70 outputs and the "hold signal" is applied to the counter 82, so that the counter ( 82 outputs the " counted signal " according to the random taste 1-a, so that DA (digital-analog) To the transducer 85, In addition, when the " hold signal " is output from the timing circuit 70 and applied to the counter 82, immediately afterwards, the counter 82 is newly renewed, and any new defects in the drop passage 15 are new. The timing circuit 70 generates a reset signal for initializing the counter 82 so that the counter of the clock pulse can be started upon application of the "clock pulse count start signal" according to (1-b). Is output as a timing circuit (70) for enabling the application of the reset signal to the counter (82); A clock pulse generator (81) for applying a clock pulse to the timing circuit (70) and the counter (82); The counting of the clock pulses is started in accordance with the application of the "clock pulse count start signal" output from the timing circuit 70, and the application of the "clock pulse count stop signal" output from the timing circuit 70. Stops the counting of the clock pulse and outputs the " counted signal " according to the random defect 1-a in response to the application of the " hold signal " output from the timing circuit 70. Applied to the DA (digital-to-analog) converter 85, and the counter 82 is applied with the " reset signal " output from the timing circuit 70, and any new defects in the drop passage 15 A counter 82 is provided which is reset in initialization to enable the start of the counting of the clock pulses again in accordance with the "clock pulse counting start signal" according to US 1-b. ; DA (digital-to-analog) converter 85 is applied by the DA (digital-analog) converter 85 according to the random defect 1-a, which is output from the counter 82, to be converted into an analog signal and outputted. In accordance with the " counted signal " when the time when the arbitrary defective taste 1-a falls the distance L is " predetermined average falling time T2 " ) The voltage V2 of the output signal from the converter 85 to be a voltage V1 equal to the " predetermined reference voltage V1 for the average delay time T1 " When the time (1-a) falls the distance L is longer than the "predetermined average fall time T2", the DA (digital-analog) converter (according to the "counted signal") 85, the voltage V2 of the output signal becomes a predetermined voltage higher than the " predetermined reference voltage V1 for average delay time T1 ". In addition, when the time that the arbitrary defective taste (1-a) falls the distance (L) is shorter than the "predetermined average fall time (T2)" according to the "counted signal" DA, which causes the voltage V2 of the output signal from the DA (digital-analog) converter 85 to be a predetermined voltage lower than the " predetermined reference voltage V1 for the average delay time T1 " A digital-to-analog converter 85 is provided; The voltage V2 of the output signal from the DA (digital-to-analog) converter 85 is equal to an absolute voltage (i.e., "the predetermined reference voltage V1 for the average delay speed T1"). V1), there is provided an offset circuit 86 for causing an offset; The " predetermined reference voltage V1 for the average delay time T1 " is applied to the + terminal (non-inverting terminal), and the arbitrary defective taste (falling in the distance L) The voltage V2 of the output signal from the DA (digital-analog) converter 85 upon application of the "counted signal" according to 1-a is offset to the -voltage (i.e., -V1). Voltage V3 is applied to the negative terminal (inverting terminal) so that the " predetermined reference voltage V1 for average delay time T1 " and the offset voltage V3 are applied. A differential amplifier 90 is provided for outputting a differential voltage V4 of the predetermined voltage, and the predetermined reference voltage V1 for the average delay time T1 is set. A setter 90-a adapted to be applied to the differential amplifier 90; A particulate color discrimination apparatus, characterized in that it is circuit-connected so that the difference voltage V4 output from the differential amplifier 90 is applied to the VF (voltage-frequency) converter 36. .