KR20030096714A - Controller structure for optical burst switching network - Google Patents

Abstract

PURPOSE: A controller structure of an optical burst switching network is provided to introduce offset time for data transmitted through a channel on a WDM optical link, thereby minimizing setup time without buffering a data burst and magnifying bandwidth efficiency. CONSTITUTION: A header packet transceiver(602) extracts header information from burst CCG(Control Channel Group) data, and capsulates the rest burst CCG data in Ethernet frame. A packet frame generator(603) generates new header information, and makes CCG data to be transmitted. A multiple forwarder(604) obtains output port number information and output label information from which the made CCG data are outputted, and transmits the obtained information to an electric switch matrix. A multiple scheduler(606) extracts burst length information from the burst CCG data, determines switching time and start time of a header packet, and buffers the burst CCG data to transmit the data. A multiple burst header packet transmitter(608) reads the CCG data, and transmits the CCG data. A switching controller(607) transmits a control signal. An E/O(Electric to Optical) converter(609) converts the CCG data into an optical signal.

Description

Controller structure for optical burst switching network

The present invention is for implementing an optical burst controller belonging to an optical burst core router. The optical burst controller performs the function of transmitting and receiving control packets at the speed of 155 Mbps to 1 Gbps through the label switching path from the inlet edge router to the core router or the outlet edge router in the optical burst switching network, and in the optical burst switching network based optical packet router. It performs a function for recognizing and processing the header packet of the optical layer.

Accordingly, the present invention is directed to an optical packet routing technique and conventionally an electrical based routing method has been used. Data processing capacity is typically on the order of tens of terabps for optical packet routers and several terabits per second (Tbps) for electrical routers.

An optical packet router is called an optical packet core router when the core of a network is located at a connection point of a wavelength division multiplexing (WDM) backbone network and is called an optical packet edge router when it is located at a connection point of a subscriber network. Optical packet routing technologies are classified into wavelength division / spatial division based optical switching matrix techniques, optical packet label switching techniques, optical packet decomposition / assembly techniques, and the like.

The optical packet label switching method includes an optical packet switching method for switching fixed length data in packet units and an optical burst switching method for switching in variable burst data burst units. The optical packet switching method requires an optical buffer, so the performance of the optical packet router is excellent but not easy to implement. The optical burst switching method is easy to implement a large optical packet router of tens of Tbps because no optical buffer is required. Do. Accordingly, the present invention provides a controller structure of an optical core router using an optical burst switching scheme, that is, a controller structure of an optical burst switching network.

The control structure of the optical burst switching network consists of an electrical inlet edge router, a switching control unit of each hop, a core router, and an electrical outlet edge router. The switching control unit controls the optical switching matrix to switch the burst packet through the optical burst switching network at each hop.

An electrical inlet edge router assembles multiple data packets into burst packets, and an electrical outlet edge router receives burst packets from an optical burst switching network and decomposes the received burst packets into multiple data packets.

Networks, particularly Internet data traffic, have been increasing rapidly over the past few years, and this trend will continue with the increase in the number of users and the introduction of new services that require greater bandwidth. This massive Internet traffic requires a network based on large routers capable of routing variable length data packets. Therefore, some methods have been proposed to solve this problem.

One method is to use the current optical network as it is. However, current optical networks use very little bandwidth on a single fiber. Therefore, Dense Wavelength Division Multiplexing (DWDM) technology is used to help overcome this bandwidth problem in current optical networks. One strand of fiber has the capacity to carry 10 Gbps of data per second. This is a very difficult technology that differs significantly from current electrical-based switching technology that enables data switching up to several Gbps per second.

Asynchronous Transfer Mode (ATM) switches and IP routers can be used to switch data using discrete channels, typically within 2.5 Gbps or 10 Gbps dense wavelength division multiplexed (DWDM) fiber. However, this method requires dozens or hundreds of switch interfaces, which are used to terminate single dense wavelength division multiplexed (DWDM) fiber with large channels. As a result, there is a significant loss of statistical multiplexing efficiency.

Another approach is to apply optical technology instead of the electrical system of the switching system, but the management application in optical switching is severely limited because the technology related to optical components is very limited.

The best way is to call the optical burst switching network and try to make optimal use of the optical and electrical switching technology. Electrical devices dynamically control system resources by assigning individual user data bursts to dense wavelength division multiplexing (DWDM) optical fiber channels, while optical technology is used to switch the entire user data channel in the optical domain. This optical burst switch network is designed to directly handle end-to-end user data channels that have shown limitations of current optical components. Electrically based buffers do not provide end-to-end transparent optical paths for data bursts.

In order to solve the above problems, an object of the present invention is to provide an optical burst switching control apparatus used in an optical burst switching network that does not consider optical fiber delay lines as optical packet synchronization and an input buffer to switch optical packets.

The optical burst core router used in the optical burst switching network is a backbone optical router that connects the conventional electric-based tera-class inlet edge routers and tera-class outlet edge routers. The optical packet switching-based wavelength division multiplexing (WDM) network structure Has In addition, photoelectric conversion (O / E, Optical to Electric) converting an optical signal into an electrical signal on a wavelength division multiplexing (WDM) link, and electro-optical conversion (E / O, Electric to Optical) converting an electrical signal into an optical signal, etc. It is an object of the present invention to provide a controller of an optical burst switching network that performs a function for delivering IP data while maintaining optical transparency up to a capacity of tens of Tbps to an exit edge router using only a label exchange function without a separate traffic processing function.

1 illustrates one embodiment of an optical burst switching network.

2 is a diagram illustrating a flow of burst packets through an optical burst switching network.

3 illustrates transmission of burst headers and burst payloads on a time axis over a DWDM link.

4 is a burst payload format of layers 1 and 2 in accordance with the present invention.

5 is a structural diagram of a typical optical core router.

6 is a block diagram of a switch control unit of the present invention.

7 is a diagram showing a format of a switch control signal used in an optical switch matrix.

8 is a diagram illustrating a format of data sent from a scheduler to an optical switch controller.

9 is a forwarder block diagram of the present invention.

10 is a method diagram of receiving and scheduling a header packet from an electrical switch matrix.

11 is a scheduler block diagram of the present invention.

12 is a diagram for explaining a LAUC-VF (Latest Available Unused Channel with Void Filling) algorithm.

13 is a diagram for explaining a control channel scheduling algorithm of the present invention.

Figure 14 is a switch controller block diagram of the present invention.

15 is a real-time description for constructing a real time and burst payload required to switch the burst payload of the present invention.

16 is an embodiment of a cyclic operation of a burst header packet transmission module of the present invention.

17 is a functional structural diagram of a core router of the optical burst switching method of the present invention.

In order to achieve the above object, the present invention, a photoelectric conversion unit for converting the control channel group data input in the form of an optical signal into an electrical signal form; A header packet transceiver configured to extract header information from the burst control channel group data converted into an electrical signal by the photoelectric converter, and to encapsulate the remaining burst control channel group data into an Ethernet frame after extracting the header information; A packet frame generator for storing the Ethernet frame transmitted from the header packet transceiver and generating control channel group data to be transmitted by generating new header information corresponding to the Ethernet frame; Receives the header information from the header packet transceiver and obtains the output port number information and the output label information to which the control channel group data generated by the packet frame generation unit is output, by referring to label information included in the header packet transceiver. Transmitting multiple forwarders; Extract burst length information from the burst control channel group data switched and transmitted by the output port number information to determine a switching time and a departure time of a header packet, and buffer the burst control channel group data according to the determined time information. Transmitting multiple schedulers; A multi-burst header packet transmitter which reads the control channel group data transmitted from the multi scheduler and transmits the control channel group data according to time information to be transmitted therefrom; A switching controller for transmitting a control signal to the multiple forwarder and the multiple scheduler; And an all-optical converting unit converting the control channel group data in the form of an electrical signal received from the multi-burst header packet transmission unit into an optical signal form.

In order to achieve the above object, the present invention comprises the steps of: receiving and storing control channel group data from an electric switch matrix; Analyzing the stored control channel group data to determine an output wavelength and an output channel of the control channel group data and calculating a departure time of the control channel group data; Generating a control packet by receiving control channel group data stored in the step and configuration information such as output wavelength information, output channel information, and departure time information in the step; A method for receiving and scheduling a header packet from an electric switch matrix, comprising: generating a new header in control channel group data according to the result calculated in the above step and transmitting the new header to a multi-burst header packet transmitter.

In order to achieve the above object, in the present invention, channel number information indicating that received burst data, which is a basic data block for transmitting through an optical burst switching network, is header information corresponding to which channel burst among multiple wavelength division multiplexed channels. ; Label information storing information on a destination address to which the burst data should arrive; Offset time information storing a difference between an arrival time of control channel group data, which is a burst header, and an arrival time of data channel group data, which is burst payload data, among the burst data; Burst length information indicating how long a corresponding optical path should be maintained in an optical switch matrix that causes the burst data to be switched and delivered to a destination; Data type information storing information for receiving data channel group data from the destination address and restoring the original small packet; And a burst header packet data structure including service type information storing a grade of a quality of service.

Accordingly, the present invention provides a packet switching system and method for reducing or eliminating the disadvantages and problems of data packet switching actually passing through a network. And an optical burst switching controller architecture for switching data packets in the optical domain. The controller architecture for the optical burst switching network includes an electrical inlet edge router, each hop switch control unit and an electrical outlet edge router. An electrical inlet edge router assembles a plurality of data packets coming in bursts. Each hop switch control unit connects to the optical switching matrix to switch the burst packet through the optical burst switching network.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a diagram illustrating an embodiment of an optical burst switching network.

The optical burst switching network includes a plurality of electrical inlet edge routers 101, a plurality of optical core routers 102, a plurality of electrical outlet edge routers 103, and a plurality of dense wavelength division multiplexing (DWDM) optical links 110. do.

A plurality of dense wavelength division multiplexing (DWDM) optical links 110 connects the electrical inlet edge router 101, the optical core router 102, and the electrical outlet edge router 103 together. The electrical inlet edge router 101 and the electrical outlet edge router 103 perform burst assembly and disassembly functions respectively and provide an interface between the optical burst switching network and the existing electrical router.

The basic data block for passing through the optical burst switching network is called burst. A burst is a collection of data packets with the same destination data packet, or other attributes, such as destinations data packets and quality of service (QoS) requirements. A burst consists of a burst header packet and a burst payload.

The format of the burst header packet consists of an IP header (ie, IPv4, IPv6) or a multiprotocol label switching shim (MPLS shim) header. The multi-protocol label switching shim (MPLS shim) header is transmitted by the switch controller unit of the core optical router 110 for routing the burst to the multi-protocol label switching (MPLS) system and to the electrical exit edge router 115 to receive the burst. It is used when using the next optical burst switching specification information to be used.

Optical burst switching specification information includes synchronization hints including hints for receiving exit edge router synchronization, offset time from the arrival of the first bit of the burst header packet to the arrival of the first bit of the burst payload, and the duration of the burst payload. A burst period defining time, a burst bit rate giving a bit rate at the rate at which the burst payload is transmitted, a data channel identifier defining the ID (ID) of the data channel to which the burst payload is sent, received by the burst payload A quality of service (QoS) that defines the quality of service to be established, a burst serial number identifying a burst with the same electrical inlet and outlet edge router addresses, and a cycle redundancy check.

2 is a diagram illustrating a flow in which burst packets are transmitted through an optical burst switching network.

In an optical burst switching network consisting of an electrical inlet edge router 201, an optical core router 203, and an electrical outlet edge router 202 connected by a dense wavelength division multiplexing (DWDM) link 210, a dense wavelength division multiplexing ( DWDM) link 210 includes multiple channels 220 and represents the total transmission capacity between any two routers. Each multi-channel 220 is a unidirectional transmission capacity between two arbitrary routers and may be configured as one wavelength or part of wavelengths in case of time division multiplexing (TDM).

That is, the multi-channel 220 group is a set of channels having a common type and adjacent nodes. The dense wavelength division multiplexing (DWDM) link 210 is composed of one data channel group (DCG) 211 and one control channel group (CCG) 212 in each direction.

An important feature of the optical burst switching network is that the burst payload 240 and the burst header packet 230 are switched and transmitted separately, respectively. Data packets are first received at an electrical inlet edge router from an existing electrical router and assembled into bursts. As soon as the data packet is assembled into a burst, the burst header packet 230 is stripped from the burst and then the burst header packet 230 is transmitted along the control channel group 212 and electrically processed at each optical core router as shown in FIG. do.

But this is not an electrical process. Burst payload 240 is a pure optical signal transmitted along a pure optical burst switching network. Burst header packet 230 is then used to receive burst payload 240 at electrical exit edge router 202. As a result, burst payload 240 is broken down back into data packets to go to the next hop at electrical exit edge router 202.

This facilitates the electrical processing of the header and provides a transparent optical path between the inlet and the outlet of the optical burst switching network for burst transmission. Each burst header packet 230 includes routing information for use in an optical core router to route the combined burst payload 240.

3 is a diagram illustrating transmission of a burst header and a burst payload on a DWDM link on a time axis.

First burst payload 310 on data channel 1 301, second burst payload 311 on data channel 2 302, and burst header packet 1 312 and burst header packet 2 (in control channel 303). 313). The initial burst offset time is set by the electrical inlet edge router and may vary from burst to burst or may be the same for all bursts.

Burst header packets 312 and 313 will be sent earlier than burst payloads 310 and 311. On each hop that the burst proceeds, the optical core router attempts to resynchronize the burst payloads 310 and 311 in combination with each burst header packet 312 and 313 to keep it as close as possible to the initial offset time. . The purpose of the use of the offset time is to resolve the collision of burst header packets on the control channel groups (CCG) of the optical core router.

4 is a burst payload format of layers 1 and 2 according to the present invention.

Each data packet 401 is included in the actual payload 417 and distributed using the frame header (H) 402. One example of a frame header (H) 402 is the length of a data packet 401 in bytes. Burst payload includes channel number 411, label 412, offset time 413, burst length 414, data type 415, service type 416.

In this case, the channel number 411 is necessary to indicate which channel information corresponds to a burst of a channel among the wavelength division multiplexed channels. The label 412 is an element that functions as a label in a multi-protocol label switching (MPLS) network, and the burst length 414 is information for indicating how long the optical path should be maintained in the optical switch matrix.

The offset time 413 is the difference between the arrival time of the control packet and the arrival time of the data packet and is the most important feature of optical burst switching. The data type 415 is information necessary for receiving a data packet from the destination node and restoring it to the original small packet. The service type 416 is information on what class the packet is in when dividing the number of classes for the quality of service. For the input channel into which burst data will come, the burst length represents the length of the burst in bytes starting from the first byte. The offset represents the first byte of padding and is required when the minimum length of the burst payload is imposed.

In Figure 4 the layer 1 synchronization pattern is used to synchronize the optical receiver in the electrical exit edge router. At the beginning (preamble), the guard and the end of the burst (preamble) are the burst duration due to the uncertainty of the burst arrival and the clock drift between the node and the delay change of the different wavelengths, the mismatch between the burst arrival times, and the insertion and optical switch matrix configuration time and non- It is necessary to overcome deterministic light matrix construction time and the like. And other layer information such as performance monitoring and forward error correction (FEC).

Like the data packet header of an existing packet switching network, the burst header packet contains the necessary routing information for the optical core router to use to route the combined burst payload in hops to the destination electrical exit edge router. Unlike conventional data packet header information, the burst header packet includes optical burst switching specification information (OLI) such as burst offset time, burst duration, and data channel carrying the burst payload.

5 is a structural diagram of a general optical core router.

The fiber core router includes N multiple input fibers 501, multiple input channels 502 within each input fiber, L multiple data channel groups (DCG ₁ to DCG _L ) 503, and L multiple control channel groups (CCG _1). CCG _L ) 504, input fiber delay line 505, optical switching matrix 506, switch control unit 507, routing processor 508, M multiple output fiber 509, multiple output channel 510 ).

One data channel group DCG and one control channel group CCG are provided in each direction. The data channel group DCG and the control channel group CCG may be on homogeneous or heterogeneous optical fibers. The number of incoming data channel groups DCG is L and the number of outgoing data channel groups CCG is L.

The burst payload is sent to an input fiber delay line (FDL) 505 on a data channel group (DCG). The input optical fiber delay line 505 can be fixed or variable. The burst header packet is sent to the switch control unit 507 of the control channel group (CCG). The purpose of the input fiber delay line 505 is to delay the burst payload for a period of time before entering the optical switching matrix 506.

On the other hand, the burst header packet is electrically processed by the switch control unit 507. The optical switching matrix 506 can switch the burst payload from the incoming data channel to the outgoing data channel. The optical buffer 520 in the optical burst switching matrix is to solve the burst payload collision and may be implemented using the optical fiber delay line 505. However, in the present invention, the optical fiber delay line 505 is not used.

The function of the switch control unit 507 is similar to the existing electric router. The switch control unit 507 obtains information from the burst header packet and electrically processes it. Perform channel mapping to determine logically. The routing processor 508 function is to drive routing and other control protocols for the entire optical burst switching network. The routing processor 508 also creates, maintains, and manages the forwarding table and forwards the information to the switch controller unit.

The switch control unit 507 then selects the output data channel group DCG and selects the output control channel group CCG for forwarding the burst payload. The matching burst header packet is due to information from the forwarding table. If there is an output data channel group (DCG) and control channel group (CCG) available from these groups, the switch control unit 507 whether the burst payload arrives at the optical switching matrix 506 or after some delay of the optical buffer. ) Will select the optical buffer and configure the optical switching matrix to allow the burst payload to pass through. Otherwise the burst payload is dropped.

In preparation for transmission of the burst payload and the corresponding burst header packet within the optical switching matrix 506 and the switch control unit 507, the switch control unit 507 performs a burst payload and a corresponding burst header packet. As described above with respect to FIG. 3, it is intended to resynchronize while maintaining the offset time as close to the initial offset time as possible.

If a burst payload enters the optical switching matrix 506 before the burst header packet corresponding to the burst payload is processed, the burst payload is simply dropped. This is because the burst payload is an optical analog signal. That is, if the burst payload has entered the optical switching matrix 506? If there is no path to set up, it is discarded. After the burst header packet and its burst payload are switched in the switch control unit 507 and the switching matrix 506 respectively, the delay introduced by the input fiber delay line 505 causes the burst payload to arrive prematurely under normal traffic conditions. It should be properly designed to be less likely to be disposed of.

6 is a block diagram of a switch control unit of the present invention.

The switch control unit is a multiple photoelectric converter 601, a header packet transceiver 602, a packet frame generator 603, a multiple forwarder 604, an electric switch matrix (for example a crossbar switch, another example is a shared memory switch) ) 605, a multiple scheduler 606, a switch controller 607, a multi-burst header packet transmitter 608, and a multi-optical converter 609.

When the burst header packet enters the switch control unit, it first enters the photoelectric conversion section 601 and passes through the photoelectric conversion section 601. The switch control unit converts a control packet input at a rate of 155 Mbps to 1 Gbps into an electrical signal at the multiple photoelectric conversion unit 601, and transmits and receives a variable or fixed length packet and a packet received at irregular time intervals. .

The header packet transmitter / receiver 602 extracts the header packet by decapsulating and decapsulating the IP packet received through the internal high-speed Ethernet interface, and encapsulates the Ethernet packet again. Export.

The packet frame generator 603 receives an IP packet input through the header packet transceiver 602 and stores an Ethernet frame for use in transmitting a header packet. The forwarder 604 receives the header packet from the header packet transmission / reception unit 602, and looks up the label information base using the label information among them to obtain the output port number and the output label information. Generates and updates the label information base by the command of the main control unit 620 to control the multi-protocol label switching (MPLS) network.

The main controller 620 manages the presence or absence of an abnormal output port of the optical switch matrix, manages the time of the IP packet arriving at the header packet transceiver 602, and looks up and label information through the forwarder 604. Update tables, exchange information with multi-protocol label switching (MPLS) network control units, or process interrupt information processing, statistics, and status data required from various functional blocks. It also has the right to set and release loop back for maintenance on forwarder 604 and multiple scheduler 606.

The multiple scheduler 606 is composed of a header packet departure time calculator, an output wavelength duration calculator, an output channel determiner, an optical switch control packet generator, and a header packet transceiver controller. The scheduler 606 calculates the burst arrival time using the time stamp and the offset time, determines the switching time by extracting the burst length information received from the header packet to determine the cut-through progress time, and resolves the packet collision phenomenon. In order to buffer the traffic through the interconnected network or to select the recycle or output wavelength, the departure time of the header packet is determined so that the header packet is processed at the core router.

The optical switch control unit 630 receives input / output port information, input / output channel information, and timing information about switch start and end required for switching the data burst from the switch control unit, and receives the control signals generated by the switching table and the switching algorithm. The switching path is set to cut-through method by outputting to each wavelength switch block constituting. In addition, it provides a signal relating to the operation monitoring control of the optical switch matrix and the maintenance of the main control unit 620.

The optical switch controller 630 interfaces with the optical switch matrix to set the switching path by the port information, the channel information, the time information about the start and end of the switch, the switching table and the switching algorithm, and the cut-off signal by the control signal generated thereby. The wavelength switch block is controlled in a through manner.

The electrical switch matrix 605 switches the information necessary for forwarding of the data burst and the information necessary for generation of a new header packet from the switch control unit corresponding to the input port of optical burst switching to the switch control unit corresponding to the output port. .

To design packet-based switches using distributed control, multiple input / output channels (eg 16x16 electrical switches) provide speeds above Gbps. A multiprotocol label switching (MPLS) control unit works in conjunction with a multiprotocol label switching (MPLS) network to simplify the protocol layer between header packets and wavelength division multiplexing (WDM) network backbones effectively and reduce the overhead required for routing. It operates on a switching (MPLS) basis.

After establishing a label path, the multiprotocol label switching (MPLS) control unit distributes the labels necessary for label switching to the multiprotocol label switching (MPLS) node, and communicates with the switch control unit with the master controller and the Ethernet interface.

The optical switch matrix is composed of three wavelength switches based on wavelength division multiplexing (WDM) technology, and optical amplification and interconnect blocks for optically amplifying, interconnecting, and outputting the output of the wavelength switch stage by port. Each wavelength switch block is composed of a wavelength demultiplex unit, a wavelength conversion control unit, a variable wavelength conversion unit, and a wavelength multiplexing unit. The number of units constituting the wavelength switch block varies depending on the optical switch stage. The switching method has a wavelength multi-spatial switching function that is spatially switched according to the wavelength using a variable wavelength converter and an interconnect function. Control signals have circuit switching, packet switching and burst switching functions.

The block diagram of the switch control unit can have a centralized structure or a distributed structure depending on the light switching matrix. In a distributed architecture, each scheduler has its own switch control. The distributed structure can be applied to broadcast and selection type optical switches. However, the same design concept can be applied to distributed structures.

The forwarder 604 looks up the lookup information from the forwarding table and determines the output control channel group to which the burst header packet should exit. The combined burst payload will be forwarded to the corresponding output data channel group. The routing tag is attached to the burst header packet and used by the switch to route the burst header packet to the scheduler in combination with the destination output control channel group. And, if the quality of service (QoS) related information is not completely performed by the burst header packet, the quality of service (QoS) related information will be attached to the burst header packet.

7 is a diagram illustrating a format of a switch control signal used in an optical switch matrix.

As shown in FIG. 7, the switch control signal includes input port and wavelength selection information, first stage wavelength switch information, two stage wavelength switch information, three stage wavelength switch information, and output port and wavelength selection information.

8 is a diagram illustrating the format of data sent from the scheduler to the optical switch controller.

As shown in FIG. 8, the scheduler adds output channel information to the input port, output port, and input channel information received from the electric switch matrix, and optically switches the data frame including data calculated on the switch on / off time. Send to the control.

9 is a forwarder block diagram of the present invention.

The forwarder receives the header packet information as shown in FIG. 2 from the header packet transceiver 900, reads data and time stamp information from the header packet generator 910, and then uses the label information included in the header packet information to label the packet. After looking up the information base (LIB) 920 to obtain the output port number and the new label information necessary for switching, framing information necessary for forwarding the burst and generating a new header packet is sent to the electric switch matrix 930.

The lookup process reads label information from header packet information, and reads label information base (LIB) 920 information in memory based on the label information. Initializing and updating the label information base (LIB) is performed by reading the label information base (LIB) information from the main control unit 940 when the power is first turned on to generate and update the label information base LIB. Command to update the label information base (LIB) information.

The forwarder puts the processed burst header packets into the forwarder queue and is provided in order. One example is first-in-first-out (FIFO). One function of the forward queue is to resolve possible conflicts within the switch. To reduce switch latency, it is recommended to use a switch with output queuing capability. To support multicast traffic, the switch requires multicast capability, or the forwarder must have the ability to copy multicast burst header packets. The next burst header packet is switched by the switch and enters the scheduler.

10 is a diagram illustrating a method of receiving and scheduling a header packet from an electric switch matrix.

First, control channel group data is received from an electric switch matrix and stored.

The stored control channel group data is analyzed to determine an output wavelength and an output channel of the control channel group data, and to calculate a departure time of the control channel group data.

A control packet is generated by receiving the control channel group data received from the electrical switch matrix and storing the control channel group data and configuration information such as the output wavelength information, output channel information, and departure time information.

Finally, according to the calculated result, a new header is generated in the control channel group data and transmitted to the multi-burst header packet transmitter.

11 is a scheduler block diagram of the present invention.

The scheduler selects output wavelength selection function, channel reservation time calculation function, new header packet generation and transmission function, and burst header through interconnected network to solve the packet collision that can occur when one or more packets are going to the same channel at the same time. Has a time stamping function on the packet.

The burst header packet passes through the photoelectric converter and the all-optical converter, and the header packet transceiver receives the header packet transceiver and then performs layer 1 and 2 decapsulation, and then the burst header packet is stored in the frame generator. The forwarder obtains time information from the main control unit and records time information arriving at the burst header packet. The burst header packet then arrives at the scheduler through the optical switch matrix, which schedules the burst header packet to be sent to the header packet transceiver and the optical switch controller.

The scheduler receives the input port, output port, and input channel information from the electric switch matrix, adds output channel information, calculates the switch on / off time, and provides it to the optical switch controller. It provides the updated header packet and the departure time of the header packet.

The scheduler then receives timing information from the main control, reads burst payload duration information from the burst payload, and determines when the burst payload will arrive in the optical switching matrix and how long the burst payload will last. .

In addition, the scheduler first looks for an output data channel to carry the burst payload. Once the output data channel is found, the fiber delay line (if required) to be used is determined and the scheduler knows whether the first bit of the burst payload will leave the optical switching matrix. The scheduler then schedules time to send burst header packets on the output control channel group and attempts to resynchronize the burst and burst payloads and burst header packets (ie, maintain the original offset time as possible). After successfully scheduling the delivery of burst payloads on the outgoing data channel and control channel group, the scheduler sends configuration information to the switch controller.

The scheduler is connected to the switch controller in both directions. After processing the shape information sent by the scheduler, the switch controller sends back a response signal to the scheduler. The scheduler then updates the burst header packet (i.e. offset time and data channel identifier) and passes it through the burst header packet sender according to the time-to-send burst header packet information. The burst header packet then enters the burst header packet transceiver. The burst header packet transceiver reads the time-to-send burst header packet information attached to the burst header packet and knows when to send it. Finally, the burst header packet converts the burst header packet back to the optical signal before entering the all-optical converter and transmitting the burst header packet to the appropriate output control channel group.

The data channel scheduling unit drives a scheduling algorithm for the data channel group. The scheduling algorithm is an important part of the switch control unit design and is scheduled by a scheduling algorithm called Latest Available Unused Channel (LAUC). The basic idea behind the LAUC-VF algorithm is to make the unused channel void as small as possible by selecting the most recently unused or unscheduled data channel available for the arriving burst payload.

That is, when the arrival time of the burst payload destined for the optical switch matrix is t and the period is L, the scheduler first looks for an available output data channel for the time period of (t, t + L). If there is at least one such data channel, the scheduler selects the most recent available data channel, that is, the channel with the smallest unused channel void between t and the end of the last burst payload just before t.

12 is a diagram for explaining a LAUC-VF (Latest Available Unused Channel with Void Filling) algorithm.

In FIG. 12, it is assumed that there is a data channel group 1205 having five data channels. When a new burst comes in at any time t, channels D1, D2, and D5 have an unused channel space to which they can allocate a new burst, and D3, D4 are not used to enter the D3 band during the burst payload. Unless the channel void is too small and D4 is currently in service at the time t when the burst arrives, it cannot be used.

The shortest time in which bursts can be sent continuously is t-t2 < t-t1 < t-t5 so that data channel D2 is selected to carry the new payload 1210. If all data channels are appropriate at time t, the scheduler finds the appropriate output data channel at t + D. If no suitable channel is found, the arrived burst payload and corresponding burst header packet are discarded.

The new LAUC-VF algorithm uses high priority bursts when there are any two channels D1 and D2, but when a new burst arrives with a lower priority, the channel space is not used in preference to the higher priority burst. To occupy).

13 is a diagram for explaining a control channel scheduling algorithm of the present invention.

When the control channel scheduling module receives information about the time to leave the burst payload, the control channel scheduling module starts scheduling burst header packets on the control channel group. Ideally, burst header packets are timed Should be sent to. To facilitate this, the control channel is embedded in time but continuous time must be available. One slot 1310 may indicate a time interval for transmitting one burst header packet or a portion of the burst header packet. For the purposes of this example, assume that one slot is the time interval for transmitting exactly one burst header packet.

In FIG. 13, t _c is a start time of a current timeslot, 0 means no burst header packet to be sent, and 1 means one burst header packet to be sent within a given time slot. The earliest time slot to send a burst header packet is determined as follows.

(Equation 1)

Where L _h is the timeslot length (ie, burst header packet period) and P _s is a pointer to the current control channel transmission time slot.

A simultaneous comparison method is used to quickly determine the earliest transmission time of burst header packets. After reporting burst header packet information to be sent to the burst header packet processor and receiving the response, the control channel scheduling module updates the table to store the activity information by tagging the timeslot used for the control channel.

If no free timeslot is found within the zero time period, a response should be sent to the burst header packet processor. At this time, two options may be used for the burst header packet processor. The first option is that the burst header packet and its burst payload are dropped, and the second option is that the burst header packet processor directs the burst header packet to a new (but, data channel scheduling module to start another burst payload). To find time. This new departure time should be later than previously found.

It may extend to a control channel group that is not time slotted. In the latter case, the control channel scheduling module needs to keep track of busy or idle / idle periods of the combined control channel group. Up from Tt _o t a reasonable period of time, the control channel scheduling module looks for (ideally in tt _o If possible, use a control channel), the fastest possible time to send burst header packet. If the control channel group has more than one channel, the above concept still applies to both time slot and non-time slot control channel groups. That is, if the control channel is available, ideally find the earliest possible time to send a burst header packet in tt _o .

14 is a switch controller block diagram of the present invention.

The switch controller configures the optical switch matrix in the form of time slots. The basic function of the switch controller is to receive configuration information from the scheduler, calculate the time slots to construct the optical switch matrix, and update the configuration information of the table or memory combined into the time slots.

Information on how to construct the optical switch matrix first enters the time controller of the switch controller from the scheduler. The information from the burst header packet processor tells which fiber and channel the burst payload will enter, which fiber and channel will leave the burst payload, when the burst payload will switch, and how long will the burst payload last? It will contain the same information. Time slot calculation The processor constructs an optical switch matrix using the following formula to calculate the appropriate time slot.

(Equation 2)

Where t _s is the time to switch, t _c is the start time of the current configuration time slot, Is a time slot unit and P _c is a pointer to a current configuration time slot.

The time slot calculation processor converts the configuration information into a format that the switch controller stores in a table or memory combined with the calculated time slot. The timeslot calculation processor then sends a response back to the scheduler. The configuration scheduling window is given as follows.

(Equation 3)

15 is a diagram for real-time description for configuring a real-time and burst payload required to switch the burst payload of the present invention.

Each table / memory combined into a time slot in FIG. 15 includes information directly or indirectly about the gate of the optical switching matrix to be switched in that time slot. The configuration of the optical switching matrix defined in the table memory is completed in one time slot.

The optical switching matrix configuration time calculated above for the burst payload is not equal to the time-to-switch for switching the burst payload from the scheduler. A small portion at the start of the burst payload should be cut as shown in FIG. 15. However, the actual data will not be cut because it is not larger than the guard B shown in FIG. The new burst offset time will be calculated with time-to-leave information rather than the actual matrix construction time. So on the next hop, the guard of the burst payload is still guard B.

16 is a diagram of one embodiment of a cyclic operation of a burst header packet transmission module of the present invention.

The burst header packet transmission module is composed of a transmission control device 1610 and a burst header packet transmission device 1620. Transmission control device 1610 is composed of multiple time slots 1611 and time slot pointers 1612. Each time slot includes a flag bit 1613 and a pointer 1614. The function of the transmission control device is to manage the transmission of burst header packets according to time-to-send information calculated by the scheduler. The flag bit indicates whether there is a burst header packet in a given time slot to send to the burst header packet transmitter.

Flag bit 1 means that there is a burst header packet to send. There can be one or more burst header packets per time slot if each burst header packet in the time slot goes to a different control channel. The pointer indicates the address of the burst header packet when the combined flag bit is one. The burst header packet transmitter performs layer 1 and 2 encapsulation functions and transmits a burst header packet.

17 is a functional structural diagram of an optical burst switching type core router of the present invention.

The optical burst core router has an optical packet switching-based wavelength division multiplexing (WDM) network structure and a demultiplexer 1710, multiple optical fiber link buffer, an input optical fiber delay line that provides wavelength division multiplexing (WDM) input optical access capability in the data plane. (FDL) 1720, multi-protocol label switching (MPLS) control 1730, optical burst switching control 1740 for controlling wavelength switch matrix, optical switching matrix 1750, which is a tens-terater wavelength switch, multi-fiber data buffer An optical fiber delay line (FDL) buffer 1760, an output link matcher 1770, and a multiplexer 1780 that provides wavelength division multiplexing (WDM) output optical link connectivity and multiple protocol label switching (MPLS) in the control plane. And multiprotocol label switching (MPLS).

The main function of the burst core router is to exchange labels between the electric-based tera-class inlet edge optical routers and the electric-based tera-class exit edge optical routers without the need for additional traffic processing such as photoelectric conversion and all-optical conversion on the WDM link. It alone switches IP data while maintaining optical transparency down to tens of Tbps. The optical burst core router is connected to a switching network (SONET / SDH, ATM / IP, Ethernet, etc.) using a standardized access standard (ITU-T).

The demultiplexer 1710 separates the wavelength channel for the control packet from the data in which the header and the bursts are wavelength multiplexed, and the switching matrix 1750 performs functions such as optical circuit switching, optical packet switching, and optical burst switch by control signals. It functions as a universal wavelength switch with a wide range of uses.

The multiplexer 1780 multiplexes the wavelength multiplexed data packet channels and the control packet channel using a wavelength different from that of a burst and transmits the same through a single optical fiber. The multiprotocol label switching (MPLS) control unit 1730 is configured with a multiprotocol label switching (MPLS) control function, routing information management, label distribution protocol control, and label management functions to set a label path. The optical packet disassembly / assembly unit has a function of disassembling or assembling an input optical packet and is a function required for an edge router.

The header packet processing of the optical burst switch controller is performed by detecting a destination address, attaching a lookup label, and delivering a packet. The header packet transceiver unit transmits and receives a variable or fixed length packet, a packet received at irregular time intervals, and the like. The header packet transmitter / receiver removes the IP packet label included in the Ethernet frame through the high-speed Ethernet interface, extracts the header packet, and sends the header packet to the frame generator. At this time, the overhead portion excluding the header packet is stored in the frame generation unit.

When the power is turned on for the first time, the labeler reads the label information base (LIB) information from the main controller to generate the label information base (LIB), and when necessary, updates the label information base (LIB) information by the command of the main controller. . After reading the data and timestamp information from the header packet generator, update the new label and attach the I / O port information to the switch matrix.

The electric switch matrix switches the information required for burst forwarding and generation of new header packets to the respective output ports in accordance with the control signal of the electric switch matrix. The electric switch matrix receives the input port number of the burst and the output port number information of the burst obtained as a result of looking up each header, and outputs an electric switch matrix control signal based on the input information. Here, the burst arrival time is calculated in the next stage scheduler based on the time stamping information and the offset time length information.

After that, the header packet transmitter / receiver receives new header information from the scheduler, accesses the overhead stored when the packet is input, and encapsulates the Ethernet frame again and transmits it. The optical switch controller interfaces with the optical switch matrix to set the switching path by the port information, the channel information, the time information about the start and end of the switch, the switching table and the switching algorithm, and the cut-through method by the control signal generated thereby. Control the wavelength switch block. The synchronization signal of each wavelength switch block constituting the optical switch matrix and the optical amplification board of the interconnection board must match the synchronization of the header packet.

The main controller accesses the forwarder to get time stamping (SFD of Ethernet frame overhead) information and provides it to the forwarder so that it knows the burst data arrival time, including the offset time. The main control unit instructs the forwarder to initialize the table such as various routing information and forwarding information when the power is turned on. The main controller checks the status of the optical switch matrix output port for abnormalities, performs internal status and fault information management, and performs mediation of access to the buffer memory. The main controller receives information such as IP (IP) address, label information, routing information, forwarding information, etc. from the multi-protocol label switching (MPLS) controller to allow the forwarder to build a forwarding information table, a label information table, and update label information. do.

Meanwhile, the above-described embodiments of the present invention can be written as a program that can be executed in a computer, and can be implemented in a general-purpose digital computer that operates the program using a computer-readable recording medium.

In addition, the structure of the data used in the above-described embodiment of the present invention can be recorded on the computer-readable recording medium through various means.

The computer-readable recording medium may be a magnetic storage medium (for example, a ROM, a floppy disk, a hard disk, etc.), an optical reading medium (for example, a CD-ROM, DVD, etc.) and a carrier wave (for example, the Internet). Storage medium).

So far I looked at the center of the preferred embodiment for the present invention. Those skilled in the art will appreciate that the present invention can be implemented in a modified form without departing from the essential features of the present invention. Therefore, the disclosed embodiments should be considered in descriptive sense only and not for purposes of limitation. The scope of the present invention is shown in the claims rather than the foregoing description, and all differences within the scope will be construed as being included in the present invention.

As described above, the present invention introduces an offset time for data transmitted over a channel over a wavelength division multiplexing (WDM) optical link, eliminating the need for buffering of the data bursts that are most problematic in optical systems, while minimizing setup time. And the circuit switching bandwidth effect is maximized. In addition, by separating the data channel and the control channel, the control signal processing by the out-of-band signaling method is possible to set up a high-speed dynamic line has the effect of supporting the next-generation optical Internet network.

In addition, by providing a pure optical network between the inlet edge router and the outlet edge router, it provides an important technical advantage by providing an end-to-end optical path for data bursts. The present invention not only simplifies the design of the controller structure of a pure optical network by using a conventional IP (IP) router rather than an asynchronous transfer mode (ATM) switch, but also provides a technical effect of providing an optical network having an increased bandwidth per optical fiber. There is.

Electrical processing by providing an optical path using a burst switching mechanism between the electrical inlet edge router, which assembles incoming data packets into the burst and sends them to the core network according to the optical burst switching protocol, and the electrical outlet edge router, which in turn decomposes the data packets. Has the technical effect of avoiding potential bottlenecks.

Claims (8)

A photoelectric conversion unit converting the control channel group data input in an optical signal form into an electrical signal form; A header packet transceiver configured to extract header information from the burst control channel group data converted into an electrical signal by the photoelectric converter, and to encapsulate the remaining burst control channel group data into an Ethernet frame after extracting the header information; A packet frame generator for storing the Ethernet frame transmitted from the header packet transceiver and generating control channel group data to be transmitted by generating new header information corresponding to the Ethernet frame; Receives the header information from the header packet transceiver and obtains the output port number information and the output label information to which the control channel group data generated by the packet frame generation unit is output, by referring to label information included in the header packet transceiver. Transmitting multiple forwarders; Extract burst length information from the burst control channel group data switched and transmitted by the output port number information to determine a switching time and a departure time of a header packet, and buffer the burst control channel group data according to the determined time information. Transmitting multiple schedulers; A multi-burst header packet transmitter which reads the control channel group data transmitted from the multi scheduler and transmits the control channel group data according to time information to be transmitted therefrom; A switching controller for transmitting a control signal to the multiple forwarder and the multiple scheduler; And And an all-optical converter for converting control channel group data in the form of an electrical signal received from the multi-burst header packet transmitter into an optical signal. The method of claim 1, wherein the switching control unit A main controller for accessing the multi-forwarder to generate time stamping information, and to receive a multi-protocol label switching control signal and to update label information; And And an optical switching controller connected to an optical switch matrix for switching input burst payload data to set a switching path of the burst payload data to be switched by the optical switch matrix, and to transmit a control signal to the multiple scheduler. Switch control device in an optical burst network. The method of claim 2, wherein the optical switch control unit And a control signal including input port and wavelength selection information, a plurality of wavelength switch information, output port and wavelength selection information to the optical switch matrix. The method of claim 1, wherein the multiple forwarder A header packet receiving and storing unit configured to receive header information from the header packet transceiver unit; A header packet analyzer analyzing the header information received from the header packet receiving and storing unit; A label information base storing label information indicating a path to a destination address to which the control channel group data is to be transmitted; A main control unit command processing unit which receives the command from the main control unit and processes the command and stores the label information in the label information base; And And a header packet transmitter for attaching new label information to the control channel group data according to the information analyzed by the header packet analyzer and output port information for switching from the label information base. Switch controls. The method of claim 1, wherein the multiple scheduler is A header packet receiving and storing unit for receiving and storing the control channel group data switched from the electrical switch matrix; A burst header packet processor configured to analyze the stored control channel group data to determine an output wavelength of the control channel group data, calculate a channel reservation time, and calculate a departure time of the control channel group data; A burst header packet generation and transmission unit configured to receive departure time information of control channel group data from the burst header packet processor, generate new header information, and transmit control channel group data; And And a control packet generation and transmission unit configured to receive configuration information from the header packet reception and storage unit and the burst header packet processing unit to generate a control packet and transmit the control packet to the optical switch control unit. The method of claim 1, wherein the multiple scheduler is Optical burst, characterized in that for receiving the control signal including the input port number, input channel number, output port number, output channel number, switch on time and switch off time information from the electrical switch matrix to the optical switch controller Switch controls in the network. (a) receiving and storing control channel group data from an electrical switch matrix; (b) analyzing the stored control channel group data to determine an output wavelength and an output channel of the control channel group data and calculating a departure time of the control channel group data; (c) generating a control packet by receiving the control channel group data stored in step (a) and configuration information such as output wavelength information, output channel information, and departure time information in step (b); (d) generating a new header in the control channel group data according to the result calculated in the step (b) and transmitting the header packet to the multi-burst header packet transmission unit. Channel number information indicating whether received burst data, which is a basic data block for transmitting through an optical burst switching network, is header information corresponding to which channel burst among multiple wavelength division multiplexed channels; Label information storing information on a destination address to which the burst data should arrive; Offset time information storing a difference between an arrival time of control channel group data, which is a burst header, and an arrival time of data channel group data, which is burst payload data, among the burst data; Burst length information indicating how long an optical path should be maintained in an optical switch matrix such that the burst data is switched and delivered to a destination; Data type information storing information for receiving data channel group data from the destination address and restoring the original small packet; And A burst header packet data data structure comprising service type information that stores a rating for a quality of service.