KR20030093338A - Digital subscriber line analog front end with adaptive hybrid - Google Patents

Abstract

The analog front end for delivering discrete multitone modulated signals to subscriber lines includes a hybrid network 620 for canceling near-end echo. The hybrid network includes a hybrid input, a receive input, and a hybrid output. The receive input is capacitively coupled to subscriber line 290 carrying upstream and downstream data signals. The hybrid input is capacitively coupled to receive an upstream data signal from a driver 610 that provides an upstream data signal to a subscriber line. The hybrid output provides a downstream data signal extracted from the subscriber line. The analog front end includes a power spectral density filter 340 and a high pass filter 320 that enable the use of a first order hybrid network to extract downstream data. The analog front end may include additional analog channels to enable voiceband (eg, v.90) communication involving non-voiceband (eg, xDSL) operation.

Description

Digital Subscriber Line Analog Front End with Adaptive Hybrid {DIGITAL SUBSCRIBER LINE ANALOG FRONT END WITH ADAPTIVE HYBRID}

Various communication protocol standards have been developed to enable the use of previously existing plain old telephone system (POTS) facilities for delivering digital data. In fact, even if the public switched telephone network (PSTN) is digital, the connection between the central office and the subscriber, which serves as an entry point to the PSTN, is analog. As a result, a modem is used for two-way communication of digital data on an analog channel between the subscriber and the central station. The modem converts the information communicated between the digital and analog domains according to a particular communication protocol.

Some communication protocols are designed to ensure that the voiceband region of an analog channel can carry information. As a result, if the subscriber line is being used by a modem in that voice band, the line becomes unavailable for simultaneous voice communication.

Digital subscriber line (xDSL) services can provide higher data rates by using communication bands that exclude voice bands outside the voice band. As a result, the xDSL service can coexist concurrently with voiceband communication.

Modems and other devices designed to carry digital data on analog channels use an analog front end to transmit as well as receive information from subscriber lines. Before providing the conditioned signal to the subscriber line for transmission or to the digital signal processor for translation, the analog front end condition signal is passed from or to the subscriber line.

For example, hybrid circuits are used to deal with echoes that occur because two identical wires are used for both transmit and receive for analog channels. One of the drawbacks of typical hybrid designs is that high order introduces distortion and noise into the system.

Preferably, the modem has the ability to maintain a high data rate of xDSL when available. Because of the geographical limitations on xDSL, a modem in the voice domain is still needed to ensure reliable means of communication. One risk-free solution is the use of chipsets on common circuit boards to implement the voiceband and xDSL modem functions.

Coupling circuits to a common substrate introduces new problems. In particular, voiceband and xDSL modems rely on clocks of different frequencies that are not multiples of each other. Interaction between the two clocks can lead to, for example, intermodulation, synchronization problems, or other problems that interfere with the digital signal processor's ability to properly translate the received information.

TECHNICAL FIELD The present invention relates to the field of telecommunications, and in particular, to the combination of digital and analog communication functions.

1 shows a communication spectrum allocated for a subscriber line;

2 illustrates an analog front end for communicating with a subscriber line;

3 illustrates an analog front end transmission block;

4 shows an analog front end receiving block;

5 illustrates various hybrid network implementations,

6 shows an embodiment of a tunable hybrid,

7 illustrates a voice band transmission path with sample rate conversion;

8 is a diagram illustrating a voice band reception path having a sample rate conversion;

9 illustrates a table of upsampling and downsampling factors for realizing various clock rates from universal conversion rates;

10 illustrates an embodiment of a finite impulse response filter;

11 illustrates an embodiment of a polyphase pointer and serial interface pulse generator,

FIG. 12 illustrates an embodiment of a polyphase pointer for the receive path of FIG. 8.

The methods and apparatus employed in the analog front end for communicating with subscriber lines enable a high degree of integration.

The upstream data to be sent to the subscriber line is preprocessed to remove the even image. The power spectral density shaping filter then substantially removes unwanted energy from the upstream data signal. The tunable hybrid network is connected to the subscriber line and the transmission block to extract downstream data from the subscriber line. The high pass filter further removes upstream data from the downstream data signal. Power spectral density shaping filters and high pass filters allow the use of low order hybrid networks tuned to achieve adequate near-end echo cancellation. The analog front end may include additional analog channels to enable voiceband (eg, v.90) communication involving non-voiceband (eg, xDSL) operation. Sample rate conversion is used to avoid using many independent clocks for incompatible clock requirements.

One embodiment of an analog front end device includes a transmission block coupled to transmit discrete multitone modulated upstream data to a subscriber line. The hybrid network is connected to the subscriber line and the transmission block. The receive block is coupled to the hybrid to receive discrete multitone modulated downstream data from the subscriber line. The transmit block, hybrid network, and receive block are mounted in the same integrated circuit package.

The hybrid network includes a hybrid input, a receive input and a hybrid output. The receive input is capacitively connected to the subscriber line carrying upstream and downstream data signals. The hybrid input is capacitively coupled to receive the upstream data signal from the transmit block driver. The driver also provides an upstream data signal to the subscriber line. The hybrid output provides a downstream data signal extracted from the subscriber line. Hybrid networks can be fabricated in integrated circuit dies. In one embodiment, the hybrid network is a complementary metal oxide semiconductor integrated circuit.

Other features and advantages of the present invention will become apparent from the accompanying drawings and the following detailed description.

The International Telecommunication Union (ITU) has issued a series of recommendations for the transmission of data on subscriber lines. These recommendations are for communications using the frequency spectrum other than the voiceband portion (eg, the "xDSL" recommendation) as well as communications using the voiceband portion of the communication spectrum ("V.x" recommendation). Recommendations for "V.x" have evolved to support high data rates. For example, the ITU-T Recommendations V.22bis, V.32, V.32bis, V.34, and V.90 are related to increasing the data rate of bits per second of 2400, 9600, 14400, 33600, 56000 bit / sec. do. Compression standards such as V.42bis can further increase the effective data rate. In general, voiceband modems use the recommended handshaking protocol to achieve the best possible data rate.

A more recent ITU document relating to voiceband communication is "Rec. V.90 (09/98)-General telephones at data rates up to 56,000 bit / s downstream and up to 33,600 bit / s upstream. Digital Modem and Analog Modem Pairs for Use with a Switched Network (PSTN) "," Rec. V.34 (02/98)-General switched network and dedicated point-to-point 2-wire telephone-type circuit modems operating at data rates of up to 33,600 bit / s for use with -wire telephone-type circuits "," Rec. V.32 (02/91)-General switched telephone networks and dedicated point-to-point two-wire telephones For duplex modems operating at data rates of up to 14,400 bit / s for use with type circuits, and for "Rec. V.32 (03/93)-for general switched telephone and dedicated telephone type circuits. Two wires, duo operating at data rates up to 9600 bit / s for use Flex modem family ".

Asymmetric Digital Subscriber Line (ADSL) communication represents one variation of xDSL communication. Exemplary ADSL specifications include "Rec. G.992.2 (06/99)-splitterless asymmetric digital subscriber line (ADSL) transceivers" (also known as full rate ADSL) and "Rec. G.992-1 (06/99)-Asymmetric Digital Subscriber Line (ADSL) Transceiver "(also known as G.LITE).

1 shows communication spectrum allocation for a subscriber line. Chart 100 compares the analog channel portion used by voiceband modem 110 (POTS) as well as xDSL modem 130 (ADSL). POTS communication typically uses voice bands in the 300-4000 Hz range. ADSL is in the range of about 25-1100 kHz. A guard band 120 separates the POTS and ADSL ranges.

There are various line coding variations for xDSL. Both carrierless amplitude phase (CAP) and discrete multi-tone modulation use the basic technique of quadrature amplitude modulation (QAM). CAP is a single carrier protocol in which carriers are suppressed and recovered at the receiving end before transmission. DMT is a multicarrier protocol. 1 shows DMT line coding.

DMT modulation has been established as a standard line code for ADSL communication. The available ADSL bandwidth is divided into 256 subchannels. Each subchannel 134 is associated with a carrier. The carrier (also known as tone) is 4.3125 KHz away. Each subchannel is modulated using quadrature amplitude modulation (QAM) and can transmit 0-15 bits / Hz. The actual number of bits is allocated according to the line condition. Thus, individual subchannels may transmit different bits / Hz numbers. Some subchannels 136 may not be used at all. ADSL uses some subchannel 134 for downstream communication and another subchannel 132 for upstream communication. Upstream and downstream subchannels may be separated by another guard band 140.

During initialization, the DMT measures the signal-to-noise ratio of each subchannel to assign a data rate. Since the signal is attenuated more at higher frequencies, a larger data rate (ie, larger bits / Hz) is usually assigned to the lower subchannel. The DMT implementation may employ rate adaptation to monitor line conditions and dynamically change the data rate for the subchannels.

2 shows an analog front end for carrying information in an analog channel transmitted by a subscriber line between a subscriber and a central station. In one embodiment, the analog front end includes circuitry to handle voiceband as well as non-voiceband (ie, xDSL) communications. The analog front end condition signal is communicated between subscriber line 290 and digital signal processors 270 and 280.

In one embodiment, an analog front end 218 (including hybrid 260) is provided on a single substrate in an integrated circuit package. Within the integrated circuit, non-voice communications (eg, xDSL) are handled by the transmit block 230, the receive block 240, the 2-4 wire block 250, and the hybrid 260. Hybrid and 2-4 wire conversion functions may be combined into a common hybrid network block as shown. In one embodiment, the analog front end is implemented as a complementary metal oxide semiconductor (CMOS) in an integrated package. The integrated circuit may further include additional circuitry to support voiceband communication within the same integrated circuit package. For example, sample rate converter 210 and codec 212 may be employed on the same substrate as the xDSL circuit.

High-level integration of the analog front end is certainly enabled by four features. First, to facilitate filtering, digital signal processor 270 removes an even image of the upstream signal using a fast fourier transform (FFT). Second, a power spectral density shaping filter is used to further reduce unwanted images. These first two features ensure agreement with the transmit power spectral density requirements specified by the ITU. Third, the combination of double rate FFT and power shaping enables the use of lower order hybrids instead of higher order distortion causing hybrids. The hybrid is tunable to match changing line conditions and downstream distortion. The high pass filter following the hybrid provides additional rejection of the transmitted signal in the receive path.

Digital signal processor 270 (DSP) provides digital form information to transmission block 230 for communication in the analog channel of the subscriber line. 3 illustrates transmission block 230 in more detail.

The transmission path is essentially digital from the digital signal processor to the digital-to-analog converter (360). Data from the DSP is provided to a programmable gain amplifier 310 of the transmission block. Programmable gain amplifier 310 provides amplification in the 0-3 dB range. If desired, attenuation can be used to adjust the power level.

xDSL line coding requires orthogonality between carriers. Orthogonality can be achieved using a DSP FFT algorithm. In one embodiment, the xDSL circuit supports the ADSL protocol with 138 KHz (32 tones) upstream data rate. Even if the Nyquist sampling frequency for the 138 KHz upstream signal is 276 KHz, the spectral content for removing the even image of the upstream data and for frequencies between 142 KHz and 276 KHz. To make " 0 ", DSP 270 performs fast Fourier transform at twice the required sampling rate (i.e., 552 KHz or 128 points instead of 64 points normally used to process 32 tones). Thus, in one embodiment, the DSP 270 is providing upstream data values to the transmission block at 552 KHz.

High pass filter 320 is provided to reduce spectral leakage at low frequencies caused by the DSP FFT algorithm. In one embodiment, high pass filter 320 is a third-order Butterworth filter with a corner frequency of about 12 KHz, with rejection greater than 28 dB for frequencies of about 4 KHz or less.

An interpolator 330 interpolates the filtered signal from 552 KHz to 1.104 MHz for spectral power shaping. In one embodiment, interpolator 330 is a quaternary interpolator. The transfer function for interpolator 330 is as follows:

The ratio of interpolator frequencies determines N (N = f _sout / f _sin ). therefore,

N = 1.104 MHz / 552 KHz = 2.

The inserted signal is processed by a power spectral density mask (PSD mask) or shaper 340 to ensure agreement with the protocol specification. In one embodiment, the PSD shaper 340 employs a sixth order Chebyshev filter designed to attenuate the signal to about 40 dBm / Hz. In one embodiment, the PSD shaper 340 has a corner frequency of about 140 KHz.

Interpolator 350 interpolates the power modified signal from 1.104 MHz to 35.328 MHz to remove the upstream image. In one embodiment, interpolator 350 is a sixth order interpolator. The transfer function of the interpolator 350 is as follows:

In this case, N = 35.328 MHz / 1.104 MHz = 32.

Digital-to-analog converter 360 (DAC) generates an analog signal from the embedded signal. The analog signal is provided to the low pass filter 370. Due to the lack of even images, high DAC sampling rate, and high removal of digital filters of the entire transmission path, low pass filter 370 can perform as a primary filter to remove unwanted upstream images. In one embodiment, low pass filter 370 has a corner frequency of about 250 KHz. Driver 380 sends an upstream signal to subscriber line 290.

Referring to FIG. 2, receive block 240 is interfaced with subscriber line 290 via hybrid 260. In one embodiment, hybrid 260 is a tunable, first order filter. The hybrid network is described in more detail with reference to FIGS. 5-6.

4 illustrates the receiving block 240 in more detail. Four wire signals carrying the transmitted signal as well as any received communication to perform echo cancellation, and to convert the four wires into two wires that excel at receiving the received communication. Pass through hybrid 410. A first programmable gain amplifier 412 (PGA) allows gain adjustment from -8 to 24 dB. Attenuation may sometimes be necessary due to line conditions. The signal is then provided to a high pass filter and PGA 414 to further reduce upstream communication in the receive path. The high pass filter also allows gain adjustment of about 6-12 dB.

In one embodiment, high pass filter 414 is a third order filter with a corner frequency of about 140 KHz to provide about 20 dB of rejection to the upstream signal. Using a high pass filter and PGA 414 to cancel the near-end signal is more desirable than using a DAC. Traditional DAC cancellation techniques do not account for driver noise or distortion.

The filtered signal is provided to a low pass filter and PGA 416. The low pass filter and PGA 416 allow gain adjustment of about 0-6 dB. In one embodiment, low pass filter 416 is a secondary filter having a corner frequency of about 2 MHz. The main purpose of the low pass filter and PGA 416 is to provide anti-aliasing for the analog-to-digital converter 420 (ADC). The signal passes through another programmable gain amplifier 418 to provide additional level adjustment before being processed by the ADC 420.

In one embodiment, the ADC is a third order sigma-delta converter. Decimator 430 is used to reduce truncation noise generated by ADC 420 at high frequencies because of the sigma-delta effect. The digital signal is decimated from 35.328 MHz to 8.836 MHz.

The output of decimator 430 is provided to a programmable low pass filter 440. The low pass filter provides outband cancellation to prevent the outband signal from folding back to the baseband signal. In one embodiment, low pass filter 440 is a sixth order filter. After low pass filter 440, the signal is passed to decimator 450 which decimates the signal from 8.836 MHz to 2.208 MHz (baseband frequency). The decimated signal is processed by high pass filter 460 before 16-bit 2.208 MHz data is provided to the DSP. High pass filter 460 is used to remove the remaining audio (ie, voiceband) components from the processed signal. In one embodiment, high pass filter 460 is a secondary filter.

5 compares the hybrid network 550 with other hybrids 500 from a system level perspective. The hybrid is partially designed to cancel the signal X being transmitted to the subscriber line so that large transmission signals are not introduced back into the receive path. The signal X transmitted by the driver 510 is distorted by the transformer and line impedance in a manner modeled by H1 (s) 520. Receive path is the desired input signal Y and X It becomes the overlap of H1 (s). H2 (s) 522 is designed to introduce the same distortion as H1 (s) 520. When combined by differential summer 530, the result is Y + X H1 (s) -X H2 (s). If H1 (s) = H2 (s), the received result is the desired result, that is, Y.

One disadvantage of this method is that the desired received signal, Y, is usually much smaller than X. Differential adder 530 obtains the difference between the two larger values to identify smaller values. This can introduce noise into the system. Another disadvantage is that H2 (s) is a pole / zero filter that does not block DC. Furthermore. The poles and zeros are difficult to adjust independently in practical implementations. Another hybrid network is shown at 550 for comparison.

In this case, H1 (s) 570 has a receive path of Y + H1 (s) Modify X to be X. A graphical representation of a typical H1 (s) is shown in chart 590. Typical H1 (s) has a zero at F1 and a pole at F2. High pass filter 582 with corner frequency of F2 is HPF2 (s) (Y + H1 (s) Is inserted into the receive path to generate X). Another high pass filter 572 having a corner frequency of F1 is HPF1 (s). Is applied to the transmitted signal X to generate X. Thus, the differential adder 580 is HPF2 (s) Y + HPF2 (s) H1 (s) X-HPF1 (s) Will generate X.

The corner frequency of the high pass filter 572 produces an pole that offsets the zero of H1 (s) at the same location. The product of the two filters appears as another high pass filter with a corner frequency of F1. High pass filter 570 is HPF2 (s) It is selected so that H1 (s) = HPF1 (s). Thus, the hybrid can eliminate the transmitted signal X.

One advantage of this method is that the filters 572 and 582 are the same type of filter. Moreover, the filters 572 and 582 are first order filters. For example, filters 572 and 582 may be implemented using capacitors and resistors. Another benefit is that the high pass filter provides some rejection of the voiceband signal and DC isolation.

6 illustrates one embodiment of a hybrid 260 in more detail. Hybrid network 620 includes a hybrid input port, a hybrid output port, and a receive path input port. Driver 612 is connected to the subscriber line through a resistor R _D to provide an upstream data signal. The driver is capacitively connected to the hybrid input to provide upstream data to the hybrid network. The receive path is capacitively coupled to the subscriber line to receive a mixed signal comprising upstream and downstream data signals. Capacitors C ₄₁ , C ₄₂ , C ₄₄ , and C ₄₅ provide DC isolation for the transmit and receive paths of the hybrid.

The first model approximates the subscriber line impedance Z (s) with the resistor R _x and the capacitor C _x connected in series. The transfer function from the driver 610 output to the receiver input has a base zero and a base pole as follows.

The transfer function between the hybrid receive and the hybrid output is:

Because the mixed transfer function between the hybrid receive input and the hybrid output is a highpass function such as:

Where K _rx is the receive path gain (ie hybrid circuit gain) and HYB0 is the pole of the highpass transfer function (ie hybrid zero). HYB0 is used to minimize the effect of basic zero (1 + sC _x R _x ) by line impedance. HYB0 is below 140 KHz so that the received signal is not severely affected by the hybrid zero. The receive path gain, K _rx, is adjusted by the values of the capacitors CR and CF as follows:

K _rx = CR / CF

Hybrid paths are used to minimize the effects of the remaining dominant poles (1 + sC _x (R _x + 2R _D )). The transfer function from the driver output through the hybrid path to the hybrid output is:

HYBP is a hybrid pole. K _HYB may be adjusted to be as follows for the other receive path gain K _rx .

The hybrid path gain, K _HYB , is adjusted by the value of the capacitors CG, CF as follows:

K _HYB = CG / CF

Hybrid poles and zeros are determined from the components of FIG. 6 as follows:

therefore,

Substituting, K _HYB can be calculated as follows:

Thus, hybrid 260 is a low order hybrid that is tunable. HYB0 is adjusted to cancel or improve the zero defined by (1 + sC _x R _x ). When properly tuned, hybrid 260 is effectively a primary hybrid. HYBP and K _HYB are adjusted to cancel the effects of gain K _rx and pole 1 + sC _x (R _x + 2R _D ). The optimal K _HYB can be properly programmed. Circuit 620 is an amplifier to which capacitors with little noise from passive components are coupled. The feedback resistor (RF) for reference 622 serves as a DC stabilizing resistor. If the value for RF is large, the resistance contributes to a small noise. The primary hybrid can be implemented as the rest of the analog front end on the same substrate. The high pass filter 414 following the hybrid further reduces the remaining driver signal before the received signal is digitized by the ADC 420.

A crystal oscillator is used to generate all the necessary clock signals for the digital domain of the analog front end. Although there is some room for the choice of crystal frequency, the selected crystal must support DMT 4.3125 KHz channel separation. Thus, the chosen crystal must have a resonant frequency that is a multiple of 4.3125 KHz. In one embodiment, the selected crystal is a 35.328 MHz crystal.

2, the analog front end 218 may be arranged to support a voiceband channel for voiceband modem communication involving non-voiceband (ie, xDSL) communication. If a single clock is used for synchronization, the voiceband channel circuit can be integrated as an xDSL circuit on the same integrated circuit die. However, voiceband communication has a bandwidth of about 4 KHz and a nominal baseband sampling rate of 8 KHz. These values are not immediately compatible with the requirements of xDSL circuits with subchannels of 4.3125 KHz bandwidth. Using many independent clocks may interfere with the operation of at least one of the xDSL or voiceband circuits due to intermodulation and other undesirable effects resulting from many clocks.

Referring to FIG. 2, sample rate conversion is used to derive different clock frequencies to avoid many independent clocks. Simultaneous sample rate conversion is used to achieve various clock rates through a combination of upsampling by an integer factor and downsampling by an integer factor. The sample rate conversion block 210 includes the transmit path and receive path shown in more detail in FIGS. 7-8. The actual sample rate conversion is processed by blocks 741, 750 and 752 of FIG. 7 and by blocks 844, 850 and 860 of FIG. The remaining block adjusts the signal before or after sample rate conversion.

In one embodiment, the voiceband portion of the analog front end supports multiple clock frequencies, including those of the set S = {7200, 8000, 8229, 8400, 9000, 9600, 10286 Hz}. Various clock frequencies allow flexibility in determining the baud rate common to other modems. The universal conversion speed (ie, intermediate frequency) is chosen that can be derived from any original ratio required by integer upsampling and downsampling. Appropriate upsampling and downsampling constants are selected programmatically depending on the baud rate at which the user attempts to communicate. Continuous digital processing is processed independently of the original frequency at a predetermined intermediate frequency.

The sampling frequency f _s is selected such that f _s = f ₀ / n. Where n is an integer and f ₀ can be divided by n such that f ₀ mod (n) = 0. In one embodiment, n = 32 such that f _s = 35.328 MHz / 32 = 1.104 MHz. The conversion rate f _audio is chosen such that for every f _i in S the integers M _i and N _i are such that f _i = (M _i / N _i ) f _audio .

In one embodiment, the selected universal conversion rate is 9600. The table 900 of FIG. 9 shows nominal M and N values when converting the analog signal rate to the same universal conversion rate of 9600 for further digital processing. The common multiple of M and N makes it possible to reduce the number of separate Ms or Ns while maintaining the same ratio. Thus, instead of the totally reduced value of column 2, the use of a reducible ratio requires only three distinct Ms: 6, 14, 16. It is believed that the least common multiple can be used to further reduce M. However, large values may not be desirable for digital filters such as N or finite impulse response filters. Thus, column 3 represents the ratio optimized to minimize the number of individual Ms for small Ms. The ratio provides accurate conversion except for 10,286 and 8229 with errors below 0.5 Hz required by the ITU standard.

Referring to the transmission path 700 of FIG. 7, the optimal M and N are selected from the third column according to the selected analog speed of the table 900. Thus, for example, if the selected analog speed is 7200, then M = 16 and N = 12. Block 752 upsamples the audio signal by M. The upsampled signal is provided to a finite impulse response (FIR) filter 750. Reducing the total number of Ms reduces the number of filters required, thus reducing the memory required for filter coefficients. After digital filtering, the filtered signal is downsampled by N at block 742. Data is now the universal conversion speed of 9600. The downsampled signal is passed to a compensator 740 to shape the frequency response before upsampling. Compensator 740 provides frequency compensation at high frequencies.

At block 732, the compensated signal is upsampled by five, and then filtered by infinite impulse response filter 730 to remove the image introduced by upsampling. In block 722 the filtered signal is upsampled again by 23. The upsampled signal is then passed to interpolator 720 to remove the image introduced by the second upsampling. In one embodiment, 23 upsampling and insertion are performed by the same filter. The inserted signal is provided to the DAC 710.

The frequency corners for the interpolator are chosen to ensure proper aliasing of the signal image as well as no aliasing in the decimation process. This requires that the FIR 750 cutoff frequency be the smaller of the interpolation and decimation cutoff frequencies.

10 illustrates the operation of FIR 750. The FIR includes a plurality of samples 1000 of input data. Each sample 1000 is delayed for an adjacent sample. Each tap has an associated coefficient 1010. The product of the coefficients 1010 and their associated tap values (from the sample above) are calculated and then added by an adder 1020 to produce a result. In certain cases, each M coefficient 1010 is used to calculate a new output value. The input data moves by N places between calculations of the output value. When inserted, multiple input sample values have a value of '0'. FIG. 11 shows a polyphase pointer and serial interface pulse generator 1100 for the FIR of the transmit path of the AFE.

8 illustrates a receive or downstream path 800. ADC 810 samples at 1.104 MHz. The resulting digital signal is passed to decimator 820. The decimated signal is downsampled by 23 at block 822. In one embodiment, the downsampling function and decimation by 23 factors are performed by the same filter. At this time, data is being transmitted at 48 KHz. Block 830 scales the data values, if necessary, to comply with the computational needs of filters 840 and 850. In one embodiment, block 830 scales the data value by 64. Infinite impulse response filter 840 (IIR) is applied to remove outband signals that may be aliased for the outband range of 9600 Hz to 48 KHz. The resulting data is downsampled by 5 factors at block 842. The data is a 9600 Hz signal.

M and N are selected again based on a predetermined analog speed from table 900. Block 844 upsamples the signal by N before providing the upsampled signal to FIR filter 850. The signal is then downsampled by M to have a rate appropriate for the voiceband channel. FIG. 12 illustrates one embodiment of a polyphase pointer for the receive path of FIG. 8.

In the foregoing detailed description, the invention has been described with reference to specific exemplary embodiments. Various changes may be made without departing from the scope of the invention as set forth in the claims. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense.

Claims (19)

A hybrid network 620 having a hybrid input, a receive input, and a hybrid output, wherein the receive input is capacitively connected to a subscriber line carrying an upstream data signal and a downstream data signal; And And a driver 610 for providing upstream data signals to subscriber lines and hybrid inputs, The driver is capacitively coupled to the hybrid input, wherein the hybrid output provides a downstream data signal extracted from the subscriber line. 10. The apparatus of claim 1, wherein the hybrid network is mounted on an integrated circuit die. 3. The apparatus of claim 2, wherein the driver is mounted on the same integrated circuit die. The apparatus of claim 1, wherein the hybrid network is a complementary metal oxide semiconductor (CMOS) integrated circuit. 2. The apparatus of claim 1, wherein the upstream and downstream data signals are multitone modulated data signals. And a hybrid network (620) connected to receive upstream data signals and downstream data signals delivered to subscriber lines (290), extracting downstream data signals, and having an order of 2 or less. The method of claim 6, wherein the hybrid network, A receive port coupled to receive an upstream data signal from the driver 610 and a mixed signal including upstream and downstream data signals from the subscriber line; And further comprising an output port for providing the extracted downstream data signal, The transfer function from the driver to the receive port is Z (s) / (R _D + Z (s)), where R _D is the driver output impedance, Z (s) is the subscriber line impedance, The transfer function from the receive port to the output port is K _rx s / (s + HBY0), where HBY0 is programmatically adjustable and K _rx is the receive path gain. The method of claim 7, wherein the hybrid network, And further comprising a hybrid input port coupled for receiving upstream data signals from the driver, The transfer function from the hybrid input port to the hybrid output port is K _HYB s / (s + HYBP), where HYBP is programmatically adjustable and K _HYB is the hybrid path gain. 9. The subscriber line impedance of claim 8 wherein the subscriber line impedance is approximated by a series connected resistor R _x and capacitor C _x and the transfer function from the driver to the receive port of the output is HBY0 is Are adjusted to have substantially the same value as, HBY0 is adjusted to substantially match Z (s), and HYBP and KHYB are this And is selected to be substantially the same as. 7. The apparatus of claim 6, wherein the hybrid network is tuned to substantially act as a primary network. 7. The apparatus of claim 6, wherein the hybrid network is mounted on an integrated circuit die. 12. The apparatus of claim 11, wherein the hybrid network is a complementary metal oxide semiconductor (CMOS) integrated circuit. 7. The apparatus of claim 6, wherein the upstream and downstream data signals are multitone modulated data signals. a) a transmission block 230 coupled to transmit discrete multitone modulated upstream data to subscriber line 290; b) a hybrid network 260 connected to the subscriber line and the transmission block; c) a receive block 240 coupled to the hybrid for receiving discrete multitone modulated downstream data, An analog front end device, characterized in that a transmission block, a hybrid network, and a reception block are mounted in the same integrated circuit package. 15. The analog front end device according to claim 14, wherein the hybrid is a primary hybrid network. 15. The analog front end device of claim 14, wherein the hybrid is tunable. 15. The analog front end device of claim 14, wherein the hybrid is DC isolated from the transmit and receive blocks of the analog front end. The method of claim 14, wherein the transmission block, Iii) a first interpolator 330 coupled to interpolate upstream data from the first clock rate to a second clock rate that is greater than the first clock rate; Ii) a connected power spectral density shaping filter 340 for modifying the power spectrum of the inserted upstream data; Iv) a second interpolator (350) coupled to insert the modified signal at a third clock rate greater than the second clock rate. 15. The analog front end device of claim 14, wherein the transmit block, hybrid network, and receive block are assembled on the same integrated substrate to form a complementary metal oxide semiconductor (CMOS) integrated circuit.