KR20030089911A - Photo mark for semiconductor device process - Google Patents

Abstract

PURPOSE: A photo mark for manufacturing a semiconductor device is provided to be capable of simultaneously measuring overlay and focus. CONSTITUTION: A photo mark comprises a main scale(10) and a vernier(20). The main scale(10) having rectangle shape is formed at a scribe region of a semiconductor wafer. The vernier(20) having rectangle shape is formed in the main scale(10). The vernier(20) is provided with a plurality of lines(22) spaced apart from each other and a plurality of spaces(24).

Description

Photo mark for the manufacture of semiconductor devices

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to photomarks used in an exposure process, and more particularly to photomarks for checking overlay and focus.

In recent years, with the rapid spread of information media such as computers, semiconductor devices are also rapidly developing. In terms of its function, the semiconductor device is required to operate at a high speed and to have a large storage capacity. In response to such demands, manufacturing techniques have been developed for semiconductor devices to improve the degree of integration, reliability, and response speed. As a technique for improving the integration degree of the semiconductor device, the demand for microfabrication technology such as photolithography technology is also becoming strict.

The photolithography process is a process for patterning various films formed on a wafer in a desired form. To this end, a series of processes such as photoresist coating, selective exposure and development of the photoresist film are performed.

In order to form the desired film pattern through the above processes, it is very important to expose at the correct position. To this end, before performing the exposure process, a photo mark is formed on the lower layer and the film for performing the current patterning process, respectively, and an overlay measurement process of measuring the photo mark is performed.

An example of an overlay measurement method using the photo mark is disclosed in US Pat. No. 6,083,807.

In addition, as the critical dimension CD of the pattern to be formed is rapidly reduced, the depth of focus of the light during exposure is rapidly reduced. Because of this, it is very important to carry out the exposure process at the correct focus position.

Confirmation of the said focus is made by confirming the profile of the actually formed pattern using the electron microscope.

However, as described above, since the overlay measurement and the focus confirmation must be performed during the exposure process, the process progress time is increased and the process management is difficult. Therefore, there exists a problem that productivity of a semiconductor device falls.

Accordingly, an object of the present invention is to provide a photo mark for simultaneously performing overlay measurement and focus confirmation.

1 shows a photo mark according to a first embodiment of the present invention.

2 shows a photo mark according to a second embodiment of the present invention.

3 shows a photo mark according to a third embodiment of the present invention.

4 shows a photo mark according to a fourth embodiment of the present invention.

FIG. 5 is a diagram for describing a method of measuring an overlay and a focus by using the photo mark of the first embodiment.

Fig. 6 is an enlarged view in which a part of the sons in the photomark of the first embodiment is enlarged.

7 is a graph schematically illustrating a change in the length of the line of the son according to a focus offset.

<Explanation of symbols for the main parts of the drawings>

10, 50, 100, 150: Mother 20, 60, 120, 180: Son

In order to achieve the above object, the photo mark of the present invention,

A rectangular mother shape provided in the scribe area of the semiconductor wafer, the sides of which comprise one line; And

Inside the mother line, the same lines are spaced apart at regular intervals, and the lines and the intervals between the lines include rectangular shaped sonars arranged to be sides of a rectangle.

Moreover, in order to achieve the said objective, the photomark of another form of this invention is

A rectangular mother shape provided in the scribe area of the semiconductor wafer, the sides of which comprise one line; And

Inside the mother line, the lines are spaced apart at equal intervals, and the edges of the series of patterns consisting of the lines and the spacings between the lines comprise an element having a rectangular shape.

The photo mark is provided with a repetitive line and a space repeatedly, so that the end of the line provided in the resonant becomes shorter according to the focal point. Therefore, by measuring the length of the line optically, the focus can be confirmed.

In addition, the overlay can be confirmed by optically measuring the difference between the center value of the mother and the son.

By using the photo mark, the overlay and the focus can be checked simultaneously.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First embodiment

1 shows a photo mark according to a first embodiment of the present invention.

Referring to FIG. 1, in the scribe line region of a semiconductor wafer, a rectangular mother 10 having sides formed with one line is provided. The mother 10 has a box shape in which corner portions of lines constituting each side of the rectangular shape are connected to each other.

Sonja 20 is provided in the central portion in the mother 10. The sons 20 have identical lines 22 arranged at regular intervals. Specifically, the son 20 has a line 22 and the space 24 is repeatedly provided, the line 22 and the space 24 has a rectangular shape consisting of each side of the rectangle. The direction of each side of the rectangle formed in the sonja 20 is perpendicular to the longitudinal direction of the line included in the sonja 20.

The widths A and A ′ of the lines 22 and the spaces 24 included in the sonza 20 are 1: 1, respectively, and have the same width. The widths A and A 'of the lines 22 and the spaces 24 are preferably the same as the design rules of the semiconductor device formed on the semiconductor wafer. This is to make it apparent that the length of the line in the line 22 and the space 24 varies depending on the focus. The design rule is different for each semiconductor device, but recent semiconductor devices have a design rule of about 0.1 to 0.3 탆.

The length B of the line 22 provided in the son 20 has a length that can be measured by an optical microscope. Specifically, it has a length of 2 to 10㎛.

Second embodiment

2 shows a photo mark according to a second embodiment of the present invention.

Referring to FIG. 2, in the scribe line region of the semiconductor wafer, a rectangular mother mat 50 is formed in which each side is formed of one line. The mother 50 has a bar type in which the corners of the lines constituting each side of the rectangular shape are separated from each other.

Sonja 60 is provided in the central portion in the mother (50). The insulator 60 has a line 62 and a space 64 repeatedly, and the lines 62 and the spaces 64 have a rectangular shape consisting of respective sides of a rectangle. , The direction of each side of the rectangle is perpendicular to the longitudinal direction of the line 62 included in the son (60).

Since the shape of the son of the second embodiment is the same as that of the first embodiment, detailed description thereof will be omitted.

Third embodiment

3 shows a photo mark according to a third embodiment of the present invention.

Referring to FIG. 3, a rectangular shape mother 100 is provided in a scribe area of a semiconductor wafer and each side is formed of one line. The mother 100 has a box shape in which corner portions of lines forming each side of the rectangular shape are connected to each other.

A sonja 120 is provided at the center of the mother 100. The son 120 has the same line 122 is arranged at a predetermined interval. Specifically, the son is repeatedly provided with a line 122 and the space 124, the edge of a series of patterns consisting of the line 122 and the space 124 has a rectangular shape.

The width of the line 122 and the space 124 included in the sonza is 1: 1, and each has the same width. In addition, the width of the line 122 and the space 124 is preferably the same as the design rule of the semiconductor device formed on the semiconductor wafer. The design rule is different for each semiconductor device, but recent semiconductor devices have a design rule of about 0.1 to 0.3 탆.

Fourth embodiment

4 shows a photo mark according to a fourth embodiment of the present invention.

Referring to FIG. 4, in the scribe line region of the semiconductor wafer, a rectangular mother 150 having each side of one line is provided. The mother 150 has a bar type in which corner portions of lines constituting each side of the rectangular shape are separated from each other.

The son child 180 is provided at a central portion of the mother 150. The son 180 is repeatedly provided with a line 182 and a space 184, the edge of a series of patterns consisting of the lines 182 and the space 184 has a rectangular shape.

Since the shape of the son of the fourth embodiment is the same as that of the third embodiment, detailed description thereof will be omitted.

Hereinafter, a method of measuring overlay and focus using the photo mark of the embodiments of the present invention will be described.

Referring to FIG. 5, a method of measuring overlay and focus using the photo mark of the first embodiment will be described.

First, an image of the photo mark shown in FIG. 5 is captured.

The light and dark of the image are converted into an electrical signal in a predetermined section of the image. Looking at the electrical signal, since the wavelength of the light reflected from the edges of the mother 10 and the son 20 of the photomark is different, a predetermined peak 30 occurs. The peak occurs at both ends 30a of the mother line and at both ends 30b of each line at the son. Therefore, by measuring the distance between the peaks and the peaks, the lengths L1 and L2 of the lines of the mother 10 and the son 20 and the positions of the mother and son may be determined.

Subsequently, the center values of the mother 10 and son 20 are measured by the electrical signals. Then, the difference between the center values of the mother child 10 and the son child 20 is digitized to confirm whether the deviation is out of a predetermined range. At this time, when the sonja 20 is formed exactly in the center of the mother 10, the center of the mother 10 and son 20 is the same. Therefore, the overlay is measured by the difference in the respective center values.

In addition, the length L2 of the line of the sonza 20 is measured. Since the line 20 and the space 24 are formed repeatedly, the length of the line changes according to the focus of light.

Fig. 6 is an enlarged view in which a part of the sons in the photomark of the first embodiment is enlarged.

7 is a graph schematically illustrating a change in the length of the line of the son according to a focus offset.

As shown, the length L2 of the line appears the longest when the focus is correct, and the length L2 of the line decreases when the focus is not in focus. Therefore, by measuring the length of the line, it is possible to confirm whether the focus is exactly correct, and also to attain the correct focus.

Therefore, when using the photo mark, the overlay and the focus can be simultaneously confirmed by an optical method.

Although the description has been made with the photomarks of the first embodiment, the overlay and focus can be simultaneously confirmed in the same way with the photomarks of the second to fourth embodiments.

As described above, the photo mark according to the present invention is provided so that the overlay and the focus can be simultaneously checked using an optical method. Therefore, the overlay and the focus confirmation time is shortened, productivity is improved, and there is an effect of facilitating process management.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified without departing from the spirit and scope of the invention described in the claims below. And can be changed.

Claims (8)

A rectangular mother shape provided in the scribe area of the semiconductor wafer, the sides of which comprise one line; And Inside the mother line, the same lines are spaced apart at regular intervals, and the lines and the intervals between the lines comprises a rectangular shaped sonar arranged to be each side of the rectangle. The photo mark according to claim 1, wherein the direction of each side of the rectangle forming said sonus is perpendicular to the direction of a line provided in said son. The photo mark according to claim 1, wherein the width of the line provided between the sons and the space between the lines is the same as the design rule of the semiconductor device formed on the semiconductor wafer. The photo mark according to claim 1, wherein the length of the line provided in the son is 2 to 10 µm. The photo mark according to claim 1, wherein the mother line has a box shape in which corner portions of lines constituting each side of the rectangular shape are connected to each other. The photo mark as claimed in claim 1, wherein the end portions are bar-shaped, wherein the edges of the lines constituting each side of the rectangular shape are separated from each other. A rectangular mother shape provided in the scribe area of the semiconductor wafer, the sides of which comprise one line; And Inside the mother line, the same lines are spaced apart at regular intervals, and the edge of the series of patterns consisting of the lines and the intervals between the lines comprises an insulator having a rectangular shape. The photo mark according to claim 7, wherein the width of the line and the space between the lines provided in the son is the same as the design rule of the semiconductor device formed on the semiconductor wafer.