KR20030089343A - Method for forming a reticle of semiconductor device - Google Patents
Method for forming a reticle of semiconductor device Download PDFInfo
- Publication number
- KR20030089343A KR20030089343A KR1020020027517A KR20020027517A KR20030089343A KR 20030089343 A KR20030089343 A KR 20030089343A KR 1020020027517 A KR1020020027517 A KR 1020020027517A KR 20020027517 A KR20020027517 A KR 20020027517A KR 20030089343 A KR20030089343 A KR 20030089343A
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- KR
- South Korea
- Prior art keywords
- reticle
- layer
- pattern
- semiconductor device
- forming
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Classifications
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/38—Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
- G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
Abstract
Description
본 발명은 반도체 소자의 레티클(Reticle) 형성 방법에 관한 것으로, 특히 패턴(Pattern)이 없는 주변부와 패턴이 형성되는 셀(Cell)부간에 투과율 차이를 주어 소자의 수율 및 신뢰성을 향상시키는 반도체 소자의 레티클 형성 방법에 관한것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a reticle of a semiconductor device. In particular, the present invention relates to a semiconductor device for improving the yield and reliability of a device by providing a difference in transmittance between a peripheral part without a pattern and a cell part in which a pattern is formed. It relates to a reticle forming method.
일반적으로 레티클은 유리 또는 석영 기판위의 크롬 박막에 형성된 회로 설계 일부의 '하드 카피(hard copy)'이다.In general, a reticle is a 'hard copy' of a portion of a circuit design formed on a thin film of chromium on a glass or quartz substrate.
상기 레티클은 직접적으로 사용될 수 있고, 또는 포토 마스크를 형성하는데 사용될 수 있다.The reticle can be used directly or can be used to form a photo mask.
상기 레티클 중에서 반도체 소자의 고집적화에 따라 고투과율의 위상반전 마스크를 사용하는 추세이다.Among the reticles, there is a trend to use a high-transmission phase shift mask according to high integration of semiconductor devices.
도 1a와 도 1b는 종래의 기술에 따른 반도체 소자의 레티클 형성 방법을 도시한 단면도이다.1A and 1B are cross-sectional views illustrating a reticle forming method of a semiconductor device according to the related art.
도 1a를 참조하면, 셀부와 주변부가 정의된 석영 기판(11) 상에 크롬층(13), 쉬프터층(15) 및 감광막(17)을 순차적으로 형성한다.Referring to FIG. 1A, a chromium layer 13, a shifter layer 15, and a photosensitive film 17 are sequentially formed on a quartz substrate 11 having a cell portion and a peripheral portion defined therein.
도 1b를 참조하면, 상기 감광막(17)을 투광 영역이 형성될 부위에만 제거되도록 선택적으로 노광 및 현상한다.Referring to FIG. 1B, the photosensitive film 17 is selectively exposed and developed so as to be removed only at a portion where a light transmissive region is to be formed.
그리고, 상기 선택적으로 노광 및 현상된 감광막(17)을 마스크로 상기 쉬프터층(15)과 크롬층(13)을 식각하여 투광 영역(19)을 형성한 후, 상기 감광막(17)을 제거한다.The shifter layer 15 and the chromium layer 13 are etched using the selectively exposed and developed photosensitive film 17 as a mask to form the light transmissive region 19, and then the photosensitive film 17 is removed.
그러나 종래의 반도체 소자의 레티클 형성 방법은 고투과율의 PSM을 사용한 사진식각 공정에 있어서, 패턴이 없는 주변부와 패턴이 형성되는 셀부간에 투과율이 동일한 사진식각 공정을 진행하므로, 상기 주변부도 투과율이 높아 상기 셀부의 콘택이 형성되기 전에 상기 주변부의 감광막이 제거되므로 상기 사진식각 공정 시주변부가 식각되는 문제점이 있었다.However, in the conventional method of forming a reticle of a semiconductor device, in a photolithography process using a high transmittance PSM, a photolithography process having the same transmittance is performed between a peripheral portion without a pattern and a cell portion where the pattern is formed, so that the peripheral portion also has a high transmittance. Since the photosensitive film of the peripheral part is removed before the contact of the cell part is formed, there is a problem that the peripheral part is etched during the photolithography process.
본 발명은 상기의 문제점을 해결하기 위해 안출한 것으로 셀부의 패턴 형성 공정 시, 주변부의 쉬프터층이 제거된 레티클을 사용한 사진식각 공정을 진행하므로써, 패턴이 없는 주변부와 패턴이 형성되는 셀부간에 투과율 차이를 주어 고투과율의 PSM을 사용한 사진식각 공정 시 주변부가 식각되는 것을 방지하는 반도체 소자의 게이트 전극 형성 방법을 제공하는데 그 목적이 있다.The present invention has been made to solve the above problems, and during the pattern forming process of the cell part, the photolithography process using the reticle from which the shifter layer of the peripheral part is removed is performed, whereby the transmittance difference between the peripheral part without the pattern and the cell part where the pattern is formed is different. The purpose of the present invention is to provide a method for forming a gate electrode of a semiconductor device which prevents the peripheral portion from being etched during a photolithography process using a high transmittance PSM.
도 1a와 도 1b는 종래의 기술에 따른 반도체 소자의 레티클 형성 방법을 도시한 단면도.1A and 1B are cross-sectional views illustrating a reticle forming method of a semiconductor device according to the related art.
도 2a 내지 도 2d는 본 발명의 실시 예에 따른 반도체 소자의 레티클 형성 방법을 도시한 단면도2A through 2D are cross-sectional views illustrating a reticle forming method of a semiconductor device according to an embodiment of the present invention.
< 도면의 주요부분에 대한 부호의 설명 ><Description of Symbols for Major Parts of Drawings>
11,31 : 석영 기판13,33 : 크롬층11,31: quartz substrate 13,33: chrome layer
15,35 : 쉬프터층17 : 감광막15,35: shifter layer 17: photosensitive film
37 : 제 1 감광막19,39 : 투광 영역37: first photosensitive film 19,39: light transmitting region
41 : 제 2 감광막 패턴41: second photosensitive film pattern
이상의 목적을 달성하기 위한 본 발명은 셀부와 주변부가 정의된 투명 기판 상에 투광 영역을 정의하는 차광 패턴을 형성하되, 상기 차광 패턴을 차광층과 쉬프터층의 적층구조로 형성하는 단계 및 상기 주변부의 쉬프터층을 제거하는 단계를 포함하는 것을 특징으로 한다.The present invention for achieving the above object is to form a light shielding pattern defining a light-transmitting area on a transparent substrate having a cell portion and a peripheral portion defined, forming the light shielding pattern in a laminated structure of the light shielding layer and the shifter layer and the peripheral portion Removing the shifter layer.
본 발명의 원리는 셀부의 패턴 형성 공정 시, 주변부의 쉬프터층이 제거된 레티클을 사용한 사진식각 공정을 진행하므로, 패턴이 없는 주변부와 패턴이 형성되는 셀부간에 투과율 차이를 주어 고투과율의 PSM을 사용한 사진식각 공정 시 주변부가 식각되는 것을 방지하기 위한 발명이다.In the principle of the present invention, the photolithography process using the reticle from which the shifter layer of the peripheral portion is removed during the pattern forming process of the cell portion is performed. The invention for preventing the peripheral portion is etched during the photolithography process.
또한, 하나의 마스크에 상기 쉬프터층이 형성된 부위와 제거된 부위가 있기 때문에 상기 하나의 마스크로 상기 쉬프터층을 요하는 사진식각 공정과 요하지 않는 사진식각 공정 모두에 사용할 수 있게 하기 위한 발명이다.In addition, since there is a portion where the shifter layer is formed and a portion is removed in one mask, the present invention is to enable the shifter layer to be used in both a photolithography process and a photolithography process that do not require the shifter layer.
이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명하면 다음과 같다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
도 2a 내지 도 2d는 본 발명의 실시 예에 따른 반도체 소자의 레티클 형성 방법을 도시한 단면도이다.2A to 2D are cross-sectional views illustrating a method of forming a reticle of a semiconductor device according to an embodiment of the present invention.
도 2a를 참조하면, 셀부와 주변부가 정의된 석영 기판(31) 상에 크롬층(33), 쉬프터층(35) 및 제 1 감광막(37)을 순차적으로 형성한다. 이때, 상기 쉬프터층(35)은 폴리실리사이드(MoSi2)층, 크롬플로라이드(CrFX)층 등 쉬프터 구성물질로 형성한다.Referring to FIG. 2A, the chromium layer 33, the shifter layer 35, and the first photoresist layer 37 are sequentially formed on the quartz substrate 31 in which the cell portion and the peripheral portion are defined. In this case, the shifter layer 35 is formed of a shifter constituent such as a polysilicide (MoSi 2 ) layer and a chrome fluoride (CrF X ) layer.
도 2b를 참조하면, 상기 제 1 감광막(37)을 투광 영역이 형성될 부위에만 제거되도록 선택적으로 노광 및 현상한다.Referring to FIG. 2B, the first photosensitive film 37 is selectively exposed and developed to be removed only at a portion where the light transmissive region is to be formed.
그리고, 상기 선택적으로 노광 및 현상된 제 1 감광막(37)을 마스크로 상기 쉬프터층(35)과 크롬층(33)을 식각하여 투광 영역(39)을 형성한 후, 상기 제 1 감광막(37)을 제거한다.The shifter layer 35 and the chromium layer 33 are etched using the selectively exposed and developed first photosensitive film 37 as a mask to form a transmissive region 39, and then the first photosensitive film 37. Remove it.
도 2c를 참조하면, 상기 주변부만 제거된 제 2 감광막 패턴(41)을 형성한다.Referring to FIG. 2C, the second photoresist layer pattern 41 from which only the periphery is removed is formed.
도 2d를 참조하면, 상기 제 2 감광막 패턴(41)을 마스크로 상기 주변부의 쉬프터층(35)을 제거한 다음, 상기 제 2 감광막 패턴(41)을 제거한다.Referring to FIG. 2D, the shifter layer 35 of the peripheral portion is removed by using the second photoresist pattern 41 as a mask, and then the second photoresist pattern 41 is removed.
본 발명의 반도체 소자의 레티클 형성 방법은 셀부의 패턴 형성 공정 시, 주변부의 쉬프터층이 제거된 레티클을 사용한 사진식각 공정을 진행하므로, 패턴이 없는 주변부와 패턴이 형성되는 셀부간에 투과율 차이를 주어 고투과율의 PSM을 사용한 사진식각 공정 시 주변부가 식각되는 것을 방지하여 소자의 수율 및 신뢰성을향상시키고, 또한 하나의 마스크에 상기 쉬프터층이 형성된 부위와 제거된 부위가 있어 상기 하나의 마스크로 상기 쉬프터층을 요하는 사진식각 공정과 요하지 않는 사진식각 공정 모두에 사용할 수 있으며 소자의 원가를 절감시키고 오버레이를 향상시키는 효과가 있다.In the method of forming the reticle of the semiconductor device of the present invention, the photolithography process using the reticle from which the shifter layer of the peripheral portion is removed during the pattern forming process of the cell portion provides a difference in transmittance between the peripheral portion without the pattern and the cell portion where the pattern is formed. The peripheral portion is prevented from being etched during the photolithography process using the transmittance PSM to improve the yield and reliability of the device. Also, the shifter layer is formed by the mask with the portion where the shifter layer is formed and the removed portion. It can be used for both photolithography process and photolithography process that does not require, and it has the effect of reducing device cost and improving overlay.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020020027517A KR20030089343A (en) | 2002-05-17 | 2002-05-17 | Method for forming a reticle of semiconductor device |
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| Application Number | Priority Date | Filing Date | Title |
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| KR1020020027517A KR20030089343A (en) | 2002-05-17 | 2002-05-17 | Method for forming a reticle of semiconductor device |
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| KR20030089343A true KR20030089343A (en) | 2003-11-21 |
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| KR1020020027517A KR20030089343A (en) | 2002-05-17 | 2002-05-17 | Method for forming a reticle of semiconductor device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100849800B1 (en) * | 2006-07-20 | 2008-07-31 | 주식회사 하이닉스반도체 | Exposure mask and method for manufacturing semiconductor device using the same |
| US8313876B2 (en) | 2006-07-20 | 2012-11-20 | Hynix Semiconductor Inc. | Exposure mask and method for manufacturing semiconductor device using the same |
| US9989857B2 (en) | 2014-10-20 | 2018-06-05 | Samsung Electronics Co., Ltd. | Photomask and method of forming the same and methods of manufacturing electronic device and display device using the photomask |
-
2002
- 2002-05-17 KR KR1020020027517A patent/KR20030089343A/en not_active Application Discontinuation
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100849800B1 (en) * | 2006-07-20 | 2008-07-31 | 주식회사 하이닉스반도체 | Exposure mask and method for manufacturing semiconductor device using the same |
| US8313876B2 (en) | 2006-07-20 | 2012-11-20 | Hynix Semiconductor Inc. | Exposure mask and method for manufacturing semiconductor device using the same |
| US9989857B2 (en) | 2014-10-20 | 2018-06-05 | Samsung Electronics Co., Ltd. | Photomask and method of forming the same and methods of manufacturing electronic device and display device using the photomask |
| US10474034B2 (en) | 2014-10-20 | 2019-11-12 | Samsung Electronics Co., Ltd. | Phase shift mask |
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