KR20030078373A - A thermally enhanced ic chip package - Google Patents

Abstract

Thermally strengthened IC chip packages have dielectric substrates and openings having conductive circuit patterns on the top and bottom surfaces. An IC chip having an active side and an inactive side is accommodated in the opening. The active side of the chip and the top surface of the substrate face the same direction and are electrically connected to each other. The thermally conductive and electrically conductive adhesive layer is disposed on the inactive side of the chip and the top surface of the substrate so as to completely surround the opening. A thermally conductive and electrically conductive planar member is attached to the adhesive layer. The molding material encapsulates the chip, the opening and the top surface of the substrate.

Description

Thermally Enhanced IC Chip Packages {A THERMALLY ENHANCED IC CHIP PACKAGE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to integrated circuit (IC) packages, and more particularly to low cost, high performance IC chip packages with enhanced thermal performance.

U. S. Patent No. 5,355, 283 describes a thermally strengthened IC chip package as shown in FIG. 1, which includes a substrate 1 having a center hole 2. As shown in FIG. The substrate 1 is bonded with an adhesive 4, such as an epoxy adhesive, to a heat sink 3 which may be formed of copper or other material having high thermal conductivity. The IC chip 5 is also coupled to the heat sink 3 by an adhesive 4 in the center hole 2 substantially filled with the capsule 6.

In such a conventional IC chip package as described above, when the package has a heat sink, most heat sink surfaces are particularly exposed to the outside of the package, so that heat can be efficiently transferred. However, there are disadvantages. The difference in thermal expansion coefficient between the heat sink 3 and the substrate 1 causes a problem in the adhesive layer 4. This is exacerbated by the difference in heating rate and cooling rate. The heat sink 3 is directly heated by conduction through the region of the relatively large adhesive patch 7. The substrate 1 is less directly heated by conduction through the heat sink 3 and the capsule 6. Thus, there seems to be a cyclic temperature difference that exacerbates the difference in expansion due to differences in coefficient of thermal expansion. Moreover, the process of implementing a complete heat sink on a substrate is relatively complex and expensive.

Therefore, the main object of the present invention is to provide a thermally strengthened IC chip without the disadvantages of conventional IC chip packages.

It is another object of the present invention to provide a low cost and thermally strengthened IC chip package that does not use an epoxy adhesive and a heat spreader to which the chip is attached.

It is another object of the present invention to provide a thermally strengthened IC package having good heat dissipation properties and good electrical performance.

1 is a front view of a thermally enhanced conventional IC chip package.

2 is an exploded view of an IC chip package constructed in accordance with one embodiment of the present invention.

3 is a front view of the assembled package of FIG. 2.

The object of the present invention described above is achieved by a thermally strengthened IC chip package comprising a substrate having opposing top and bottom surfaces with conductive circuit patterns and openings. The plurality of solder balls are electrically connected to the bottom surface of the substrate member. An IC chip having an active side and an inactive side is received in an opening of a substrate in such a manner that the active side of the chip and the top surface of the substrate are directed in the same direction. The active side of the chip is electrically connected to the top surface of the substrate. The thermally conductive and electrically conductive adhesive layer is disposed in such a manner as to completely surround the opening on the inactive side of the chip and the bottom surface of the substrate. A thermally conductive and electrically conductive planar member having upper and lower surfaces is thermally and electrically attached to the top of the adhesive layer. Molding material encapsulates the chip, openings and top surface of the substrate.

The above objects, features, and advantages of the present invention will be readily understood by observing the preferred embodiments of the present invention with reference to the accompanying drawings.

Example

As shown in Figures 2 and 3, a package 10 in accordance with one embodiment of the present invention is shown. Package 10 includes a substrate or board 12 formed of a suitable dielectric or insulating material. The substrate 12 has an upper surface 14 and a lower surface 16 along with the conductive circuit pattern 18. The plurality of solder balls 20 are attached to individual ones of the mounting pads 22 on the bottom surface 16. A central window or opening 24 having a predetermined size and shape is formed through the thickness of the substrate 12.

IC chip 30 has an active side 32 and an inactive side 34. Chip 30 is received in opening 24. The plurality of fine wires 36, for example, gold wires, allow wire bonding pads 38 on the active side 32 of the chip 30 to contact pads 40 on the top surface 14 of the substrate 12. ) To each.

A thermally conductive and electrically conductive adhesive layer 50, for example copper paste, is arranged in such a way as to completely surround the opening 24 in the inactive side 34 of the chip 30 and the upper surface 16 of the substrate. do.

The thermally conductive and electrically conductive planar member 60, for example a copper plate, has an upper surface 62 and a lower surface 64. The upper surface 62 of the member 60 is bonded to the adhesive layer 50 which is thermally conductive and electrically conductive. The liquid capsule 70 encapsulates the top surface of the chip 30 and the substrate 12 and fills the opening 24.

The package 10 is solder mounted to a main or " mother " board 80 by solder balls 20 that are attached to the substrate 12 when used. The bottom surface 60 of the thermally conductive and electrically conductive planar member 60 is coupled to the main board 80 by an adhesive tape 82 formed of a thermally conductive and electrically conductive material. This allows heat generated by the IC chip 30 to be transferred directly to the main board 80 through the planar member 60, and the electrical circuit of the package is directly grounded to the main board 80 through the planar member 60. . As a result, the thermally strengthened IC chip package provided by the present invention has excellent heat dissipation characteristics and good electrical performance. Moreover, the expansion difference due to the difference in thermal expansion coefficient is not increased.

In addition, since there is no use of chip attach materials such as an epoxy adhesive layer and a heat spreader, the IC chip package according to the present invention simplifies the manufacturing process and reduces packaging costs.

While the preferred embodiments of the invention have been described for purposes of illustration, those skilled in the art will recognize that various changes, additions, and substitutions are possible without departing from the scope and principles of the invention as set forth in the appended claims.

Accordingly, the present invention provides a thermally strengthened IC chip without the disadvantages of conventional IC chip packages, and provides a low cost and thermally strengthened IC chip package that does not use an epoxy adhesive and a heat spreader to which the chip is attached. Can provide. In addition, the present invention can provide a thermally enhanced IC package having excellent heat dissipation characteristics and good electrical performance.

Claims (4)

A dielectric substrate member having a top and a bottom having a conductive circuit pattern, and a through opening, A plurality of solder balls electrically connected to the bottom surface of the substrate member, An IC chip having an active side and an inactive side, received in the opening of the substrate in such a manner that the active side and the upper portion of the substrate face the same direction, and wherein the active side is electrically connected to the upper surface of the substrate, A thermally conductive and electrically conductive adhesive layer disposed on the inactive side of the chip and the lower portion of the substrate in a form completely surrounding the opening; A top surface and a bottom surface, wherein the top surface is a thermally conductive and electrically conductive flat member bonded to the adhesive layer which is thermally conductive and electrically conductive, and A molding material encapsulating the chip, the opening and the top surface of the substrate Thermally enhanced IC chip package comprising a. In claim 1, And the thermally conductive and electrically conductive planar member is a thin copper plate. The method of claim 1 or 2, And the thermally conductive and electrically conductive adhesive layer is a copper paste. In claim 1, And wherein the electrical connection between the chip and the top surface of the substrate is a wire bond.