KR20030078295A - Apparatus and method for virtual channel merging of router in multiprotocol label switch network - Google Patents

Abstract

PURPOSE: A device for merging VCs(Virtual Channels) of routers in an MPLS(Multi Protocol Label Switch) network is provided to enable the routers of the MPLS network to perform a VC merging function at high speed, thereby carrying out the VC merging function by increasing capacities of a cell buffer and an address table. CONSTITUTION: A cell tag controller(230) writes a label value of a header of an ATM cell in a label field of an address table(250), and reads one of idle addresses(100) of an idle address storage(270). The cell tag controller(230) stores the read idle address(100) in a frame start address field(AS) and a frame end address field(AL) of the address table(250), and stores the ATM cell in an address of a cell buffer(290). The cell buffer(290) is composed of a data field for storing the ATM cell and a link address field(AN).

Description

Apparatus and method for virtual channel merging of routers in a multi-protocol label switch network {APPARATUS AND METHOD FOR VIRTUAL CHANNEL MERGING OF ROUTER IN MULTIPROTOCOL LABEL SWITCH NETWORK}

The present invention relates to a multiprotocol label switch network, and more particularly, to an apparatus and method for virtual connection (VC) merging of a router in a MPLS network.

The emergence of multimedia services such as voice and video and various real-time applications places high demands on the Internet and high bandwidths on the Internet. Considering this situation of the Internet, MPLS technology was developed as a move to evolve into the next generation Internet network capable of providing high speed and high quality of service (QoS). MPLS technology combines ATM's high-speed multi-service switching function based on the existing routing method and delivers IP packets. It aims to provide various additional services along with high-speed data transmission in a large network.

MPLS is a kind of third layer switch technology that uses a second layer switching technology such as ATM or frame relay to speed packet forwarding, and connects a third layer routing function to provide network scalability. In MPLS, a label exchange method is used to transmit a packet based on a short, fixed length label. Therefore, in MPLS, the IP packet header processing required for transmitting the IP packet to the destination is performed only once when the IP packet enters the MPLS network without having to be performed in all LSRs. The router processing the header of the IP packet entering the MPLS network as described above is called a Label Edge Router (LER). The LER processes the IP packets at the third layer to determine routing. Meanwhile, the LER divides IP packets into ATM cells and provides them to the MPLS network, and Label Switch Routers (LSRs) in the MPLS network are assigned to labels (actually VPI / VCI) of ATM cells in the second layer. As a result, the ATM cell is switched and transmitted to the corresponding destination.

VC merging in MPLS is to reduce connection load in the network, and provides the same output label for packets having the same destination address or the same level of QoS. That is, ATM cells from multiple VCs having different input labels are collected and the same VCs are allocated by providing the same output label to ATM cells having the same destination among the collected ATM cells.

1 illustrates the concept of conventional VC merging. As illustrated, ATM cells having different input labels may be provided to the router (LSR or LER) 100 through different nodes, and the router 100 may be Rather than outputting these cells in the order of input, they are collected in one IP packet unit and output. In the example of FIG. 1, if the ATM cells labeled 10 are provided through node A, and the ATM cells labeled 20 through node B, the router 100 buffers the ATM cells according to their connections regardless of the input order. When the storage of the ATM cells for one IP packet is completed, ATM cells of the stored IP packet are output in units of IP packets. Here, as described above, the same output label (30 in this embodiment) may be allocated to ATM cells having different input labels. Thus, cells output from the same router 100 are prevented from mixing with ATM cells of different IP packets, even if their output labels 30 are identical.

2 shows a block diagram of an apparatus for router 100 to perform VC merging. The VC merging device may be configured on an input side interface or an output side interface of a router. As shown, the VC merging device in the router 100 is composed of two cell segmentation and reassembly sublayers (SAR) units 110 and 120 and one controller 130. The SAR unit 110 includes a plurality of buffers therein, and configures an AAL frame for each VC by storing ATM cells provided for each VC in an internal buffer for each VC. It will be apparent to those skilled in the art that such an AAL frame eventually constitutes one IP packet. The SAR unit 110 provides the AAL frames to the controller 130 in units of frames, and the controller 130 changes the label of the input AAL frame to a predetermined value (30 in this embodiment) to the SAR unit 120. to provide.

The SAR unit 120 also includes a plurality of buffers, and stores the input AAL frames in a buffer for each label, divides the AAL frames stored in the buffer into ATM cells, and sequentially outputs the ATM cells in units of IP packets. Output sequentially.

Although VC merging is possible by the VC merging device of the above-described configuration, the conventional VC merging device has the following problems. That is, the conventional VC merging apparatus has a problem that the number of connections that can be accepted, that is, the number of VCs to be merged is limited to the number of buffers configured in the SAR units 110 and 130, thereby limiting the number of connections that can be processed simultaneously. have. The purpose of VC merging is to increase the number of acceptable connections by overlapping labels to avoid running out of labels in the LSR or LER. However, the conventional apparatus has a limitation in satisfying the basic purpose of VC merging because the number of connections is limited by the number of buffers in the SAR as described above. In addition, in order to perform the VC merging function, the conventional apparatus needs to perform a process in which the LSR and the LER perform an input ATM cell to the AAL layer to form an AAL frame and divide the AAL frame into ATM cells again. However, there is a problem that it takes a long time to perform the VC merging process.

The present invention has been made in view of the above, and an object of the present invention is to provide an apparatus in which routers in an MPSL network can perform a high speed VC merging function.

Another object of the present invention is to provide a method for routers in an MPSL network to perform a high speed VC merging function.

In order to achieve this object, the present invention provides a virtual channel merging device of a router in a multiprotocol label switch network, comprising: an input cell register for storing an input cell; A cell buffer having a data field capable of storing ATM cells and a link address field capable of storing link address information for each address; A pause address storage unit for storing idle address information not used in the cell buffer; An address table having a label field, a frame start address field and a frame end address field; Store ATM cells of the input cell register in the data field of the address of the cell buffer corresponding to the idle address of the idle address storage unit, and store the address of the cell buffer in which the next order ATM cells are stored as a link address. The address of the cell buffer in which the first ATM cell for each label is stored in the address table is stored in the frame start address field of the address table, and the address of the cell buffer in which the last ATM cell for each label is stored is the frame end address. When the input of the ATM cell constituting one frame is terminated, the corresponding label is stored in the first-in first-out buffer, and every predetermined period, the label in the cell buffer in which the ATM cell having the label stored in the first-in first-out buffer is stored. The address table and the cell buffer To read out from the address fields links the cell to the tag controller outputs the ATM cell in the address sequentially with; And a header converter configured to change the header information of the ATM cell output from the cell tag controller according to preset connection information.

The present invention also provides an input cell register for storing an input cell, a data buffer capable of storing ATM cells and a link address field capable of storing link address information for each address, and a dormant address not used in the cell buffer. Virtual channel merging of routers in a multiprotocol label switch network having an idle address storage for storing information and an address table having a label field, a frame start address field and a frame end address field. CLAIMS 1. A method of driving a cell tag controller in an apparatus, comprising: a first step of receiving a header in an ATM cell from an input cell register to determine whether the cell is the last cell in one frame; A second step of determining whether a label in a header of the ATM cell is stored in an address table if the ATM cell is not the last cell in one frame; If the label value in the header of the ATM cell is not stored in the address table, the label read from the header of the ATM cell is stored in the address table, and the idle address from the idle address storage is stored in the frame start address field and frame end address. A third step of storing each in a field; A fourth step of storing the ATM cell at an address of a cell buffer corresponding to a dormant address read from the dormant address storage; If the label in the header of the ATM cell is stored in the address table, the end address information stored in the frame end address field of the address table is read out, stored in an internal temporary address buffer, and the idle address information from the idle address storage unit is read. A fifth step of reading and storing the idle address information in the frame end address field; A sixth address of updating a link address of a link address field configured in an address in a cell buffer corresponding to a temporary address stored in the temporary buffer to the idle address, and storing an ATM cell from a temporary cell register at an address corresponding to the idle address; Steps; As a result of the determination of the first step, when the ATM cell is the last cell of one frame, the cell tag controller includes a seventh step of storing the corresponding label in an internal first-in first-out buffer and proceeding to step 3/5.

1 is a diagram illustrating a concept of virtual connection merging in a multiprotocol label switch network;

2 is a schematic block diagram of a conventional router that performs virtual connection merging in a multiprotocol label switch network;

3 is a block diagram of an apparatus for virtual channel merging of a router in a multiprotocol label switch network according to the present invention;

4 is a flowchart illustrating a virtual channel merging method of a router in a multiprotocol label switch network according to the present invention;

<Description of Symbols for Main Parts of Drawings>

210: input cell register 230: cell tag controller

250: address table 270: pause address storage unit

290: cell buffer 310: header converter

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

3 shows a VC merging circuit in an LSR embodying the present invention. As shown, the circuitry of the present invention includes an input cell register 210 that temporarily stores input ATM cells, and the VCI / VPI field value and payload in the header of the ATM cells temporarily stored in the input cell register 210. The type field value information is provided to the cell tag controller 230. The cell tag controller 230 determines whether a predetermined bit (third bit in this embodiment) in the payload type field in the ATM cell 22 is 1, and the label when the third bit of the payload type field is 1 Is stored in the internal first-in first-out buffer 231. Here, the third bit of the payload type field indicates whether the ATM cell is the last ATM cell of the divided AAL-5 frame when the AAL-5 frame is divided into multiple ATM cells as used in AAL-5 of the ATM. When the third bit is 1, it means that the ATM cell is the last cell of the AAL-5 frame. The LERs of the MPLS network convert one IP packet into one AAL-5 frame in order to convert the IP packet into an ATM cell. Therefore, an ATM cell having a third field of the payload type field of 1 is the last ATM cell of a given IP packet. do.

As illustrated, the cell tag controller 230 is connected to an address table 250, a dormant address storage unit 270, and a cell buffer 290, and the dormant address storage unit 270 is an address of the cell buffer 290. Among them, no information is stored, i.e., only an idle address is stored. The cell tag controller 230 reads the dormant address information in the dormant address storage unit 270 and stores the ATM cell of the input cell register 210 at an address in the cell buffer 290 corresponding to the read dormant address. Follow the same procedure. That is, the cell tag controller 230 operates in the following two modes depending on whether the label in the ATM cell header provided from the input cell register 210 is stored in the label field in the address table 250.

First, if there is no label of the header in the label field in the address table 250, the cell tag controller 230 may display a label value (eg, 10) in the header of the ATM cell as shown in FIG. 3A. In the label field, and one of the idle addresses (eg, 100) in the idle address storage unit 270 is read. The cell tag controller 230 stores the read idle address 100 in the frame start address field AS and the frame end address field AL of the address table 250, respectively, and provides the idle address storage 270. The ATM cell is stored in the address of the cell buffer 290 corresponding to the idle address. The cell buffer 290 includes a data field for storing data, that is, an ATM cell, and a link address field (AN), and includes a link address field (AN), a frame start address field (AS), and a frame end address field ( AL) will be described later.

Next, a case in which a label value (for example, 10) of an ATM cell header is present in a label field in the address table 250 will be described with reference to the examples of FIGS. 3A and 3B.

The cell tag controller 210 first reads the address 100 stored in the frame end address field AL in the address table 250 and stores the address 100 in the temporary address storage unit 232 as a temporary address AT. do. 3B, one idle address (for example, 105) is read from the idle address storage unit 270, and the value of the frame end address field AL in the address table 250 is updated to this address 105 value. .

Subsequently, the cell tag controller 230 converts the value of the link address field AN of the cell buffer 290 corresponding to the temporary address AT 100 stored in the temporary address storage unit 232 into the link address 105. In the idle address 105, the ATM cell is stored.

As can be seen from the above description, in the frame start address field AS in the address table 250, a cell buffer 290 in which ATM cells having the same label, that is, the first ATM cell among ATM cells constituting one frame, is stored. In the frame end address field AL, an address in the cell buffer 290 in which the last ATM cell is stored among the ATM cells constituting one frame is stored. The ATM cells from the input cell register 210 are stored in the cell buffer 290, but the address of the cell buffer 290, which stores ATM cells of the next sequence belonging to the same frame, is stored in the link address field (AN). do.

4 is a flowchart illustrating a process in which ATM cells are stored in the cell buffer 290 by the cell tag controller 210.

As shown, the cell tag controller 230 inputs the header from the input cell register 210 and analyzes whether the third bit of the payload type field is 1 (S1) to determine whether it is the last cell in one frame. (S2). As a result of the determination of step S2, if it is not the last cell in one frame, it is determined whether it is the first cell in one frame (S3). If it is the first cell, it is step S4. Proceed to S6). As described above, it can be easily seen from the foregoing description that the first cell in one frame can be determined horizontally in which the label in the header is stored in the address table 250.

As a result of the determination of step S3, when the ATM cell is the first cell in one frame, the cell tag controller 230 stores the label value read from the header of the ATM cell in the address table 250, and the idle address storage unit ( The idle address from 270 is stored in the frame start address field AS and the frame end address field AL, respectively. Thereafter, the cell tag controller 230 stores the ATM cell at an address of the cell buffer 290 corresponding to the dormant address read from the dormant address storage unit 270 (S5).

However, when it is determined in step S3 that the cell tag controller 230 is not the first cell, the cell tag controller 230 reads the end address information stored in the frame end address field AL of the address table 250 so that the internal temporary address buffer ( 232) as a temporary address (AT). The cell tag controller 230 reads the idle address information from the idle address storage unit 270, stores the idle address information in the frame end address field AL (S6), and stores the temporary address buffer ( The link address of the link address field stored in the address of the cell buffer 290 corresponding to the temporary address AT stored in 232 is updated with the idle address, and the temporary cell register 210 is stored in the address corresponding to the idle address. Store the ATM cell (S7).

On the other hand, when the determination result in step S2, when the ATM cell is the last cell of one frame, the cell tag controller 230 stores the label value in the internal first-in first-out buffer 231, and proceeds to step S3. .

As can be seen from the above description, ATM cells constituting one frame are stored in the cell buffer 290, and the addresses of the first ATM cell and the last ATM cell of the IP packets of the ATM cells stored in the cell buffer 290. The information is stored in the frame start address field AS and the frame end address field AL in the address table 259, respectively. In addition, the link address field AN of the cell buffer 290 stores the address of the cell buffer 290 in which the ATM cells next to the ATM cells stored in the cell buffer 290 are stored.

ATM cells stored in the cell buffer 290 by the above-described process are sequentially outputted among ATM cells having the same label value, that is, one frame unit, through the following process. That is, the cell tag controller 230 reads a label value stored in the first-in first-out buffer 231 at every predetermined period, and detects the read label value in the address table 250. Then, the start address in the frame start address field AS corresponding to the label is read, and the ATM cell in the cell buffer 290 stored in the read start address is read. In addition, all ATM cells constituting one frame are sequentially outputted by sequentially reading an ATM cell stored at an address stored in the link address field AN of the read ATM cell.

ATM cells output through the above-described process are provided to the header converter 310 as shown, and the header converter 310 changes the label in the header of the ATM cell by using connection information stored in the provided ATM cells. In addition, the payload type field information is updated.

As described above, the present invention has an effect that VC merging can be performed regardless of the number of connections by increasing the capacity of the cell buffer and the address table. In particular, in the conventional method of processing the AAL layer by processing all the VC merging at the ATM layer. In comparison, the VC merging can be speeded up.

Claims (5)

A virtual channel merging device of a router in a multiprotocol label switch network, An input cell register for storing an input cell; A cell buffer having a data field capable of storing ATM cells and a link address field capable of storing link address information for each address; A pause address storage unit for storing idle address information not used in the cell buffer; An address table having a label field, a frame start address field and a frame end address field; Store ATM cells of the input cell register in the data field of the address of the cell buffer corresponding to the idle address of the idle address storage unit, and store the address of the cell buffer in which the next order ATM cells are stored as a link address. The address of the cell buffer in which the first ATM cell for each label is stored in the address table is stored in the frame start address field of the address table, and the address of the cell buffer in which the last ATM cell for each label is stored is the frame end address. In the field, when the input of the ATM cell constituting one frame is finished, the corresponding label is stored in the first-in first-out buffer, and the label in the cell buffer in which the ATM cell having the label stored in the first-in first-out buffer is stored every predetermined period. The address table and the cell buffer To read out from the address fields links the cell to the tag controller outputs the ATM cell in the address sequentially with; And a header converter for changing the header information of the ATM cell outputted from the cell tag controller according to preset connection information. The method of claim 1, And the cell tag controller is configured to determine whether the last ATM cell constitutes one frame using the third bit of the payload field of the ATM cell header. An input cell register storing an input cell, a data buffer capable of storing ATM cells, a link address field capable of storing link address information, and a cell buffer configured for each address, and storing idle address information not used in the cell buffer; Cell tag in a virtual channel merging device of a router in a multiprotocol label switch having an idle address storage and an address table having a label field, a frame start address field and a frame end address field As a driving method of the controller, Receiving a header in an ATM cell from an input cell register to determine whether it is the last cell in one frame; A second step of determining whether a label in a header of the ATM cell is stored in an address table if the ATM cell is not the last cell in one frame; If the label value in the header of the ATM cell is not stored in the address table, the label read from the header of the ATM cell is stored in the address table, and the idle address from the idle address storage is stored in the frame start address field and frame end address. A third step of storing each in a field; A fourth step of storing the ATM cell at an address of a cell buffer corresponding to a dormant address read from the dormant address storage; If the label in the header of the ATM cell is stored in the address table, the end address information stored in the frame end address field of the address table is read out, stored in an internal temporary address buffer, and the idle address information from the idle address storage unit is read. A fifth step of reading and storing the idle address information in the frame end address field; A sixth address of updating a link address of a link address field configured in an address in a cell buffer corresponding to a temporary address stored in the temporary buffer to the idle address, and storing an ATM cell from a temporary cell register at an address corresponding to the idle address; Steps; As a result of the determination of the first step, when the ATM cell is the last cell of one frame, the cell tag controller stores the label in the internal first-in first-out buffer and includes a seventh step of proceeding to step 3/5. Virtual channel merging method of router in label switch network. The method of claim 3, wherein The first step is to determine whether the last ATM cell constituting one frame using the third bit of the payload field of the ATM cell header virtual channel merging method of a router in a multi-protocol label switch network. The method according to claim 3 or 4, An eighth step of reading a label stored in the first-in, first-out buffer when a predetermined period is reached; A ninth step of detecting the read label value in an address table to read a start address in a frame start address field AS corresponding to the corresponding label; A tenth step of sequentially reading an ATM cell in a cell buffer stored at the read start address and sequentially reading an ATM cell stored at an address stored in a link address field (AN) of the read ATM cell; Virtual channel merging method of a router in a multi-protocol label switch network comprising a.