KR20030077714A - Apparatus for duplexing output of main and OTD in transmission board of base station using DSP - Google Patents

Abstract

PURPOSE: An apparatus for duplicating main and OTD(Orthogonal Transmit Diversity) outputs, using a DSP(Digital Signal Processor), in a transmission board of a base station is provided to control an internal channel of the DSP in the transmission board, connect one DSP to two digital/analog converters, and operate two paths in one DSP. CONSTITUTION: A control unit(100) controls the entire operation of a system and a transmission output path. An FPGA(Field Programmable Gate Array)(110) transmits CDMA(Code Division Multiple Access) data to a main DSP(120) or an OTD DSP(130) according to a control signal outputted from the control unit(100). The main DSP(120) and the OTD DSP(130) receive a signal outputted from the FPGA(110) according to the decision of the control unit(100), and process the received signal as a digital signal. A digital/analog selector buffer(140) selects whether outputting signals outputted from the main DSP(120) and the OTD DSP(130) to certain digital/analog converters among a plurality of digital/analog converters(150-180) according to a control signal of the control unit(110). A plurality of the digital/analog converters(150-180) convert digital signals outputted by the selection of the digital/analog selector buffer(140) into analog signals, and transmit the analog signals to the first and second main transmission path units(190,200) or the first and second OTD transmission path units(210,220). A power sensing unit(230) monitors the first main transmission path unit(190) and the first OTD transmission path unit(210), and transmits the monitored result to the FPGA(110), when outputs of the first main transmission path unit(190) and the first OTD transmission path unit(210) do not exist by the abnormal operation of the main DSP(120) and the OTD DSP(130).

Description

Apparatus for duplexing output of main and OTD in transmission board of base station using DSP}

The present invention relates to a transmission board in a mobile communication base station. More specifically, a transmission board using a DSP (Digital Signal Processor) provides flexibility in controlling a DSP internal channel and connecting two digital converters to one DSP. In addition, the present invention relates to a main and an Othogonal Transmit Diversity (DOT) output redundancy device using a DS on the base station transmission board to enable two paths to one DSP.

In general, the base station of a mobile communication system is composed of a switching system and a plurality of cell devices. This includes many unit functional devices that make up the system, and these devices are implemented with various types of equipment.

1 is a configuration diagram schematically showing a base station of a general mobile communication system.

As shown in FIG. 1, antennas 11 and 12 and 13 installed outdoors, a transmission and reception filter and a low noise amplifier 20 installed indoors, a high output amplifier 30 and a noise generator 40 And a transceiver receiver 50, a GPS receiver 60, a digital receiver 70, a base station controller 80, and a monitoring device 90.

In the base station configured as described above, the transmission signal output from the transceiver self 50 at the forward link is amplified by the high output amplifier 30 and then transmitted and received through the transmission and reception filter and the transmission filter in the low noise amplifier 20 (11) Is sent through.

In addition, the reverse link is received through the reception antennas 12 and 13 installed outdoors, and the received signal passes through a reception filter in the indoor transmission and reception filter and the low noise amplifier 20, and then is predetermined by the low noise amplifier 20. After being amplified to the level it is delivered to the transceiver itself 50.

Here, the transceiver itself 50 converts the IF signal output from the digital shelf 70 into UHF, and inversely converts the received UHF signal into an IF signal.

Meanwhile, the digital shelf 70 and the transceiver self 50 are monitored and controlled by the monitoring device 90 and the base station controller 80.

Here, the monitoring device 90 monitors and adjusts the internal situation of the other cards in the rack as well as the connection card inside the transceiver shelf 50.

The base station controller 80 includes two 33 MHz i386 PCs that monitor and control the base station.

In addition, the base station controller 80 monitors the functional devices belonging to maintain the operating state of the base station, the allocation and adjustment of resources for call traffic, the collection of statistical information about the base station operation, the detection of the detected failure state, Distribute part of the timing.

On the other hand, the transmission and reception filter and the low noise amplifier 20 is installed on the receiving board (Rx Board), the high power amplifier 30 is installed on the transmission board (Tx Board).

The transmission board uses a digital signal processor (DSP) composed of four channels, where one DSP can handle only one field programmable (FA).

However, two DSPs are required for each FA to process two paths of the main path and the OTD (Othogonal Transmit Diversity) path, and the DSP status of either the main or OTD path is bad during system operation. In this case, there was a problem that the entire operation of the system was stopped.

In particular, in order to solve the above problems, conventionally, a plurality of transmission boards are mounted in case of emergency. However, this raises the unit cost of the entire system and has a problem of low efficiency.

In addition, since the channel inside the DSP could not be flexibly controlled, there was a problem in that the transmission board had to be redesigned because the DSP could not change the shape or frequency of the designed DSP.

Therefore, there is a problem in that cost and development period are consumed whenever the shape of the transmission board is changed.

Accordingly, an object of the present invention is to provide a fluid control of a DSP internal channel in a transmission board using a DSP, and to provide two digital converters in one DSP. In addition, it provides a main and ortidi output redundancy device using DS on the base station's transmission board to enable two pass operation in one DSP.

Features of the main and ortidi output redundancy using the DS in the base station transmission board according to the present invention for achieving the above object,

In the main and ortidi output redundancy apparatus using DS on the transmission board of the base station,

A control unit controlling the overall operation of the system and a transmission output path;

A Field Programmable Gate Array (FPGA) that receives the control signal output from the controller and connects the CDMA data to a corresponding DSP (main DSP, or OTD (Othogonal Transmit Diversity) DSP);

A main DSP and an OTD DSP for receiving a signal output from the FPGA and processing the received signal as a digital signal according to a determination of the controller;

A digital / analog selector buffer for selecting which digital / analog converter to output the signals output from the main DSP and the OTD DSP according to the control signal of the controller;

A plurality of digital to convert the digital signal output according to the selection of the digital / analog selector buffer to an analog signal to be transmitted to the first main transmission path section, the second main transmission path section or the first ODT transmission path section, the second ODT transmission path section An analog converter;

When the output does not come out due to abnormal operation of the DSPs (main DSP and OTD DSP), the first main transmission path unit and the first ODT transmission path unit are monitored, and a power detection unit for transmitting an output or no path to the FPGA is configured. .

1 is a schematic view showing a base station of a general mobile communication system,

2 is a block diagram showing a main and ortidi output duplication apparatus using a DS in the base station transmission board according to the present invention,

3 is a detailed configuration diagram illustrating the power detection unit of FIG. 2;

FIG. 4 is a diagram illustrating the interior of the DSP of the main and OTDs of FIG.

5 is a configuration diagram of another temporary example showing a main and ODI output duplication apparatus using a DS in the base station transmission board according to the present invention.

<Explanation of symbols for the main parts of the drawings>

100: control unit

110: FPGA

120: main DSP

130: OTD DSP

Hereinafter, with reference to the accompanying drawings a preferred embodiment of the main and OTDI output redundancy device using the DS in the base station transmission board according to the present invention.

Figure 2 is a block diagram showing a main and ortidi output duplication apparatus using a DS in the base station transmission board according to the present invention.

As shown in FIG. 2, the control unit 100 controls the overall operation of the system and a transmission output path, receives control signals output from the control unit 100, and receives CDMA data into a corresponding DSP (main DSP, OTD (Othogonal Transmit) Diversity (DSP) (120) (130) connected to the Field Programmable Gate Array (FPGA) 110, and the signal output from the FPGA 110 in accordance with the determination of the controller 100 receives the received signal 4 digital signals which will be described later by the main DSP 120 and the OTD DSP 130 for processing the signals as digital signals, and the signals output from the main DSP 120 and the OTD DSP 130 according to the control signals of the controller 100. Digital / Analog Selector Buffer 140 for selecting which digital / analog converters 150, 160, 170, 180 to be output to the / analog converters 150, 160, 170, 180 And digitally output the digital signal output according to the selection of the digital / analog selector buffer 140. A plurality of digital / analog converters which are converted to a call and transmitted to the first main transmission path unit 190, the second main transmission path unit 200, or the first ODT transmission path unit 210 and the first ODT transmission path unit 220. 150, 160, 170, 180 and the first main transmission path unit 190 and the first ODT transmission path unit 210 when the output does not come out due to abnormal operation of the DSP 120, 130 In addition to monitoring the output is configured as a power detection unit 230 for transmitting the output path to the FPGA (110).

The power detection unit will now be described with reference to FIG. 3.

3 is a detailed configuration diagram illustrating the power detection unit of FIG. 2.

As shown in FIG. 3, the power detector 230 converts an AC component of an amplification unit 230-1 that generates an amplified signal and a signal amplified and output from the amplification unit 230-1 into a direct current. The rectifier circuit 230-3, and a detector 230-5 for detecting a signal input to the rectifier circuit 230-3 and transmitting the detected signal to the FPGA 110.

Referring to the operation of the main and ortidi output duplication apparatus using the DS in the base station transmission board according to the present invention configured as described above are as follows.

First, the FPGA 110 receives a control signal output from the controller 100 and generates CDMA data to control a channel of a corresponding DSP (main DSP, OTD (Othogonal Transmit Diversity) DSP) 120, 130. .

Accordingly, the main DSP 120 and the OTD DSP 130 receive a signal output from the FPGA 110 and process the received signal as a digital signal to transmit an output signal to the digital / analog selector buffer 140. do.

In addition, the digital / analog selector buffer 140 may include four digital / analog converters 150 to be described below to output signals from the main DSP 120 and the OTD DSP 130 according to a control signal of the controller 100. One of the 160, 170, and 180 is selected, and an output signal is transmitted to the selected digital / analog converter 150, 160, 170, or 180.

The digital / analog converters 150, 160, 170, and 180 convert the digital signal output according to the selection of the digital / analog selector buffer 140 into an analog signal and thus, the first main transmission path unit 190. ), The second main transmission path unit 200, the first ODT transmission path unit 210, and the second ODT transmission path unit 220.

In addition, when the power detection unit 230 is connected to the first main transmission path unit 190 and the first ODT transmission path unit 210 and no output occurs due to abnormal operation of the DSP 120 and 130, The first main transmission path unit 190 and the first ODT transmission path unit 210 are monitored and the result is transmitted to the FPGA 110.

On the other hand, in the normal operation of the DSP (120) 130, the three main DSPs are responsible for the 3FA, the output comes out through the digital / analog converter connected to the main transmission path portion, and the three OTD DSPs are responsible for the 3FA OTD The output comes through the digital / analog converter connected to the transmission path.

4, two main transmission channels (CH A, CH B) 240 and 250 and two OTD transmission channels (CH C and CH D) 260 (in one DSP). 270) and an adder 280 that adds waveforms output from the channels CH A, CH B, CH C, and CH D, and includes CH A, CH B, CH C, and CH D in the DSP. Use all If the output does not come out due to abnormal operation of the DSP in the main transmission path part, the power detector 230 monitoring the main transmission path part and the OTD transmission path part does not output the information of the main transmission path part FPGA 110. ), And the FPGA 110 receives the set value of the main transmission path part of which the output does not come out immediately to the OTD transmission path part of the output.

Therefore, two of the 4CHs of the DSP used in the OTD transmission path portion are allocated to the main transmission path portion and the remaining 2CHs are allocated to the OTD transmission path portion.

Meanwhile, the operation of the power detection unit will be further described with reference to FIG. 3.

First, the amplifier 230-1 amplifies the signal and then outputs the amplified signal to the rectifier circuit 230-3.

The rectifier circuit 230-3 pulls up an AC component to a DC having a constant value in the amplified signal output from the amplifier 230-1. At this time, it is changed to information that can be divided into high or low according to the pull-up.

Accordingly, the power detector 230 checks whether the paths of the first main transmission path unit 190 and the first ODT transmission path unit 210 are normal or abnormal according to the pull-up signal, and checks the result of the FPGA. Transmit to 110.

5 is a configuration diagram of another temporary example showing a main and ODI output duplication apparatus using a DS in the base station transmission board according to the present invention.

As shown in FIG. 5, an adder 300 for adding a waveform output from a channel, two main channels (CH A, CH B) 310, 320 and a plurality (CH C) connected to the adder 300. And the DSP 400 having the channels 330 and 340 of CH D, and the digital signal output from the adder 300 of the DSP 400 into an analog signal and converting the converted analog signal into a main transmission path. It is connected between the digital / analog converter 600 and the digital / analog converter 600 and the main transmission path unit 500 for transmission in the 500 pass, and outputs from the digital / analog converter 600. It is composed of a feedback block 700 for feeding back the signal to the CH C, CH D (330) 340 of the DSP.

Referring to the operation of the main and ortidi output duplication apparatus using the DS in the base station transmission board configured as described above are as follows.

First, the adder 300 of the DSP 400 receives and adds waveforms output from the channels (CH A, CH B, CH C, CH D) 310, 320, 330, 340, and adds them. The signal is output to the digital / analog converter 600.

The digital / analog converter 600 converts the input digital signal into an analog signal, and then transmits the converted analog signal to the main transmission path unit 500.

In this case, some of the signals output from the digital / analog converter 600 are input to the CH C and CH D 330 and 340 of the DSP through the feedback block 700.

Therefore, the above operation normally operates four channels, but when the quality of the waveform is deteriorated to some extent, the existing output is switched to two channels.

At this time, the bad waveform is fed back to the remaining two channels, filtered again, and summed at the final adder stage to obtain an improved query output.

As described above, the present invention can maintain system operation without any problem by processing two passes with one pass DSP during abnormal path and disconnection of the DSP which may occur during operation of the main transmission path section and the OTD transmission path section. It works.

In addition, by implementing redundancy by utilizing the existing DSP, it is possible to reduce the cost and stabilize the system.

In particular, if a factor that interrupts the use of the DSP occurs and affects the overall output, the existing main or OTD uses four channels inside the DSP for each pass to the main and OTDs. Only one of the main pass DSP and the OTD pass DSP is able to process the output continuously.

Claims (4)

In the main and ortidi output redundancy device using DS in the base station transmission board, A control unit controlling the overall operation of the system and a transmission output path; A Field Programmable Gate Array (FPGA) that receives the control signal output from the controller and connects the CDMA data to a corresponding DSP (main DSP, or OTD (Othogonal Transmit Diversity) DSP); A main DSP and an OTD DSP for receiving a signal output from the FPGA and processing the received signal as a digital signal according to a determination of the controller; A digital / analog selector buffer for selecting which digital / analog converter to output the signals output from the main DSP and the OTD DSP according to the control signal of the controller; A plurality of digital to convert the digital signal output according to the selection of the digital / analog selector buffer to an analog signal to be transmitted to the first main transmission path section, the second main transmission path section or the first ODT transmission path section, the second ODT transmission path section An analog converter; When the output does not come out due to abnormal operation of the DSPs (main DSP and OTD DSP), the first main transmission path part and the first ODT transmission path part are monitored, and a power detection part for transmitting a path without output is provided to the FPGA. Main and OTDI output redundancy device using DSP in base station transmission board. The method of claim 1, The power detection unit, An amplifier for generating an amplified signal; A rectifier circuit for converting an AC component of a signal amplified and output from the amplifier into a direct current; And a detector for detecting a signal input to the rectifier circuit and transmitting the detected signal to an FPGA. The method of claim 1, The DSP, Two main transmission channels (CH A, CH B) for generating a waveform; Two OTD transmission channels (CH C, CH D) for generating a waveform; The main and ortidi output redundancy apparatus using the DSP in the base station transmission board, characterized in that the adder for adding the waveform output from each channel (CH A, CH B, CH C, CH D). In the main and ortidi output redundancy device using DS in the base station transmission board, A DSP having an adder for adding a waveform output from the channel and two main channels (CH A, CH B) and a plurality of channels (CH C, CH D) connected to the adder; A digital / analog converter for converting a digital signal output from the adder of the DSP into an analog signal and transmitting the converted analog signal to a main transmission path part; A feedback block connected between the digital / analog converter and the main transmission path part to feed back a signal output from the digital / analog converter to CH C and CH D of the DSP. Main and OTDI output redundancy using DS.