KR20030055722A - Operation circuit of switched reluctance motor - Google Patents

Abstract

PURPOSE: A driver circuit is provided to be capable of reducing a cost and a layout of the driver circuit by performing a comparison operation of sequential and continuous pulse signals without using logic elements. CONSTITUTION: A control part(70) generates a plurality of sequential pulse signals having a predetermined phase difference and a plurality of continuous pulse signals having a predetermined duty. A modulation part(80) compares voltages of the continuous and sequential pulse signals and outputs a high signal when voltages of the continuous pulse signals are higher than those of the sequential pulse signals. An inverter part(90) becomes on/off according to an output signal of the modulation part and controls flow of a current supplied to a motor. A power supply part(100) supplies a current to the motor by the inverter part, and a current sensing part(110) senses a current supplied to the motor by the power supply part. A current limiting part(120) prevents a current from flowing from the power supply part to the motor when a magnitude of the sensed current is over a reference value.

Description

Operation circuit of switched reluctance motor

The present invention relates to a drive circuit of a switched reluctance motor, and more particularly, to control the current supplied according to the phase of the switched reluctance motor and to cut off the current supplied when the overcurrent is supplied to the switched reluctance motor, thereby preventing damage to the motor. It relates to a drive circuit of a switched reluctance motor to be prevented.

1 is a circuit diagram showing a driving circuit of a switched reluctance motor according to the prior art.

As shown in FIG. 1, the driving circuit of the switched reluctance motor according to the related art has a phase difference set according to the phase of the motor 2, and has a plurality of sequential pulse signals and a constant duty which are sequentially generated. The control unit 10 generates a continuous pulse signal, and the modulator 20 generates a high signal when both the sequential pulse signal and the continuous pulse signal are high signals through a logical operation. And an inverter unit 30 for turning on / off a current supplied to the motor by using a plurality of transistors Q1 to Q8 turned on / off by a signal generated from the modulator 20, and the motor. (2) a power supply unit 40 for supplying current, a current sensing unit 50 for sensing the magnitude of the current supplied by the power supply unit 40, and the current sensed by the current sensing unit It is composed of a current limiting unit 60 which is operated when the size is greater than the reference value to block the supply of current from the power supply unit 40 to the motor 2.

When the phase of the motor consists of A phase, B phase, and C phase, the control unit 10 receives a sequential pulse signal having a phase difference set according to each phase from the first, second, and third pulse terminals 11, 12, and 13; The continuous pulse signal is generated from the fourth pulse terminal 14.

The modulator 20 may include first, second, and third AND gates 21, 22, and 23 through which sequential pulse signals generated from the first to third pulse terminals 11, 12, and 13 are input; A plurality of resistors R1 and R2 connected in parallel between the first to third AND gates 21, 22, and 23 and the first to third pulse terminals 11, 12, and 13, respectively, to adjust the current; And a power supply terminal 24 configured to supply power to allow the first to third AND gates 21, 22, and 23 to be operated.

In addition, the continuous pulse signal generated from the fourth pulse terminal 14 is input to the first to third AND gates 21, 22, and 23 through a plurality of resistors R4 and R5 connected in series and in parallel. When the sequential pulse signal and the continuous pulse signal generated from the first to third pulse terminals 11, 12, and 13 are both high signals, the high signals are emitted from the first to third AND gates 21, 22, and 23. Is output.

The inverter unit 30 includes a plurality of resistors R6, R7, and R8 connected to the modulator 20, and a plurality of transistors Q1 to Q6, and the plurality of transistors Q1 to Q6. And field effect transistors Q7, Q8, and Q9 connected to the power supply 40 through the resistors R9, R10, and R11.

The power supply unit 40 rectifies an external AC power supply 41 to supply the motor 2 with a plurality of transistors Q10, Q11 and Q12, resistors R12 to R23, and capacitors C1 and C2. , C3) and diodes D1-D6.

The current sensing unit 50 includes a plurality of resistors R24, R25, and R26 connected to the field effect transistors Q7, Q8, and Q9 of the inverter unit 30, and the field effect transistors Q7, Q8, When Q9) is turned on, the current supplied from the power supply unit 40 to the motor 2 also flows to the resistors R24, R25, and R26 to sense the magnitude of the supplied current.

Lastly, the current limiter 60 compares the magnitude of the current sensed by the current detector 50 with a reference value and generates a high signal when the magnitude of the current sensed by the current detector is large. ), A transistor Q13 that is turned on / off by an output signal of the comparator 61, and an operating power supply terminal 62 or 63 to which power for operating the comparator 61 and the transistor Q13 is supplied. ), And a plurality of resistors R27 to R33, a diode D7, and a capacitor C4 connected in series or in parallel with the comparator 61 and the transistor Q13, in the current sensing unit 50 When the magnitude of the sensed current is greater than or equal to the reference value, the continuous pulse signal of the fourth pulse terminal 14 is prevented from being input to the first to third ANDs 21, 22, and 23, and thus the power supply unit 40 It blocks the supply of current to the motor 2.

Figure 2 is a graph showing the operating waveform of the switched reluctance motor according to the prior art.

Referring to the operation of the switched reluctance motor according to the prior art configured as described above are as follows.

First, as shown in (a), (b) and (c) of FIG. 2, when the phase of the motor is composed of A phase, B phase and C phase, a sequential pulse signal having a set phase difference is generated. To third pulse terminals 11, 12, and 13.

In the fourth pulse terminal 14, as shown in FIG. 2 (d), pulses having a constant duty are continuously generated.

In this case, the sequential pulse signals generated from the first to third pulse terminals 11, 12, and 13 and the continuous pulse signals generated from the fourth pulse terminal 14 may be divided into the first and third AND gates 21,. 22, 23).

Here, (e) of FIG. 2 when the sequential pulse signal generated from the first to third pulse terminals 11, 12 and 13 and the continuous pulse signal generated from the fourth pulse terminal 14 are both high signals. As shown in (f) and (g), high signals are sequentially generated from the first to third AND gates with a set phase difference.

As the plurality of field effect transistors Q7, Q8, and Q9 are sequentially turned on / off according to signals generated from the first to third AND gates 21, 22, and 23, the power supply unit 40 The current is supplied to the motor 2.

On the other hand, when the current supplied to the motor 2 is detected by the current sensing unit 50 is input to the current limiting unit 60, the magnitude of the current input to the current limiting unit 60 is greater than the reference value The transistor Q13 of the current limiting unit 60 is turned on and the pulse signal generated from the fourth pulse terminal 14 is inputted to the transistor Q13 to provide the first to third AND gates 21 and 22. , 23) the high signal is not output.

However, the driving circuit of the switched reluctance motor according to the related art uses the AND gate, which is a logic circuit element, to compare the magnitude of the continuous pulse signal and the sequential pulse signal generated by the controller 10. When the furnace is designed, a separate space for mounting the AND gate is required, which increases the size of the driving circuit and increases the cost.

The present invention has been made to solve the above-described problems of the prior art, the object of which is to add the function of comparing the magnitude directly without using a logic operation element when comparing the magnitude of the sequential and continuous pulse signal generated from the control unit By replacing the use of a separate element in the drive circuit to reduce the layout of the drive circuit and to provide a drive circuit of the switched reluctance motor that the cost is reduced because no logic operation element is used.

1 is a circuit diagram showing a driving circuit of a switched reluctance motor according to the prior art;

2 is a graph showing the operation of a switched reluctance motor according to the prior art;

3 is a circuit diagram showing a driving circuit of a switched reluctance motor according to the present invention;

4 is a graph showing the operation of the switched reluctance motor according to the present invention.

<Explanation of symbols on main parts of the drawings>

70: controller 80: modulator

90: inverter unit 100: power supply unit

110: current sensing unit 120: current limiting unit

According to a characteristic of the driving circuit of the switched reluctance motor according to the present invention for solving the above problems, it has a set phase difference to drive the motor and has a plurality of sequential pulse signals and constant duty generated sequentially A control unit for generating a continuous pulse signal generated by the control unit, a modulator for outputting a high signal when the continuous pulse signal is large by comparing the voltage magnitude of the continuous pulse signal and the sequential pulse signal generated by the control unit, and the modulation An inverter unit that is turned on / off according to a negative output signal to turn on / off a current supplied to the motor, a power supply unit supplying current to the motor by the inverter unit, and a power supply unit supplied to the motor Current sensing unit for sensing the current and the magnitude of the current sensed by the current sensing unit is more than the reference value If current limiting portion that prevents the power supply from which current is supplied to the motor consists of the configuration.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a circuit diagram showing a driving circuit of the switched reluctance motor according to the present invention.

In the driving circuit of the switched reluctance motor according to the present invention, as shown in FIG. 3, the first, second and third pulse terminals 71, in which a sequential pulse signal having a phase difference set according to the phase in which the motor operates, are generated. 72, 73) the control unit 70 is formed with a fourth pulse terminal 74 for generating a continuous pulse signal having a constant duty, the first to third pulse terminals (71, 72, 73) and the A modulator 80 for outputting a high signal when the signals of the first to third pulse terminals 71, 72, and 73 are large by comparing the signals generated by the fourth pulse terminal 74, respectively; Inverter unit 90 including a plurality of push-pull units 91, 92, and 93 that are turned on / off according to a signal generated by 80, and the plurality of push-pull units ( Power supply unit 100 for supplying the current according to the 91, 92, 93 is turned on / off, and from the power supply unit 100 The current sensing unit 110 for sensing the magnitude of the current supplied to the motor 2, and when the magnitude of the current sensed by the current sensing unit 110 is greater than the reference value to operate the motor in the power supply unit 100 It consists of a current limiting unit 120 for blocking the supply of current to (2).

Here, the modulator 80 may include a backflow prevention part 81 including a plurality of diodes D8, D9, and D10 to prevent backflow of a signal, and the first through the second backflow prevention part 81. The first level limiter 82 limits the level of the sequential pulse signal generated from the three pulse terminals 71, 72, and 73, and the inverting (-) terminal has a level set by the first level limiter 82. A plurality of comparators in which the sequential pulse signals of the limited first to third pulse terminals 71, 72, and 73 are input, and the continuous pulse signal generated from the fourth pulse terminal 74 is input to the non-inverting (+) terminal. It consists of the comparison part 83 which consists of 83a, 83b, 83c.

In addition, the modulator 80 further includes a second level limiter 84 for limiting the level of the continuous pulse signal generated from the fourth pulse terminal 74.

In this case, the first level limiter 82 includes first, second, and third resistors 82a, 82b, and 82c, and the first, second, and third resistors 82a, 82b, and 82c. ) Is composed of a plurality of resistors R35 to R40 connected in parallel, respectively, and the first to third resistors 82a, 82b, and 82c respectively include the first to third pulse terminals 71, 72, and 73. Resistance level of the first to third resistors 82a, 82b, and 82c, respectively, to prevent the level of the sequential pulse signal generated from , R37, R38).

The first level limiter 82 generates a sequential pulse signal generated from the first to third pulse terminals 71, 72, and 73 having a low level of 0 volts and a high level of 5 volts. The level is limited to 1.4 volts as low and 5 volts as high.

The second level limiter 84 includes a plurality of resistors R41 and R42 connected in series and in parallel with the fourth filter terminal 74, and passes through the first level limiter 82. In order to be able to compare magnitude with a sequential pulse signal, the level of the signal is limited to 0 volts as low level and 2.5 volts as high level.

Accordingly, the comparator 83 passes the first level limiter 82 and sequentially generates the sequential pulse signal and the second level generated from the first to third pulse terminals 71, 72, and 73. When the magnitude of the continuous pulse signal is large by comparing the magnitudes of the continuous pulse signals passing through the limiter 84 in the first to third comparators 83a, 83b, and 83c, respectively, the first to third comparators 83a. , 83b, 83c), a high signal is output.

In addition, the comparator 83 is provided with an operating power source 85 to which the operating power of the first to third comparators 83a, 83b, and 83c is supplied.

The inverter unit 90 supplies the power supply unit 100 through a plurality of transistors Q14 to Q19 connected to the comparison unit 83, the plurality of transistors Q14 to Q19, and resistors R45, R46, and R47. ) And a plurality of field effect transistors Q20, Q21, and Q22 connected to each other, and the power supplied from the operating power terminal 85 formed in the comparator 83 is supplied to the plurality of transistors Q14 to Q19. It is supplied via resistors R42, R43 and R44.

On the other hand, the power supply unit 100 is connected to a plurality of field effect transistors (Q20, Q21, Q22) included in the inverter unit 90 so that the plurality of field effect transistors (Q20, Q21, Q22) on / off. As a result, a plurality of PNP transistors Q24, Q25, and Q26 are connected to the transistors Q23, Q24, and Q25 so that an AC power source 101 input from an external source can be rectified and supplied to the motor 2. (R48 to R59), capacitors C5, C6, and C7, and diodes D11 to D16.

The current sensing unit 110 includes a plurality of resistors R60, R61, and R62 connected to the plurality of transistors Q20, Q21, and Q22 connected between the inverter unit 90 and the power supply unit 100. When the plurality of field effect transistors Q20, Q21, and Q22 are turned on, current supplied from the power supply unit 100 also flows to the resistors R60, R61, and R62, so that the current supplied to the motor 2 The size can be detected.

The current limiting unit 120 receives a current sensed by the current sensing unit 110 at a non-inverting (+) terminal, and a reference value is inputted to an inverting (-) terminal so that the current of the current sensing unit 110 is input. If large, a comparator 121 for outputting a high signal, a transistor Q26 connected to an output terminal of the comparator and being turned on when a high signal is output from the comparator 121, the comparator 121, and the transistor Q26. Diodes D17 and capacitors C8 connected in series and in parallel, a plurality of resistors R63 to R69 connected to the comparator 121 and transistor Q26, and the transistors Q26, respectively. And a plurality of power supply terminals 122 and 123 for supplying a bias power and supplying a reference value input to the inverting (-) terminal of the comparator 121.

Looking at the operation of the drive circuit of the switched reluctance motor according to the present invention configured as described above are as follows.

First, as shown in (a), (b) and (c) of FIG. 4, when the motor is a three-phase motor having A phase, B phase and C phase, the sequential pulse signal having a set phase difference is the first. To third pulse terminals 71, 72, and 73 in order.

In the fourth pulse terminal 74, a continuous pulse signal having a constant duty is generated as shown in FIG. 4 (d), and is generated from the first to third pulse terminals 71, 72, and 73. The signal to be generated is inverted.

The sequential pulse signals generated from the first to third pulse terminals 71, 72, and 73 pass through the backflow prevention unit 81, and the voltage level of the pulse signal is 1.4 by the first level limiter 82. The level is adjusted to a signal having a magnitude of 5 to 5 volts, and the signal generated by the fourth pulse terminal 74 is a voltage of 0 to 2.5 volts by the second level limiting unit 84. The level is adjusted to a signal having a magnitude.

Pulse signals whose levels are adjusted by the first level limiter 82 and the second level limiter 84 are input to the first to third comparators 83a, 83b, and 83c.

At this time, the magnitudes of the continuous pulse signal and the sequential pulse signal input to the first to third comparators 83a, 83b, and 83c as shown in (e), (f) and (g) of FIG. When the magnitude of the pulse signal is large, a high signal is output from the first to third comparators 83a, 83b, and 83c as shown in Figs. 4 (h), (i), and (j).

When the high signal is output from the first to third comparators 83a, 83b, and 83c, the transistors Q20, Q21, and Q22 connected between the inverter unit 90 and the power supply unit 100 are turned on. Accordingly, a current is supplied from the power supply unit 100 to the motor 2.

In this case, the magnitude of the current supplied from the power supply unit 100 to the motor 2 is sensed by the current sensing unit 110, and if the magnitude of the current is greater than or equal to the reference value, the transistor of the current limiting unit 120. Q26 is turned on, and the continuous pulse signal generated from the fourth pulse terminal 74 is input to the transistor Q26.

Therefore, since the continuous pulse signal generated from the fourth pulse terminal 74 is not input to the first to third comparators 83a, 83b and 83c, the first to third comparators 83a, 83b and 83c. In this case, a high signal is not output and thus the current supplied from the power supply unit 100 to the motor 2 is cut off, thereby preventing the motor 2 from being damaged due to overcurrent.

Since the drive circuit of the switched reluctance motor of the present invention configured as described above can control the current supplied to the motor by comparing the magnitudes of the sequential and continuous pulse signals generated in the controller using a compact and inexpensive comparator. Since a separate logic operation element such as an AND gate is not used, not only the layout of the driving circuit is reduced but also the cost is reduced.

Claims (6)

A controller configured to generate a plurality of sequential pulse signals sequentially generated to drive the motor and a sequential pulse signal continuously generated, and a continuous pulse signal continuously generated; A modulation unit for outputting a high signal when the continuous pulse signal is large by comparing the voltage magnitude of the continuous pulse signal and the sequential pulse signal generated by the controller; An inverter unit turned on / off according to an output signal of the modulator to turn on / off a current supplied to the motor; A power supply unit supplying current to the motor by the inverter unit; A current sensing unit sensing a current supplied to the motor by the power supply unit; And a current limiting unit configured to prevent a current from being supplied from the power supply unit to the motor when the magnitude of the current sensed by the current sensing unit is greater than or equal to a reference value. According to claim 1, And said sequential pulse signal is generated by inverting its phase. According to claim 1, The modulating unit and the diode unit for preventing the reverse flow of the signal; A level limiting unit for limiting a level at which a low signal of the sequential pulse signal is not generated below a set voltage based on a zero voltage so that the sequential pulse signal generated from the controller can be prevented from external noise; And a comparator for comparing the sequential pulse signal passing through the level limiting unit with the continuous pulse signal and outputting a high signal when the continuous pulse signal is large. The method of claim 3, wherein The level limiting unit may include: first, second, and third resistance units each having a plurality of resistors connected in parallel; And a level limiting power supply stage for supplying voltages for limiting the level of the sequential pulse signal to the first, second, and third resistors. The method of claim 2, The comparator comprises a plurality of comparators, wherein the continuous pulse signal is input to the non-inverting (+) terminal of each comparator, and the sequential pulse signal generated from the controller is input to the inverting (-) terminal so that the continuous pulse signal is input. And a high signal is generated when the sequential pulse signal is greater than the sequential pulse signal. The method of claim 2, When the overcurrent is supplied to the motor, the comparison unit inputs the continuous pulse signal to the current limiting unit, so that the sequential pulse signal is always larger than the continuous pulse signal so that no high signal is generated. Driving circuit.