KR20030029719A - Energy Recovery Apparatus in Plasma Display Panel - Google Patents

Abstract

PURPOSE: An energy recovery device for a plasma display panel is provided to minimize the number of parts mounted and prevent the generation of electromagnetic waves. CONSTITUTION: An energy recovery circuit comprises a PCB inner layer(38) on which an inductor(39) is formed in PCB pattern and a PCB outer layer(36) on which a part(44) are mounted. The PCB outer layer(36) comprises first and second via holes(40,42) for electrically connecting the part(44) to the inductor(39) and a ground pattern(46) formed to overlap with the inductor(39). The inductor(39) is formed in PCB pattern on the PCB inner layer(38). The inductor(39) is electrically connected to the part(44) through the first and second via holes(40,42). The ground pattern(46) is electrically connected to a base voltage source. The ground pattern(46) which overlaps the inductor(39) absorbs electromagnetic waves generated from the inductor(39).

Description

Energy recovery device of plasma display panel {Energy Recovery Apparatus in Plasma Display Panel}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an energy recovery apparatus for a plasma display panel, and more particularly, to an energy recovery apparatus for a plasma display panel capable of minimizing the number of components to be mounted and generation of electromagnetic waves.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such flat panel displays include Liquid Crystal Display (LCD), Field Emission Display (FED), Plasma Display Panel (PDP) and Electro-Luminescence (EL) display. Device and the like.

PDP is a display device using a gas discharge has the advantage that it is easy to manufacture a large panel. As a PDP, a three-electrode AC surface discharge type PDP having three electrodes and driven by an alternating voltage is typical.

Referring to FIG. 1, a discharge cell of a three-electrode AC surface discharge type PDP has a first electrode 12Y and a second electrode 12Z formed on the upper substrate 10, and an address formed on the lower substrate 18. An electrode 20X is provided.

The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the first electrode 12Y and the second electrode 12Z side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 14. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge, and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the first electrode 12Y and the second electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower plates and the partition wall.

The three-electrode AC surface discharge type PDP is driven by being divided into a plurality of subfields, and gray scale display is performed by emitting light a number of times proportional to the weight of video data in each subfield period. The subfields SF1 to SF8 are driven again after being divided into a reset period, an address period, a sustain period, and an erase period.

Here, the reset period is a period in which uniform wall charges are formed in the discharge cells, the address period is a period in which selective address discharge occurs in accordance with the logic value of the video data, and the sustain period is a discharge cell in which the address discharge has occurred. Is a period for maintaining the discharge. The erasing period is a period of erasing the sustain discharge generated in the sustain period.

The address discharge and the sustain discharge of the AC surface discharge PDP driven in this way require a high voltage of several hundred volts or more. Therefore, an energy recovery apparatus is used to minimize the driving power required for the address discharge and the sustain discharge. The energy recovery apparatus recovers the voltage between the first electrode 12Y and the second electrode 12Z and uses the voltage recovered as the drive voltage at the next discharge.

2 is a view showing an energy recovery device formed on the first electrode to volatilize the sustain discharge voltage.

Referring to FIG. 2, a conventional energy recovery apparatus includes an inductor L connected between a panel capacitor Cp and a source capacitor Cs, and a parallel connection between the source capacitor Cs and the inductor L in parallel. It consists of first and third switches S1 and S3 and second and fourth switches S2 and S4 connected in parallel between the panel capacitor Cp and the inductor L.

The panel capacitor Cp equivalently represents the capacitance formed between the first electrode Y and the second electrode Z. FIG. The second switch S2 is connected to the reference voltage source Vs, and the fourth switch S4 is connected to the ground voltage source GND. The source capacitor Cs recovers and charges the voltage charged to the panel capacitor Cp during the sustain discharge, and supplies the charged voltage to the panel capacitor Cp again.

The source capacitor Cs has a capacitance value capable of charging a voltage of Vs / 2 corresponding to half of the reference voltage source Vs. The inductor L forms a resonance circuit together with the panel capacitor Cp. The first to fourth switches S1 to S4 control the flow of current. The energy recovery device formed on the second electrode Z is formed symmetrically with the energy recovery device formed on the first electrode Y with respect to the panel capacitor Cp. Meanwhile, the first and second diodes D1 and D2 respectively installed between the first and second switches S1 and S2 and the inductor L prevent current from flowing in the reverse direction.

3 is a timing diagram and waveform diagrams illustrating on / off timings of the switches illustrated in FIG. 2 and output waveforms of the panel capacitor.

The operation process will be described in detail assuming that the panel capacitor Cp is charged with a voltage of 0 volts and the source capacitor Cs is charged with a voltage of Vs / 2 before the T1 period.

In the T1 period, the first switch S1 is turned on to form a current path from the source capacitor Cs to the first switch S1, the inductor L, and the panel capacitor Cp. When the current path is formed, the voltage of Vs / 2 charged in the source capacitor Cs is supplied to the panel capacitor Cp. At this time, since the inductor L and the panel capacitor Cp form a series resonant circuit, the panel capacitor Cp is charged with a Vs voltage that is twice the voltage of the source capacitor Cs.

In the T2 period, the second switch S2 is turned on. When the second switch S2 is turned on, the voltage of the reference voltage source Vs is supplied to the first electrode Y. The voltage of the reference voltage source Vs supplied to the first electrode Y prevents the voltage of the panel capacitor Cp from falling below the reference voltage source Vs so that sustain discharge occurs normally. On the other hand, since the voltage of the panel capacitor Cp has risen to Vs in the period T1, the driving power supplied from the outside to minimize the sustain discharge is minimized.

In the T3 period, the first switch S1 is turned off. At this time, the first electrode Y maintains the voltage of the reference voltage source Vs for the period of T3. In the T4 period, the second switch S2 is turned off and the third switch S3 is turned on. When the third switch S3 is turned on, a current path is formed from the panel capacitor Cp to the source capacitor Cs through the inductor L and the third switch S3 to charge the panel capacitor Cp. The voltage is recovered to the source capacitor Cs. At this time, the source capacitor Cs is charged with a voltage of Vs / 2.

In the T5 period, the third switch S3 is turned off and the fourth switch S4 is turned on. When the fourth switch S4 is turned on, a current path is formed between the panel capacitor Cp and the base voltage source GND, so that the voltage of the panel capacitor Cp drops to zero volts. In the T6 period, the state of T5 is maintained for a certain time. In fact, the AC driving pulses supplied to the first electrode Y and the second electrode Z are obtained by periodically repeating the periods T1 to T6.

However, the inductor L capacity of the conventional energy recovery device is set such that the voltage of the sustain voltage source can be applied, that is, a predetermined current can pass therethrough. Therefore, the inductor L is formed to have a large volume, and a circuit board on which the inductor L formed to have a large volume must be mounted. On the other hand, when a current is supplied to the inductor L, the inductor L emits a lot of electromagnetic interference (hereinafter referred to as "EMI"). As such, EMI emitted from the inductor L is emitted outside the panel without filtration.

Accordingly, an object of the present invention is to provide an energy recovery apparatus of a plasma display panel which can minimize the number of components to be mounted and generation of electromagnetic waves.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a circuit diagram showing a conventional energy recovery device.

3 is a timing diagram illustrating an operation process of switches included in the energy recovery device illustrated in FIG. 2.

4 is a diagram showing an inductor provided in the energy recovery circuit according to the first embodiment of the present invention.

5 illustrates a pattern for forming an inductor on a printed circuit board.

6 is a diagram showing an inductor provided in an energy recovery circuit according to a second embodiment of the present invention.

7 is a view showing an inductor provided in an energy recovery circuit according to a third embodiment of the present invention.

FIG. 8 is an equivalent circuit diagram of the inductor shown in FIG. 7. FIG.

Fig. 9 shows an inductor provided in the energy recovery circuit according to the fourth embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 12Y: first electrode

12Z: second electrode 14, 22: dielectric layer

16: protective film 18: lower substrate

20X: address electrode 24: partition wall

26: phosphor layer 30, 36, 38, 48, 50, 52: PCB

32,44: Mounting parts 34,39,62: Inductor

40, 42, 56, 58, 60: hole 46, 54: ground pattern

In order to achieve the above object, the energy recovery apparatus of the plasma display panel according to the present invention includes an inductor formed in a printed circuit board pattern on a first layer of a printed circuit board, and a second layer and a first layer located on an upper layer of the first layer. A ground pattern is formed on at least one of the third layers located below the lower layer.

The ground pattern is formed to cover the inductor.

The second layer includes first and second holes formed in the second layer such that the components mounted on the second layer and the inductor may be electrically connected to overlap with both end portions of the inductor.

And a third hole formed in the second layer between the first and second holes to provide a path through which any part mounted between the both ends of the inductor can be electrically connected.

The inductor is formed in a zigzag pattern or a spiral pattern.

The energy recovery apparatus of the plasma display panel of the present invention includes an inductor formed in a pattern on a printed circuit board, a first diode mounted on the printed circuit board and electrically connected to one end of the inductor, and mounted on the printed circuit board to both sides of the inductor. And a second diode electrically connected to either of the ends.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 9.

4 is a diagram illustrating an inductor installed in an energy recovery circuit according to a first embodiment of the present invention.

Referring to FIG. 4, an inductor 34 installed in the energy recovery circuit of the present invention is formed in a PCB pattern on a printed circuit board 30 (hereinafter referred to as "PCB"). In other words, the inductor 34 is patterned in a zigzag form when the wirings on the PCB 30 are patterned. After the inductor 34 is patterned in a PCB pattern, components 32 (eg, switching elements or diodes) are externally mounted so as to be electrically connected to the inductor 34.

As described above, when the inductor 34 is formed in the PCB pattern, that is, the inductor 34 is not mounted externally and the PCB 30 itself serves as the inductor 34, thereby reducing the size of the PCB 30. Meanwhile, the inductor 34 may be formed in various patterns as well as a zigzag pattern. For example, the inductor 34 may be formed in a spiral pattern as shown in FIG. 5.

6 is a diagram illustrating an inductor installed in an energy recovery circuit according to a second embodiment of the present invention.

Referring to FIG. 6, the energy recovery circuit includes a PCB inner layer 38 in which an inductor 39 is formed in a PCB pattern, and a PCB outer layer 36 in which components 44 are mounted.

The PCB outer layer 36 has first and second via holes 40 and 42 for electrically connecting the component 44 and the inductor 39 to be externally mounted, and a ground pattern formed to overlap the inductor 39. 46 is provided. Inductor 39 is formed in the PCB inner layer 38 in a PCB pattern.

Ground pattern 46 and inductor 39 are patterned simultaneously with the wirings of PCB inner layer 38 and PCB outer layer 36. The inductor 39 is electrically connected to the externally mounted component 44 through the first and second via holes 40 and 42. The ground pattern 46 is electrically connected to the ground voltage source GND. The ground pattern 46 is formed to overlap the inductor 39 to absorb the EMI generated from the inductor 39. Thus, according to the second embodiment of the present invention, the inductor 38 is operated at the time of energy recovery recovery. EMI generated in the) can be prevented from being emitted to the outside.

Meanwhile, in the second embodiment of the present invention, at least one PCB layer may be additionally installed on the rear surface of the PCB inner layer 38. In addition, the PCB layer to be installed is provided with the same ground pattern 46 as the PCB outer layer 36 to overlap the inductor 39 to absorb the EMI generated from the inductor 39. That is, by forming the ground pattern 46 on the upper and lower PCB layers to surround the inductor 39, the EMI generated from the inductor 39 is prevented from being emitted to the outside.

7 is a diagram illustrating an inductor installed in an energy recovery circuit according to a third embodiment of the present invention.

Referring to FIG. 7, the inductor 50 installed in the energy recovery circuit is formed in a PCB pattern on the PCB 48. After the inductor 50 is formed on the PCB 48, the components D1 and D2 are externally mounted. For example, the first and second diodes D1 and D2 electrically connected to the inductor 50 from the outside are mounted on the PCB 48. In this case, the first diode D1 is electrically connected to the side portion of the inductor 50, and the second diode D2 is electrically connected to the end of the inductor 50.

On the other hand, the inductor 50 connected to the first diode D1 has a capacity from one end to the side portion, that is, the capacity of L1. In addition, the inductor 50 connected to the second diode D2 has a capacity from one end to the other end, that is, a capacity of L2. That is, in the third embodiment of the present invention, the components D1 and D2 to be mounted may be connected to the inductor 50 at different points to have two capacitance values using one inductor 50.

The energy recovery circuit in which the inductor 50 is installed may be equivalently represented as shown in FIG. 8.

Referring to FIG. 8, the voltage charged in the source capacitor Cs is discharged to the panel capacitor Cp via the inductor L having the capacity of the first switch S1, the first diode D1, and L1. . In this case, since the inductor L has a relatively small capacitance of L1, the voltage discharged from the source capacitor Cs may be supplied to the panel capacitor Cp in a relatively fast time. That is, it can cause a sustain discharge quickly.

The voltage charged in the panel capacitor Cp is discharged to the source capacitor Cs via the inductor L having the capacity of L2, the second diode D2, and the second switch S2. At this time, since the inductor L has a capacity of L2 larger than L1, the voltage discharged from the panel capacitor Cp is efficiently supplied to the source capacitor Cs.

On the other hand, the second and third embodiments of the present invention can be carried out by mixing as shown in FIG.

Referring to FIG. 9, the PCB inner layer 52 in which the inductor 62 is installed, and the PCB outer layer 50 in which the components D1 and D2 are mounted are illustrated.

The PCB outer layer 50 includes first and second via holes 56 and 58 for electrically connecting the components D1 and D2 externally mounted to the inductor 62 and components and inductors (not shown). And a third via hole 60 for electrically connecting 62 with a ground pattern 54 formed to overlap the inductor 62.

The first and third via holes 56 and 60 are formed to overlap both ends of the inductor 62. The second via hole 58 is provided between the first and third via holes 56 and 60 so as to overlap the side surface of the inductor 62. The second diode D2 mounted on the PCB outer layer 50 is electrically connected to one end of the inductor 62 via the first via hole 56. The first diode D1 mounted on the PCB outer layer 50 is electrically connected to the side portion of the inductor 62 via the second via hole 58. The ground pattern 54 is formed so as not to be electrically connected to the wiring connected to the first diode D1 via the second via hole 58 and the second via hole 58.

The energy recovery times thus formed can cause a sustain discharge quickly. In addition, the EMI generated by the inductor 62 may be prevented from being emitted to the outside of the panel by the ground pattern 54. Other operations and configurations are the same as in the second and third embodiments of the present invention.

As described above, according to the energy recovery device of the plasma display panel according to the present invention, since the inductor is formed in a PCB pattern, the number of components mounted on the PCB can be reduced. Therefore, the size of the PCB can be reduced. In addition, the ground pattern may be formed on the upper layer and / or the lower layer of the inductor formed by the PCB pattern to prevent EMI generated from the inductor from leaking out of the panel.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

An inductor formed in a printed circuit board pattern on the first layer of the printed circuit board, And a ground pattern is formed on at least one of a second layer positioned above the first layer and a third layer positioned below the first layer. The method of claim 1, And the ground pattern is formed to cover the inductor. The method of claim 1, Characterized in that the second layer includes first and second holes formed in the second layer so as to overlap with both end portions of both ends of the inductor so that the components mounted on the second layer and the inductor are electrically connected to each other. Energy recovery device for display panel. The method of claim 3, wherein And a third hole formed in the second layer between the first and second holes to establish a path through which any one of the opposite ends of the inductor and the mounted component can be electrically connected. An energy recovery device for a plasma display panel. The method of claim 1, And the inductor is formed in a zigzag pattern or a spiral pattern. An inductor formed in a pattern on a printed circuit board, A first diode mounted on the printed circuit board and electrically connected to one end of the inductor; And a second diode mounted on the printed circuit board and electrically connected to any one of both ends of the inductor.