KR200226150Y1 - WLL terminal having a self-examination function and controlling method therefore - Google Patents

Abstract

The present invention provides a digital diagnostic unit for detecting an abnormality of each functional circuit unit included in the WLL terminal and a diagnostic detection signal of each functional circuit unit inputted from the digital diagnostic unit to generate a display control signal for the diagnosis result. Provided is a WLL terminal equipped with a self-diagnostic function including a processor and a diagnostic display function for displaying a fault portion and fault information of each functional circuit portion in accordance with a display control signal for a diagnosis result of the processor.

The present invention as described above is provided with an FPGA capable of diagnosing each functional circuit part in the terminal, and by displaying the abnormality of each functional circuit part detected by the FPGA to the outside through the display means, the user can identify the fault state of the terminal. As it can be quickly grasped, the convenience of using the terminal can be increased accordingly, and the failure part and failure state of the terminal can be accurately notified to the outside, so that the repair of the terminal can be performed quickly, thus improving the functionality of the terminal.

Description

WLL terminal having a self-examination function and controlling method therefore}

The present invention relates to a WLL terminal equipped with a self-diagnosis function. In particular, the terminal includes an FPGA capable of diagnosing each functional circuit part, and displays the abnormality of each functional circuit part detected through the FPGA through the display means. The present invention relates to a WLL terminal equipped with a self-diagnosis function for increasing the convenience of using the terminal because the user can quickly identify a failure state of the terminal.

In general, a wireless local loop (WLL) system is a telephone system that wirelessly connects subscriber lines within a distance of about 2-6 [km] from a base station without using a conventional telephone line. Many WLL-type systems have been developed and used, such as satellite systems, fixed microwave systems, cellular technology systems, and cordless systems. Used. The system using this cellular technology can coexist with the same network as the cellular mobile phone or PERSONAL COMMUNICATION SERVICE (PCS), and can cover a wider area, making the network more economical.

In addition, three multiple access schemes, that is, frequency division multiple access scheme (FDMA), time division multiple access scheme (TDMA), and code division multiple access scheme (hereinafter, referred to as CDMA) are used in a system using the cellular technology. In addition, a dual CDMA type WLL system is widely used. In addition, the CDMA WLL system is installed in a predetermined area as shown in Fig. 1, the base station 70 for processing the communication signal of the subscriber network transmitted wirelessly, and random access for the channel allocation request to the base station 70 It is largely divided into the terminal 71 which transmits a traffic light and performs necessary communication.

Then, referring to the conventional WLL terminal 71 as described above, the RF unit 72 for processing the RF signal for communication with the base station 70, and the RF signal input from the RF unit 72 to demodulate or externally A modem 73 for modulating a signal transmitted to the PC, a CPU 74 including the modem 73 to control the functions of the terminal 71 as a whole, and a random access time control signal of the CPU 74. According to the timer 75 to count the time.

A voice signal processor 76 for processing a voice signal is connected to one end of the modem 73, and a key panel 77 for setting a user's request signal, for example, a dialing signal, to one end of the CPU 74. Is connected.

Meanwhile, referring to the operation of the conventional CDMA WLL terminal having the above configuration, first, when the user dials through the key panel 77 of the terminal 70 to perform necessary communication, the signal of the CPU of the terminal 71 is transmitted. 74 is recognized. Then, the CPU 74 of the terminal 71 inputs a channel allocation request signal for making a call to the modem 73, at which time the CPU 74 drives the timer 75 from the base station 70. Check continuously until a channel assignment message is received. The modem 73 modulates the channel allocation request signal and inputs the signal to the RF unit 72. Accordingly, the RF unit 72 processes the input channel allocation request signal of the modem 73 into an RF signal. Transmit to base station 70.

At this time, if the base station 70 allocates a channel to the terminal 1, it transmits a message signal indicating the channel allocation, for example, a CHANNEL_REO_ACK signal or an ASSIGNMENT signal. Then, the CPU 74 of the terminal 71 recognizes this through the RF unit 72 and the modem 73, terminates the function of the timer 75, and then transmits data, for example, a voice signal processing unit through the connected call channel ( The voice data input through the 76 is transmitted to the base station 70 to form a call. At this time, if the CPU 74 of the terminal 71 does not receive a channel allocation message from the base station 70 until the time of the timer 75, which is counted after transmitting the channel allocation request signal, ends of random access, It is considered a failure. For example, when random accesses of two terminals collide wirelessly, the terminals do not receive a channel assignment message. Therefore, the CPU 74 of the terminal 71 waits until the timer 75 expires, and when the timer expires, sends a channel allocation request signal back to the base station 70 after a random time has elapsed. Let's do it.

However, the conventional WLL terminal as described above does not have a specific diagnostic means capable of self-diagnosing each functional circuit unit, for example, the modem 73 or the RF unit 72, so that any one of these functional circuit units may fail. In this case, the user did not know the malfunction of the terminal quickly, so the use of the terminal was very inconvenient.

In addition, the conventional WLL terminal as described above has a number of tests in order to find out the failure site when repairing the terminal, accordingly, there was a problem that the troubleshooting is very cumbersome and also takes a long time to repair.

Therefore, the present invention is designed to solve the above problems, and includes an FPGA capable of diagnosing each functional circuit part in a terminal, and displays the abnormality of each functional circuit part detected through the FPGA through the display means. The purpose of the present invention is to provide a WLL terminal equipped with a self-diagnosis function for increasing the convenience of the terminal according to the user can quickly identify the failure state of the terminal.

Another object of the present invention is to provide a WLL terminal equipped with a self-diagnostic function, which can accurately perform the repair of the terminal by accurately notifying the fault part and the failure state of the terminal to the outside. .

The present invention for achieving the above object is a digital diagnostic unit for detecting the presence or failure of each functional circuit unit provided in the WLL terminal, and the diagnostic detection signal of each functional circuit unit input from the digital diagnostic unit to determine the diagnosis result A WLL terminal having a self-diagnostic function including a processor for generating a display control signal for a signal and a diagnostic display function for displaying a fault portion and fault information of each functional circuit part according to the display control signal for a diagnosis result of the processor. to provide.

1 is a block diagram illustrating a conventional WLL terminal.

2 is a block diagram illustrating a terminal of the present invention.

3 is a flow chart of the present invention.

<Detailed Description of Codes>

1: base station 2: RF unit

3: modem 4: wired phone interface

5: digital diagnostic unit 6: terminal

7 processor 8 diagnostic display function

9: power supply unit 10: asynchronous data interface unit

11: landline

Hereinafter, the present invention will be described in detail based on the accompanying drawings.

The terminal of the present invention, as shown in FIG. 2, demodulates or transmits an RF unit 2 for processing an RF signal for communication with the base station 1 and an RF signal input from the RF unit 2. A modem 3 for modulating a signal, a wired telephone interface unit 4 for interfacing a communication signal of a wired telephone via the modem 3, and an abnormality in each functional circuit unit including the wired telephone interface unit 4 The digital diagnostic unit 5 detects the presence and absence of the diagnostic detection signal of each functional circuit unit inputted from the digital diagnostic unit 5, generates a display control signal for the diagnosis result, and performs the function of the terminal 6. A processor 7 for overall control, a diagnostic display function unit 8 for displaying a fault portion and fault information of each function circuit unit in accordance with a display control signal for the diagnosis result of the processor 7, and each function circuit unit The power supply section 9 for supplying the operating power to the Include.

One end of the modem 3 is connected to an external asynchronous communication line, for example, an RJ-45 asynchronous data line, to which an asynchronous data interface unit 10 for connecting asynchronous data is connected.

In addition, the diagnostic display function unit 8 includes an LCD panel for displaying visual information, a buzzer for emitting a warning sound, and an RS 232 serial port for transmitting comprehensive information to an external communication line.

Here, the digital diagnostic unit 5 is composed of a field programmable gate array (FPGA) including registers, and all the functional circuits 2, 3, 4, 9, and 10 of the terminal 6 are digital. It is connected to the diagnostic unit 5 and transmits a diagnostic signal that can determine whether there is an abnormality.

Next, the operation and effects of the present invention as described above will be described.

In the WLL terminal of the present invention, when the system is first set up and the operating power is supplied from the power supply unit 9 to each of the functional circuits 2, 3, 4, 9 and 10, the processor 7 operates as shown in FIG. At this time, the processor 7 proceeds from the initial state (S1) to the call and diagnostic signal detection step (S2) to execute the normal call function, and detects the diagnostic signal to check the abnormality of each functional circuit part to the FPGA Save it.

That is, when the user uses the telephone 11 to make a call, this communication signal is input to the wireline interface 4 of the WLL terminal 6, and the processor 7 recognizes the communication accordingly. A signal is input from the wireline interface 4 to the modem 3. Then, the modem 3 modulates an input communication signal, for example, a communication signal such as a channel allocation request signal for forming a call, and inputs it to the RF unit 2. In addition, the RF unit 2 processes the input communication signal and transmits the RF signal to the base station 1. At this time, the processor 7 drives an internal timer (not shown) so that the channel assignment message is transmitted from the base station 1. Check continuously until received. When the base station 1 allocates a channel to the terminal 6, the base station 1 transmits a message signal indicating the channel allocation, for example, a CHANNEL_REO_ACK signal or an ASSIGNMENT signal.

Then, the processor 7 of the terminal 6 recognizes this through the RF unit 2 and the modem 3, terminates the function of the internal timer, and then connects the data such as a wired telephone interface unit through the connected call channel ( 4) voice data of the subscriber's telephone input through 4) is transmitted to the base station 1 to form a call.

Here, the communication signal is described as a signal of the wire telephone 11, but when the external asynchronous data is input to the asynchronous data interface unit 10, the same operation as described above is performed.

Meanwhile, at the same time as the above process, the processor 7 receives a diagnostic signal from each of the functional circuits 2, 3, 4, 9, and 10 of the terminal 6 through the digital diagnostic unit 5 composed of an FPGA.

For example, the RF unit 2 may include a diagnostic signal for indicating a normal supply of operating power, a diagnostic signal for confirming that A / D conversion is normally performed, a diagnostic signal for confirming whether D / A conversion is normally performed, and the like. Transfer to (5). The modem 3 includes a diagnostic signal for notifying normal supply of operating power, a diagnostic signal for checking whether an error occurs after decoding the channel code, a diagnostic signal for recognizing synchronization completion of the PN code, and an internal D / A diagnostic signal for confirming whether A conversion is normally performed is transmitted to the digital diagnostic unit 5. In addition, the wire telephone interface unit 4 detects a diagnostic signal for checking whether the operating power of the internal components of the codec (not shown) and the slick (not shown) are normally supplied, and detecting the telephone RJ-11 JACK attachment / dismount. The diagnostic signal and the diagnostic signal for checking whether the input / output of the slick chip is normally performed are transmitted to the digital diagnosis unit 5. The asynchronous data interface unit 4 inputs a diagnostic signal for confirming the normal supply of operating power, a diagnostic signal, etc. to the digital diagnostic unit 5 according to an error signal of the HDLC primer.

At this time, the digital diagnostic unit 5 stores the respective diagnostic signals input from the respective functional circuits 2, 3, 4, 9 and 10 of the terminal 6 in the corresponding registers therein.

Here, the diagnostic signals of the respective functional circuits 2, 3, 4, 9, and 10 input to the digital diagnostic unit 5 are not limited to the above embodiment but can be adjusted to suit the needs of the designer.

On the other hand, after the call and diagnostic signal detection step (S2) proceeds to the failure determination step (S3) to determine the respective diagnostic signals currently input from each of the functional circuit unit, and if there is no functional circuit unit where the failure is determined as a previous step Returning to (S2), the loop is repeated.

However, if it is determined during the fault determination step (S3) that the fault occurs in the functional circuit part, the process proceeds to the fault notification step (S4) to comprehensively inform the fault part and fault information of the terminal function circuit part in which the current fault occurs. Fault information is displayed externally.

That is, the digital diagnostic unit 5 inputs the interrupt signal to the processor 7 as an interrupt signal when a fault condition is detected among the diagnostic information of the respective functional circuit units 2, 3, 4, 9 and 10 stored in the corresponding registers. Let's do it. Then, the processor 7 checks the diagnostic information stored in the registers of the digital diagnostic unit 5 according to the interrupt signal input from the digital diagnostic unit 5 and determines the type of failure. In addition, the processor 7 includes comprehensive fault information regarding the functional circuits 2, 3, 4, 9, and 10 in which the fault is confirmed. 8) to be notified to the outside through, the diagnostic display function unit 8 displays the failure information by letters or numbers through the LCD panel, and makes a warning sound to inform the failure through the buzzer. Here, if a computer is connected to the serial port of the diagnostic display function unit 8, the comprehensive information for the failure is transmitted to the computer.

Therefore, the user recognizes the failure information displayed on the diagnostic display function unit 8 and quickly takes appropriate measures according to the failure of the terminal 6.

As described in the above description, the present invention includes an FPGA capable of diagnosing each functional circuit unit in the terminal, and displays the presence or absence of each functional circuit unit detected by the FPGA to the outside through the display means, thereby allowing the user to fail the terminal. Since the state can be quickly identified, there is an advantage of increasing the convenience of using the terminal accordingly.

In addition, according to the present invention, it is possible to quickly troubleshoot by referring only to the diagnostic information displayed on the LCD panel, even if not tested for repair of the terminal by accurately notifying the outside of the terminal and the failure state through the LCD panel. Therefore, the functionality of the terminal is also significantly improved accordingly.

Claims (2)

A digital diagnostic unit for detecting an abnormality of each functional circuit unit provided in the WLL terminal, a processor for determining a diagnostic detection signal of each functional circuit unit input from the digital diagnostic unit, and generating a display control signal for the diagnostic result; WLL terminal with a self-diagnosis function, characterized in that it comprises a diagnostic display function for displaying the fault portion and fault information of each functional circuit portion in accordance with the display control signal for the diagnostic result of the processor. The WLL terminal of claim 1, wherein the digital diagnostic unit is configured in an FPGA form.