KR200211594Y1 - Interface device applying for two terminal interface - Google Patents

Abstract

The present invention relates to a V.24 / V.35 standard dual interface device implemented to support both the V.24 standard and the V.35 standard using a single connector, which are widely used in communication equipment. Its purpose is to provide a V.24 / V.35 standard interface device that can be conveniently used by supporting two standards of V.24 and V.35 with a cable alone, and can realize equipment design in various shapes. To this end, the present invention is configured such that the cable of the V.24 standard signal and the cable of the V.35 standard signal are connected to each other, and when the cable of the V.35 standard is connected, the V.35 activation signal and the ground signal are shorted. A connector for transmitting the input signal of the specification and opening the V.35 activation signal and the ground signal when the V.24 cable is connected or the cable is not connected to transmit the input signal of the V.24 specification; And a blocking circuit for receiving a plurality of signals from the connector and selecting one of the input signals of the V.24 standard and the V.35 standard and transmitting the selected signals to the matching board.

Description

Interface device applying for two terminal interface

The present invention relates to a communication apparatus, and in particular, the V.24 / V.35 standard is implemented to support both the V.24 standard and the V.35 standard, which are widely used in communication equipment, using a single connector. It relates to an interface device.

In general, there is a terminal connection standard that defines a rule for sending and receiving data between a computer and a modem or a terminal and a modem. This means that the connection part of the communication line should be standardized.

A data communication system is composed of a central computer, a communication line and a terminal, and these devices are united together so that a complete function can be performed. (DTE: Data Terminal Equipment) Interfaces connection conditions. If the world's computer producers produce data communications equipment (DCE) and data terminal equipment (DTE) independently without any specification, there will be great confusion, so the International Telecommunication Union-Telecommunications Standards Division (ITU-TSS), the Electronics Industry Association Standard bodies such as the International Organization for Standardization (EIA) and the International Organization for Standardization (ISO) have enacted and recommended standardization on such connection standards.

Therefore, the terminal access standard is a protocol related to the physical layer, which is the lowest layer of the Open System Access (OSI) reference model, and a device connected to a communication line such as a modem and a data service unit (DSU) as shown in the figure. Signal lines, connectors, and the like for connecting a personal computer (PC), a computer, a terminal, and the like are prescribed.

These terminal connection specifications include the V series and the X series, which represent the standard series of ITU-TSS standardization series directly related to data communication.

The V series is a conventional terminal interface developed for transmitting analog data, also known as a modem interface, and is a condition of a terminal connection standard when performing information transmission using a public switched telephone network (PSTN). When a terminal with a series interface is connected to a circuit, packet, or switched network, a network control unit (NCU) is required for connection control.

The X Series is a new terminal interface developed for transmitting digital data and is an economical connection standard compared to the V Series. Therefore, it is a series of terminal connection in case of performing information transmission using digital data network.

Among the terminal connection specifications of the V series, the most commonly used terminal interface for communicating with an analog data dedicated line is the V.24 standard for low speed and the V.35 standard for high speed data transmission. The V.24 standard is the specification of the interconnection circuit between the data line termination device and the data terminal device. The V.35 standard is the connection standard used for the transmission of 48 [Kbps] data using a 60 to 108 [KHz] near band. .

In addition, as shown in Table 1, the connection specifications of V.24 and V.35 are defined.

Among the interface connection conditions of the V series, important pin numbers and functions are specified. This is a recommendation of the American Electronics Industry Association, which is a description of the pins having the main functions with respect to the circuit number and functions. The form of is used with 25 pin connector specified in ISO.

First, the following table looks at the differences between the V.24 and V.35 specifications.

Table 2 lists the signals and pin numbers as defined in the V.24 specification.

Table 3 lists the signals and pin numbers as defined in the V.35 specification.

Most communication equipment using the V.24 and V.35 terminal connection specifications implement the V.24 and V.35 specifications separately using their respective connectors. This causes inconvenience in using two or more connectors and increases the cost of the product due to the use of more than necessary parts.

It also causes the size of equipment to increase.

In order to solve the problems of the prior art as described above of the present invention, by supporting only two standards of V.24 and V.35 with only one cable can be used conveniently and can implement the equipment design in various shapes The aim is to provide a V.24 / V.35 compliant interface device.

1 is a circuit diagram showing a blocking circuit capable of selectively protecting two input signals (V.24 specification and V.35 specification) of the present invention;

Fig. 2 shows an example in which a cable for V.35 is connected to the DB-25 connector of this embodiment.

Explanation of symbols on the main parts of the drawings

100: resistance 110: inverter chip

120: first buffer 130: second buffer

In order to achieve the above object, the V.24 / V.35 standard combined interface device of the present invention is configured such that a cable of a V.24 standard signal and a cable of a V.35 standard signal are connected to each other. When connected, the V.35 enable signal and the ground signal are shorted to transmit the V.35 standard input signal. When the V.24 cable is connected or the cable is not connected, the V.35 enable signal and the ground signal are opened. A connector for transmitting an input signal of a standard; And a blocking circuit for receiving a plurality of signals from the connector and selecting one of the input signals of the V.24 standard and the V.35 standard and transmitting the selected signals to the matching board.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

First, the signals and pin numbers of the V.24 standard and the V.35 standard connector (this embodiment uses the DB-25 connector) proposed in the present invention will be described.

Table 4 shows the signals and pin numbers of the DB-25 connector proposed for both the V.24 and V.35 specifications. Since the V.24 standard consists of 11 signals as shown in Table 1, and the V.35 standard consists of 17 signals as shown in Table 2, it shares seven signals that are identical between the two standards. By adding one signal for the control of (described as), it can be implemented with only 22 signals in total.

Therefore, you can use the DB-25 connector with 25 pins.

PIN number CCITT Circuit Number EIA Symbol function Abbreviation standard One 113 Transmission Synchronization Signal Circuit A ExTCLK V.35 2 103 BA Data transmission circuit TXD V.24 3 104 BB Data receiving circuit RXD V.24 4 105 CA Transmission request circuit RTS V.24 / V.35 5 106 CB Transmission ready circuit CTS V.24 / V.35 6 107 CC DSU transmit ready circuit DSR V.24 / V.35 7 102 AB Common electrical reference circuit SG V.24 / V.35 8 109 CF Carrier detection circuit DCD V.24 / V.35 9 104 Data Receive Circuit A RXD V.35 10 115 Receive sync signal circuit A RxCLK V.35 11 114 Transmission Synchronization Signal Circuit A TxCLK V.35 13 103 Data Transmission Circuit A TXD V.35 14 113 Transmission Synchronization Signal Circuit B ExTCLK V.35 15 114 DB Transmit Synchronization Signal Circuit (DSU Supply) TxCLK V.24 17 115 DD Receive sync signal circuit (DSU supply) RxCLK V.24 19 Break circuit control and specification selection V35ENA 20 108/2 CD Data terminal ready circuit DTR V.24 / V.35 21 104 Data receiving circuit B RXD V.35 22 115 Receive sync signal circuit B RxCLK V.35 23 113 Transmission Synchronization Signal Circuit B TxCLK V.35 24 113 DA Transmission synchronization signal circuit ExTCLK V.24 25 103 Data transmission circuit B TXD V.35

Now, the blocking circuit of the present invention will be described with reference to the accompanying drawings.

1 is a circuit diagram showing a blocking circuit capable of selectively protecting two input signals (V.24 specification and V.35 specification) of the present invention. The blocking circuit is formed on the matching board to which the DB-25 is connected.

Referring to FIG. 1, the blocking circuit of the present invention is formed between a node to which a V.35 activation signal V35ENA is input for controlling the blocking circuit and selecting the V.24 and V.35 specifications and a power supply voltage VCC. Inverter chip 110 for receiving and inverting the resistor 100, the V.35 activation signal, and the V.35 activation signal V35ENA under the control of the V.35 specification to buffer and transfer the input signal as an input signal. A first buffer 120 and a second buffer 130 for buffering an input signal of the V.24 standard under the control of the signal output from the inverter chip 110 and transferring it as an input signal.

In addition, the outputs of the first buffer 120 and the second buffer 130 are tied to each other. When one of the two buffers is enabled, the enabled buffer side signal is output as the final input signal.

The blocking circuit must be present in that it supports both the V.24 and V.35 standards, so that the operation of the V.24 standard and the operation of the V.35 standard are not interfered with each other. This is not necessary for the output signal, only for the final input signal. In addition, since the final input signal output from the blocking circuit is output to the other pin through each component does not affect the equipment. That is, in case of using cable of V.24 standard, output signal of V.35 standard is not used in counterpart equipment and is not affected by each other.

In this embodiment, the resistor 100 is implemented with a resistance of 10KΩ, and the inverter chip is implemented by implementing 74F04. The power supply voltage is 5V.

Referring to the operation of the blocking circuit, when the V.35 cable is mounted, the second buffer 130 is disabled as the V.35 activation signal V35ENA is connected to the ground signal SG (Signal Ground). One buffer 120 is enabled, and input signals of the V.35 standard are input. When the V.24 cable is mounted, the V.35 activation signal V35ENA is not connected, and the first buffer 120 is disconnected according to the operation of the power supply voltage VCC and the resistor 100. The second buffer 130 is enabled by the inverting operation of the inverter chip 110, and input signals of the V.24 standard are input.

2 shows an example in which the cable for V.35 is connected to the DB-25 connector of the present embodiment.

Referring to FIG. 2, the V.35 connector 200 receiving a plurality of input signals used in the V.35 standard and the V.35 connector 200 transmits and receives a plurality of input signals. Among the signals, a V.35 cable 210 for shorting the V.35 activation signal V35ENA and the ground signal SG to select the V.35 standard in the blocking circuit, and the V.35 cable 210 transferred from the V.35 cable 210. A DB-25 connector 220 is provided for receiving a number of V.35 signals and inputting the signal to a blocking circuit.

In addition, when the cable is not connected to the DB-25 connector 220 or when the cable for V.24 is connected to the control circuit to receive a signal of the V.24 standard.

The automatic recognition of the V.24 and V.35 specifications is implemented through the control of the blocking circuit described above. In other words, the circuit is operated by receiving a signal from the cable 210 for determining the recognition of the V.24 standard and the V.35 standard in the blocking circuit. If the cable for V.24 is connected or no cable is connected, the cable is operated with the V.24 standard. If the cable for V.35 is connected, the cable is operated with the V.35 standard.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

As described above, the present invention can selectively receive a V.24 standard signal and a V.35 standard signal by using only one connector. The product can meet the needs of users who need it, and can supply two kinds of products to one user. In addition, by using one connector, the size of the equipment is reduced, and accordingly, various product designs can be pursued. In addition, the product can be produced at low cost compared to the function of the product, so it can give an advantage in price competitiveness compared to foreign products.

Claims (3)

It is configured to connect the cable of V.24 standard signal and the cable of V.35 standard signal respectively, and when the cable of V.35 standard is connected, short the V.35 activation signal and the ground signal to A connector for transmitting the input signal of the V.24 specification by opening the V.35 activation signal and the ground signal when the V.24 cable is connected or disconnected; And A blocking circuit which receives a plurality of signals from the connector and selects one of input signals of a V.24 standard and a V.35 standard and transmits the selected signal to a matching board; Interface device for both V.24 / V.35 standard characterized in that it comprises a. The method of claim 1, The blocking circuit, A resistor formed between the node at which the V.35 activation signal is input to select the V.24 and V.35 specifications and the supply voltage; An inverter chip which receives the V.35 activation signal and inverts it; A first buffer controlled by the V.35 activation signal and configured to buffer a V.35 standard input signal and transmit the buffered input signal as an input signal; Under control of the signal output from the inverter chip, the V.24 standard input signal A second buffer for carrying the paring signal as an input signal; Interface device consisting of V.24 / V.35 standard, including. The method of claim 1, When the V.35 activation signal is shorted to the ground signal, the connector transfers the V.35 standard input signal to the blocking circuit. When the V.35 activation signal is open to the ground signal, the connector blocks the V.24 input signal. Interface device compatible with V.24 / V.35 standard, characterized in that the transfer to the circuit.