KR200211257Y1 - Semiconductor Wafer Etching Equipment - Google Patents
Semiconductor Wafer Etching Equipment Download PDFInfo
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- KR200211257Y1 KR200211257Y1 KR2019970041380U KR19970041380U KR200211257Y1 KR 200211257 Y1 KR200211257 Y1 KR 200211257Y1 KR 2019970041380 U KR2019970041380 U KR 2019970041380U KR 19970041380 U KR19970041380 U KR 19970041380U KR 200211257 Y1 KR200211257 Y1 KR 200211257Y1
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- 238000005530 etching Methods 0.000 title claims abstract description 74
- 239000004065 semiconductor Substances 0.000 title claims abstract description 23
- 230000005684 electric field Effects 0.000 claims abstract description 6
- 239000002184 metal Substances 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 2
- 229920000642 polymer Polymers 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 5
- 230000007423 decrease Effects 0.000 description 2
- 235000012489 doughnuts Nutrition 0.000 description 1
- 230000005281 excited state Effects 0.000 description 1
- 230000005283 ground state Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
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Abstract
본 고안은 반도체 웨이퍼 식각장치에 관한 것으로, 종래 기술은 식각챔버가 반구형으로 형성되어 있으므로 식각작업의 진행시 발생되는 폴리머들이 식각챔버의 중앙부보다 주변부에 많이 부착되어 상기 식각챔버를 통과하는 플라즈마가 불균일하게 되므로 웨이퍼에 가해지는 플라즈마의 밀도에 차이가 발생하여 식각불균일을 유발하는 바, 이에 본 고안은 마그네트론 및 도파관에 의해 마이크로웨이브가 유입되는 식각챔버와, 그 식각챔버의 외측에 설치되는 전기장을 발생시키는 코일과, 상기 식각챔버의 상면에 설치되어 DC 전원이 인가되는 수신안테나로 구성되는 것을 특징으로 하는 반도체 웨이퍼 식각장치를 제공함으로써, 웨이퍼의 식각균일성을 향상시키는 효과가 있다.The present invention relates to a semiconductor wafer etching apparatus. In the prior art, since the etching chamber is formed in a hemispherical shape, the polymers generated during the etching operation are more attached to the periphery than the central portion of the etching chamber, so that the plasma passing through the etching chamber is uneven. Since the difference in the density of the plasma applied to the wafer causes an etching irregularity, the present invention generates an etching chamber in which microwaves are introduced by the magnetron and the waveguide, and an electric field installed outside the etching chamber. By providing a semiconductor wafer etching apparatus, characterized in that consisting of a coil and a receiving antenna which is provided on the upper surface of the etching chamber is applied to the DC power supply, there is an effect of improving the etching uniformity of the wafer.
Description
본 고안은 반도체 웨이퍼 식각장치에 관한 것으로, 특히 웨이퍼의 상부에 플라즈마를 균일하게 형성하여 식각균일도를 향상시키기 위한 반도체 웨이퍼 식각장치에 관한 것이다.The present invention relates to a semiconductor wafer etching apparatus, and more particularly, to a semiconductor wafer etching apparatus for improving the etching uniformity by forming a plasma uniformly on top of the wafer.
일반적으로 반도체 웨이퍼 제조공정 중 현상 및 최종 베이크공정을 마친 다음에는 식각공정을 실시하게 되는데, 이와 같은 식각공정을 실시하기 위한 종래의 장치가 도 1에 도시되어 있는 바, 이에 대해 간단히 설명하면 다음과 같다.In general, an etching process is performed after the development and the final baking process of the semiconductor wafer manufacturing process. A conventional apparatus for performing such an etching process is illustrated in FIG. 1. same.
도 1은 종래 기술에 의한 반도체 웨이퍼 식각장치를 보인 단면도로서, 이에 도시한 바와 같이, 종래 반도체 웨이퍼 식각장치의 구성을 보면, 반구 형상으로 이루어진 식각챔버(1)의 내측에 웨이퍼가 얹혀지는 정전척(2)이 설치되어 있고, 상기 식각챔버(1)의 상측에는 마이크로웨이브(μ WAVE)를 발생시키는 마그네트론(3)이 설치되어 있으며, 상기 식각챔버(1)와 마그네트론(3) 사이에는 마그네트론(3)에서 발생한 마이크로웨이브를 식각챔버(1)에 전달하기 위한 도파관(4)이 연결 설치되어 있다.1 is a cross-sectional view showing a semiconductor wafer etching apparatus according to the prior art. As shown in the drawing, the structure of a conventional semiconductor wafer etching apparatus includes an electrostatic chuck in which a wafer is placed inside an etching chamber 1 having a hemispherical shape. (2) is provided, a magnetron (3) for generating a microwave (μ WAVE) is provided on the upper side of the etching chamber (1), the magnetron (3) between the etching chamber (1) and the magnetron (3) A waveguide 4 for connecting the microwave generated in 3) to the etching chamber 1 is connected.
그리고 상기 식각챔버(1)의 외측에는 전기장을 형성하는 코일(5)이 설치되어 있다.In addition, a coil 5 is formed outside the etching chamber 1 to form an electric field.
상기와 같이 구성된 종래 반도체 웨이퍼 식각장치의 작동에 대해서 설명하면 다음과 같다.Referring to the operation of the conventional semiconductor wafer etching apparatus configured as described above are as follows.
식각챔버(1)의 내부에 설치된 정전척(2)에 웨이퍼 이송장치(미도시)를 이용하여 웨이퍼를 얹어 놓는다.The wafer is placed on the electrostatic chuck 2 provided in the etching chamber 1 by using a wafer transfer device (not shown).
그후, 식각챔버(1) 내부로 공정가스를 주입함과 아울러 코일(5)을 이용하여 식각챔버(1)의 내측에 자장을 형성하여 웨이퍼의 표면이 여기되는 상태가 되도록 한다.Thereafter, the process gas is injected into the etching chamber 1, and a magnetic field is formed inside the etching chamber 1 using the coil 5 so that the surface of the wafer is excited.
그후, 마그네트론(3)의 송출안테나에서 도파관(4)을 통해 송출된 마이크로웨이브를 식각챔버(1)의 내측에 인가시키면 상기 식각챔버(1)의 내부에 존재하는 가스입자들이 해리되어 플라즈마가 형성됨으로써 웨이퍼에 형성된 산화막이 식각된다.Then, when the microwaves sent out through the waveguide 4 in the delivery antenna of the magnetron 3 is applied to the inside of the etching chamber 1, the gas particles existing in the etching chamber 1 are dissociated to form a plasma. As a result, the oxide film formed on the wafer is etched.
그러나, 상기와 같은 종래 기술은 식각챔버(1)가 반구형으로 형성되어 있으므로 식각작업의 진행시 발생되는 폴리머들이 식각챔버(1)의 중앙부보다 주변부에 많이 부착되어 상기 식각챔버(1)를 통과하는 플라즈마가 불균일하게 되므로 웨이퍼에 가해지는 플라즈마의 밀도에 차이가 발생하여 식각불균일을 유발하는 문제점이 있었다.However, in the conventional technology as described above, since the etching chamber 1 is formed in a hemispherical shape, polymers generated during the etching process are attached to the periphery of the etching chamber 1 and pass through the etching chamber 1. Since the plasma is non-uniform, a difference occurs in the density of the plasma applied to the wafer, thereby causing an etching non-uniformity.
즉, 플라스마 소스가 집중되어 플라스마의 밀도가 높은 중앙부분에서는 식각이 많이 되어 식각속도가 빨라지며, 상대적으로 플라스마의 밀도가 낮은 주변부분에서는 식각이 적게 되어 식각속도가 느릴 수밖에 없는 문제점을 안고 있는 것이다.That is, the plasma source is concentrated, so that the etching speed increases because the plasma density is high, and the etching speed increases, and the etching speed decreases because the etching speed decreases in the peripheral area where the plasma density is low. .
따라서, 본 고안은 상술한 종래의 문제점을 해결하기 위하여 안출된 것으로, 웨이퍼에 전달되는 플라즈마의 균일성을 향상시켜 웨이퍼의 식각균일도를 향상시키기 위한 반도체 웨이퍼 식각장치를 제공하는데 그 목적이 있다.Accordingly, an object of the present invention is to provide a semiconductor wafer etching apparatus for improving the uniformity of the plasma by improving the uniformity of the plasma delivered to the wafer to solve the conventional problems described above.
도 1은 종래 기술에 의한 반도체 웨이퍼 식각장치를 보인 단면도.1 is a cross-sectional view showing a semiconductor wafer etching apparatus according to the prior art.
도 2는 본 고안에 의한 반도체 웨이퍼 식각장치를 보인 단면도.Figure 2 is a cross-sectional view showing a semiconductor wafer etching apparatus according to the present invention.
도 3은 본 고안에 의한 반도체 웨이퍼 식각장치를 보인 평면도.3 is a plan view showing a semiconductor wafer etching apparatus according to the present invention.
* 도면의 주요부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings
10 ; 식각챔버 11 ; 정전척10; Etching chamber 11; An electrostatic chuck
12 ; 마그네트론 13 ; 도파관12; Magnetron 13; wave-guide
14 ; 코일 15 ; 수신안테나14; Coil 15; Receiving antenna
상기와 같은 본 고안의 목적을 달성하기 위하여, 마그네트론 및 도파관에 의해 마이크로웨이브가 유입되는 식각챔버와, 그 식각챔버의 외측에 설치되어 전기장을 발생시키는 코일과, 상기 식각챔버의 상면에 설치되어 DC 전원이 인가되는 수신안테나로 구성되는 것을 특징으로 하는 반도체 웨이퍼 식각장치가 제공된다.In order to achieve the object of the present invention as described above, the microwave chamber is introduced by the magnetron and the waveguide, the coil is provided on the outside of the etching chamber to generate an electric field, and is installed on the upper surface of the etching chamber DC Provided is a semiconductor wafer etching apparatus, comprising a receiving antenna to which power is applied.
이하, 본 고안에 의한 반도체 웨이퍼 식각장치의 실시예를 첨부된 도면에 의거하여 설명하면 다음과 같다.Hereinafter, an embodiment of a semiconductor wafer etching apparatus according to the present invention will be described with reference to the accompanying drawings.
도 2는 본 고안에 의한 반도체 웨이퍼 식각장치를 보인 단면도이고, 도 3은 본 고안에 의한 반도체 웨이퍼 식각장치를 보인 평면도이다.2 is a cross-sectional view showing a semiconductor wafer etching apparatus according to the present invention, Figure 3 is a plan view showing a semiconductor wafer etching apparatus according to the present invention.
이에 도시한 바와 같이, 본 고안에 의한 반도체 웨이퍼 식각장치는 평판 형상으로 이루어진 식각챔버(10)의 내측 하부에 웨이퍼가 얹혀지는 정전척(11)이 설치되고, 상기 식각챔버(10)의 상측에는 마이크로웨이브를 발생시키는 마그네트론(12)이 설치되고, 상기 식각챔버(10)와 마그네트론(12) 사이에는 마그네트론(12)에서 발생한 마이크로웨이브를 식각챔버(10)에 전달하기 위한 도파관(13)이 설치되며, 상기 식각챔버(10)의 외측에는 전기장을 형성하는 코일(14)이 설치되어 있다.As shown in the drawing, the semiconductor wafer etching apparatus according to the present invention is provided with an electrostatic chuck 11 on which a wafer is placed on an inner lower portion of the etching chamber 10 having a flat plate shape, and above the etching chamber 10. A magnetron 12 for generating microwaves is installed, and a waveguide 13 is installed between the etching chamber 10 and the magnetron 12 to deliver microwaves generated from the magnetron 12 to the etching chamber 10. The coil 14 is formed outside the etch chamber 10 to form an electric field.
그리고 상기 식각챔버(10)의 상면에는 식각챔버(10) 내로 들어오는 플라즈마의 균일성을 위해 수신안테나(15)를 설치하는데, 상기 수신안테나(15)는 평판형으로 이루어진 식각챔버(10)의 상면에 방사상으로 다수개 설치한다.In addition, a receiving antenna 15 is installed on the upper surface of the etching chamber 10 for uniformity of the plasma entering into the etching chamber 10, and the receiving antenna 15 is a top surface of the etching chamber 10 having a flat plate shape. Multiple radial installations
상기와 같이 구성된 본 고안에 의한 반도체 웨이퍼 식각장치의 작용을 설명하면 다음과 같다.Referring to the operation of the semiconductor wafer etching apparatus according to the present invention configured as described above are as follows.
정전척(11)의 상면에 웨이퍼가 얹혀진 상태에서, 마그네트론(12)의 송출안테나에서 도파관(13)을 통해 송출된 마이크로웨이브를 식각챔버(10)로 유입하면, 상기 식각챔버(10)의 내측에서 플라즈마를 형성하여 웨이퍼의 상면을 식각하게 되는데, 여기서 플라즈마는 가스 분자가 기저 상태나 여기 상태에서 전자, 이온, 원자, 분자에 이르는 여러 가지 종류의 반응성이 큰 물질로 되어 공존하는 상태이다.In the state in which the wafer is placed on the upper surface of the electrostatic chuck 11, when the microwaves sent through the waveguide 13 from the delivery antenna of the magnetron 12 flow into the etching chamber 10, the inside of the etching chamber 10 is opened. The plasma is formed in the wafer to etch the upper surface of the wafer, where the gas molecules coexist as various kinds of highly reactive materials ranging from the ground state or the excited state to electrons, ions, atoms, and molecules.
부연하여 설명하면, 상기 식각챔버(10)의 상면에 설치된 수신안테나(15)는 방사상으로 다수개 설치되므로 상기 수신안테나(15)에 DC전원인 인가되면, 전류는 상기 수신안테나(15)의중심에서 외측방향으로 흐르게 되고, 코일(14)에 의한 전기장은 식각챔버(10)의 외측에서 내측 방향으로 향하게 되어 도너츠 형태의 강한 플라즈마를 생성한다.In detail, since a plurality of receiving antennas 15 are installed radially on the upper surface of the etching chamber 10, when DC power is applied to the receiving antenna 15, current is centered in the receiving antenna 15. In the outward direction, the electric field by the coil 14 is directed from the outside of the etching chamber 10 to the inward direction to generate a strong plasma in the form of donuts.
이와 같이 발생되는 플라즈마는 평판형으로 형성된 식각챔버(10)의 수신안테나(15) 사이에 형성된 슬릿(15a)을 통과하여 웨이퍼에 전달되어 증착막을 균일하게 식각하게 되며, 상기 식각챔버(10)의 평판형으로 이루어진 상면은 플라즈마의 직진성을 향상시켜 웨이퍼에 작용하는 플라즈마의 밀도를 균일하도록 유지시킴으로써 식각균일도를 향상시킨다.The plasma generated as described above passes through the slit 15a formed between the receiving antennas 15 of the etch chamber 10 formed in the shape of a plate to be transferred to the wafer to uniformly etch the deposited film. An upper surface formed of a flat plate shape improves the linearity of the plasma to maintain uniform density of the plasma acting on the wafer, thereby improving the etching uniformity.
이상에서 설명한 바와 같이, 본 고안에 의한 반도체 웨이퍼 식각장치는 플라즈마가 유입되는 식각챔버의 상면을 평판 형상으로 형성하고, 그 식각챔버의 상면에 설치되는 다수개의 수신안테나에 의하여 발생되는 밀도 높은 플라즈마를 웨이퍼에 균일하게 전달하여 웨이퍼의 식각균일성을 향상시키는 효과가 있다.As described above, in the semiconductor wafer etching apparatus according to the present invention, the upper surface of the etching chamber into which the plasma is introduced is formed into a flat plate shape, and a high density plasma generated by a plurality of receiving antennas provided on the upper surface of the etching chamber is formed. By uniformly transferring to the wafer has an effect of improving the etching uniformity of the wafer.
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| Application Number | Priority Date | Filing Date | Title |
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| KR2019970041380U KR200211257Y1 (en) | 1997-12-27 | 1997-12-27 | Semiconductor Wafer Etching Equipment |
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| KR2019970041380U KR200211257Y1 (en) | 1997-12-27 | 1997-12-27 | Semiconductor Wafer Etching Equipment |
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| KR100455350B1 (en) * | 2002-02-08 | 2004-11-06 | 권광호 | Device for prducing inductively coupled plasma and method |
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1997
- 1997-12-27 KR KR2019970041380U patent/KR200211257Y1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR19990028743U (en) | 1999-07-15 |
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