KR20020091400A - Apparatus and method for symbol timing recovery - Google Patents

Abstract

PURPOSE: An apparatus and a method for symbol timing recovery are provided which can detect sampling data from a shift time point as much as jitter included in the first bits of wireless data, and also can detect the sampling data from a center position of the wireless data. CONSTITUTION: A code generator(400) receives an output signal of a RF receiver and generates a sampling signal and then outputs it to a sampling buffer part(410). The sampling buffer part stores the sampling signal and includes a plurality of sampling buffers. An adder part(420) generates a total high pulse(Ztotal) by adding high pulses among the sampling pulse stored in the sampling buffer part, and a high sample detection part(430) detects the number(N) of high bits among the sampling signal. A jitter level calculation part(440) calculates a jitter level by dividing the total high pulse added by the adder part by the number of high bits and then outputs it to a center value detection part(450). And the center value detection part performs a sampling at a center position of a wireless data signal from the shift time point as much as the jitter level.

Description

Apparatus and method for symbol timing recovery {APPARATUS AND METHOD FOR SYMBOL TIMING RECOVERY}

The present invention relates to an apparatus and method for symbol timing recovery, and more particularly, to an apparatus and method for symbol timing recovery for efficiently performing recovery of received wireless data.

In general, RF data is a Bluetooth data stream having a transmission rate of about 1 Mbps (Bit per Second).

The specification of Bluetooth data is as shown in FIG. 1, a 72-bit access code field 100, a 52-bit head field 102, a 238-bit pay load field 104 and a 4-bit taylor. (Tailor) consists of a total of 366 bits, including the 106. Here, the payload field is a substantial data bit field.

A preprocessing system of a wireless communication terminal for receiving wireless data having the above data structure will be described with reference to the accompanying drawings.

2 is a block diagram schematically illustrating a preprocessing system of a wireless data terminal.

Referring to FIG. 2, a preprocessing system of a wireless data terminal includes an RF receiver 210 for receiving wireless data through an antenna 200, a frame detector 220 for detecting an access code in wireless data, and sampling of wireless data. And a data processing unit 230 for performing data processing.

Here, the frame detector 220 includes a symbol timing recovery circuit (hereinafter, referred to as STR) 222 and a correlation detector 224, and the data processor 230 includes an offset corrector 232. , A center sampler 234 and a buffer 236.

The RF receiver 210 receives wireless data through the antenna 200, and the STR 222 of the frame detector 220 detects an access code detection time point in the received wireless data.

The correlation detector 224 detects the access code in the wireless data received from the access code detection time detected by the STR 222.

Here, if the access code in the wireless data signal received by the correlation detector 224 and the previously stored access code are the same, the STR 222 outputs the received wireless data signal to the offset corrector 232.

The offset corrector 232 performs offset correction so that the received radio data is the same as the radio data of the original pattern and outputs the offset data to the center sampler 234.

The center sampler 234 performs sampling to extract an instantaneous value from a center portion of the received wireless data signal, and temporarily stores the sampled wireless data in the buffer 236.

The wireless data received by the wireless communication terminal configured and operated as described above includes a timing jitter component and a noise component due to mechanical vibration, power fluctuation, and system instability during data transmission.

The wireless communication terminal performs symbol timing recovery of the received wireless data due to the deformation of the received wireless data due to the timing jitter component and the noise component.

Referring to the accompanying drawings, STR according to the prior art is as follows.

3 is an internal block diagram of a STR according to the prior art.

Referring to FIG. 3, the STR according to the prior art includes a code generator 300, a sampling buffer unit 310, and a threshold voltage detector 320. Here, the sampling buffer unit 310 includes 720 buffers.

The code generator 300 generates a sampling signal according to the received wireless data signal and outputs the sampling signal to the sampling buffer unit 310. In this case, since the received wireless data is sampled at 10 MHz, that is, 100 ns, the code generator 300 samples 72 access codes of 72 bits in the wireless data.

The sampling buffer unit 310 stores 720 sampling access codes by a shift operation performed at a predetermined time interval (100 ns).

The threshold voltage detector 320 is configured to store 720 sampling access codes by a shift operation of the sampling buffer unit 310 and to simultaneously convert 720 sampling access codes (Zi) and original pattern codes (Si) of the access codes. (Exclusive nor)

In addition, the threshold voltage detector 320 calculates the threshold voltage value Vth based on the sum of the exclusive NOR result values.

Here, the calculated threshold voltage value is about 560, and STR determines that the section having the calculated threshold voltage value or more is the access code detection section.

That is, the STR detects an access code of wireless data from the time point when the threshold voltage value is detected and outputs it to the correlation detector 224 of FIG. 2.

The STR according to the related art configured and operated as described above grasps an access code detection time point by 720 bits of sampling data for an access code of 72 bits, and thus stores 720 bits of sampling data for an access code of 72 bits. 720 sampling buffers are required.

Therefore, since the STR according to the prior art uses 100,000 or more gates for a buffer configuration for storing 720 bits of sampling data in the semiconductor design, not only the configuration is very complicated but also the design cost is too high. .

Accordingly, an aspect of the present invention is to provide a symbol timing recovery apparatus and method for detecting sampling data from a time point shifted by a jitter level included in an initial predetermined bit of wireless data. There is a purpose.

Another object of the present invention is to provide an apparatus and method for recovering symbol timing for detecting sampling data at a center position of sampled radio data.

1 illustrates a Bluetooth data specification.

2 is a block diagram schematically illustrating a preprocessing system of a wireless data terminal.

3 is an internal block diagram of a STR according to the prior art;

4 is a schematic structural block diagram of a symbol timing recovery apparatus according to a first embodiment of the present invention;

5 is a diagram illustrating transmit radio data and receive radio data signal waveforms.

6 is a flowchart for performing symbol timing recovery according to the first embodiment of the present invention.

7 is a schematic structural block diagram of a symbol timing recovery apparatus according to a second embodiment of the present invention;

8 is a flowchart for performing symbol timing recovery according to the second embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

400: code generator 410: sampling buffer

420: summing unit 430: high sample detection unit

440: jitter level calculator 450: center value detector

The present invention for achieving the above object is to sample the first predetermined bit of wireless data, calculate the total sum of at least one of the high and low pulses of the sampled wireless data, and then the high and low pulses of the sampled wireless data Detecting at least one pulse bit number, dividing the calculated total number of high and low pulses by dividing the detected number of bits to calculate the jitter level, and center sampling the radio data from the center position of the radio data duration calculated by the jitter level. Calculating a value, where the center sampling value is sampled in units of the transmission duty of the wireless data; performing symbol timing recovery by comparing the sampled value at the center position of the calculated wireless data with the original pattern access code data of the wireless data. The present invention provides a symbol timing recovery apparatus and method.

Here, the first constant bit is a bit for obtaining a high pulse of at least 5 bits or a bit for obtaining a low pulse of at least 5 bits.

Hereinafter, a preferred embodiment of the symbol timing recovery apparatus and method according to the present invention will be described in detail with reference to the accompanying drawings.

Since the configuration of the wireless data preprocessing system according to the present invention is the same as that of FIG. 1, a detailed description thereof will be omitted.

FIG. 4 is a schematic block diagram of a symbol timing recovery apparatus according to a first embodiment of the present invention, and FIG. 5 is a diagram illustrating a transmission radio data and a reception radio data signal waveform.

Referring to FIG. 4, the symbol timing recovery apparatus according to the first embodiment of the present invention includes a code generator 400, a sampling buffer unit 410, an adder 420, a high sample detector 430, and a jitter level calculator. 440 and a center value detector 450.

The code generator 400 receives an output signal of the RF receiver 210 of FIG. 2, generates a sampling signal according to the output signal, and outputs the sampling signal to the sampling buffer unit 410, and the sampling buffer unit 410 receives the sampling signal. Configured to store temporarily. Here, the sampling buffer unit 410 includes a plurality of sampling buffers.

The adder 420 adds the high pulses of the sampling signals stored in the sampling buffer unit 410 to generate a high pulse total Z _total , and the high sample detector 430 calculates the number of high bits N of the sampling signals. And to detect.

The jitter level calculator 440 is configured to calculate the jitter level by dividing the sum Z _total of the high pulses summed by the adder 420 by the number of high bits N and to output the jitter level to the center value detector 450. .

The center value detector 450 samples the center position of the wireless data signal from the time point shifted by the jitter level and outputs the sample to the correlation detector 224 of FIG. 2.

The symbol timing recovery circuit according to the first embodiment of the present invention configured as described above will be described in detail with reference to FIG.

First, the RF receiver 210 outputs wireless data received through the antenna 200 to the code generator 400, and the code generator 400 generates a sampling signal for the first predetermined bit of the received wireless data.

Here, the wireless data is transmitted at a 1Mbps transmission rate based on the Ver1.0 specification, and the wireless data is transmitted to the RF receiver 210 at a duty of 1 kHz.

That is, the wireless data signal, such as Si of Figure 5, when the transfer rate to 1Mbps by the duty of 1㎲, timing jitter, and the wireless data duty, as in the r _i 5 receives the RF receiver 210 by the noise component Does not become 1㎲.

At this time, the wireless data received by the RF receiver 210 has a timing jitter, but the center value thereof does not change.

The code generator 400 generates a sampling signal for 10 Hz, that is, 10 bits, of the wireless data input from the RF receiver 210 and outputs the sampling signal to the sampling buffer unit 410. Here, the code generator 400 generates 100 sampling signals by sampling 10-bit wireless data at 100 ns. In this case, the 10-bit wireless data is the number of bits for obtaining a high pulse of at least 5 bits according to sampling.

The sampling buffer unit 410 stores 100 sampling signals input from the code generator 400 in the 100 sampling buffer units 410 according to the shift operation.

Summing unit 420, and outputs the sum (Z _total) of the sampling signal resulting from the summation of the first sampling buffer to claim 100 high pulse ( '1') of the sampled signal stored in the sample buffer of the sample buffer 410. The

Here, the start point and the end point at which the high pulses are added by the adder 420 are counted to an internal counter (not shown).

The high sample detector 430 detects a high number N of sampling signals stored in the sampling buffer unit 410 and outputs the number of bits N to the jitter level calculator 440.

The jitter level calculator 740 calculates the jitter level by dividing the sampling sum Z _total by the calculated high bit number N and outputs the jitter level to the center value detector 450. Here, the jitter level is multiplied by a sampling rate equal to 100 ns, and the signal is distorted by the jitter component and the like to represent a signal duration of the radio data received by the RF receiver 210.

The center value detector 450 outputs a sampling signal of the center position of the radio data sampled from the time point shifted by the calculated jitter level to the correlation detector 224.

This will be described in detail as follows.

First, the center value detector 450 obtains the signal duration of the received wireless data by multiplying the calculated jitter level by the sampling rate, and determines the intermediate point of the obtained signal duration as the center position of the wireless data.

For example, if the calculated jitter level is 6 and the sampling rate is 100 ns, the signal duration of the wireless data is 600 ns and the center position of the wireless data is 300 ns. Here, the signal reference point is the start time counted by the counter.

Subsequently, the center value detector 450 detects a sampling signal of the wireless data center position in units of 1 ms, which is a transmission duty ratio of the wireless data, based on 300 ns, the center position of the wireless data, and outputs the sampling signal to the correlation detector 224.

That is, the center value detector 450 determines the time point shifted 300 ns from the start time point as the data sampling detection time point.

The correlation detector 224 detects the access code by the center position sampling signal input from the center value detector 450, and compares the detected access code with the access code of the original pattern. Here, the access code of the original pattern is a reference value known by the radio data transmission side and the radio data reception side by the radio data communication protocol.

The symbol timing recovery apparatus outputs radio data input from the RF receiver 210 to the offset corrector 232 when the detected access code and the original pattern have the same access code.

The offset corrector 232 adjusts the wireless data to be the same as the original pattern signal by the reference signal and outputs the same to the center sampler 234.

The center sampler 234 extracts the wireless data adjusted through the offset corrector 232 at the center position in units of 1 ms and temporarily stores the data in the buffer 236.

A method of performing the symbol timing recovery apparatus according to the first embodiment of the present invention configured and operated as described above will be described with reference to the accompanying drawings.

6 is a flowchart for performing symbol timing recovery according to the first embodiment of the present invention.

First, the code generator 400 of the symbol timing recovery apparatus generates a sampling signal for the first predetermined bit of wireless data input from the RF receiver 210 (S600).

Next, the generated sampling signal is temporarily stored in the sampling buffer unit 410 (S602), and a high pulse sum (Z _total ) is calculated by summing high pulses from the stored sampling signals (S604).

The high sample detector 430 calculates the number of high bits N among the sampling signals stored in the sampling buffer unit 410 (S606), and the jitter level detector 440 calculates the total number of high pulses Z _total . The jitter level is detected by dividing by N) (S608).

Subsequently, the center value detector 450 obtains a signal duration of wireless data by multiplying the detected jitter level by the sampling rate, and generates a data center sampling signal at the center position of the obtained signal duration (S610).

That is, the center value detector 450 identifies the center point of the obtained signal duration as the center sampling signal detection time point, which is a time point shifted by the jitter level from the start time point at which the high pulse summation starts.

A second embodiment of the symbol timing recovery apparatus according to the present invention will be described with reference to the accompanying drawings.

7 is a schematic structural block diagram of a symbol timing recovery apparatus according to a second embodiment of the present invention.

Referring to FIG. 7, the symbol timing recovery apparatus according to the second embodiment of the present invention includes a code generator 700, a sampling buffer unit 710, an adder 720, a row sample detector 730, and a jitter level calculator. 740 and a center value detector 750.

The code generator 700 receives the output signal of the RF receiver 210 of FIG. 2, generates a sampling signal according to the output signal, and outputs the sampling signal to the sampling buffer unit 710, and the sampling buffer unit 710 receives the sampling signal. Configured to store temporarily.

The adder 720 adds the low pulses of the sampling signals stored in the sampling buffer unit 710 to generate a _total sum of the low pulses (Z _total ), and the low sample detector 730 receives the number of low bits (N) of the sampling signals. Is configured to detect.

The jitter level calculator 740 is configured to calculate the jitter level by dividing the sum Z _total of the low pulses summed by the adder 720 by the low bit number N, and output the jitter level to the center value detector 750. .

The center value detector 750 samples from the center position of the wireless data signal from the time point shifted by the jitter level and outputs the sample to the correlation detector 224 of FIG. 2.

That is, the center value detector 450 obtains the signal duration of the received wireless data by multiplying the calculated jitter level by the sampling rate, and determines the median value of the obtained signal duration as the center position of the wireless data.

Subsequently, a sampling signal of a wireless data center location is detected and output to the correlation detector 224 in units of 1 ms, which is a transmission duty of wireless data, based on 300 ns, which is a center location of wireless data.

The operation of the correlation detector 224, the offset corrector 232, the center sampler 234, and the buffer 236 is the same as that of the first embodiment of the present invention, and thus detailed description thereof will be omitted.

A symbol timing recovery method according to a second embodiment of the present invention will be described with reference to the accompanying drawings.

8 is a flowchart for performing symbol timing recovery according to the second embodiment of the present invention.

First, the code generator 700 of the symbol timing recovery apparatus generates a sampling signal for the first predetermined bit of wireless data input from the RF receiver 210 (S800). Here, the first constant bit is the minimum bit for obtaining a low pulse of at least 5 bits according to sampling.

Subsequently, the generated sampling signal is temporarily stored in the sampling buffer unit 710 (S802), and a high pulse sum Z _total is calculated by adding low pulses from the stored sampling signals (S804).

The low sample detector 730 calculates the number of low bits N of the sampling signals stored in the sampling buffer unit 710 (S806), and the jitter level calculator 740 calculates the total number of low pulses Z _total . The jitter level is detected by dividing by (N) (S808).

Subsequently, the center value detector 450 obtains a signal duration of wireless data by multiplying the detected jitter level by the sampling rate, and generates a data center sampling signal at the center position of the obtained signal duration (S810).

That is, the center value detector 450 identifies the center point of the obtained signal duration as the center sampling signal detection time point, which is a time point shifted by the jitter level from the start time point at which the high pulse summation starts.

In addition, the present invention is a mixed form of the first embodiment and the second embodiment, that is, an adder for summing high pulses and low pulses of the sampled radio data, the high bit and the low bit of the sampled radio data. The high sample detector and the low sample detector may be configured to be provided at the same time.

The apparatus and method for recovering symbol timing according to the present invention obtains a total sum of mixing at least one of at least 5 bits of high pulses and at least 5 bits of low pulse signals among predetermined bits of sampling signals, and counts the number of high bits and low bits in the predetermined bits. After calculating at least one of the numbers, the jitter level is obtained by dividing the total sum by the calculated number of bits.

Next, the present invention performs the symbol timing recovery by obtaining the signal duration of the radio data based on the obtained jitter level and obtaining the data center sampling value from the center position of the obtained duration.

Therefore, since the present invention requires only a number of sampling buffers for storing a predetermined bit of sampling signal including a high pulse of at least 5 bits or a low pulse of at least 5 bits, the number of sampling buffers can be extremely reduced. It works.

In addition, according to the present invention, the number of sampling buffers is reduced to a very small number, thereby reducing the number of gates in semiconductor design, thereby improving price competitiveness and performance.

Claims (8)

In the symbol timing recovery apparatus for radio data, A code generator for sampling the first predetermined bit of the radio data; An adder configured to calculate a total sum of at least one of a high pulse and a low pulse of the sampled wireless data; A bit number detector for detecting the number of bits of at least one of a high pulse and a low pulse of the sampled wireless data; A jitter level calculator which calculates a jitter level by dividing the calculated total sum by the detected number of bits; A center value detector for calculating a center sampling value of the radio data from the center position of the radio data duration determined by the jitter level, wherein the center sampling value is sampled in units of transmission duty of the radio data Including but not limited to: And performing symbol timing recovery by comparing the sampling value at the center position of the radio data calculated by the center value detector with the original pattern access code data of the radio data. The method of claim 1, And a buffer equal to the number of bits for temporarily storing the predetermined bit sampling signal. The method of claim 1, And the first predetermined bit is a bit for obtaining a high pulse of at least 5 bits. The method of claim 1, And the first predetermined bit is a bit for obtaining a low pulse of at least 5 bits. In the symbol timing recovery method of the radio data, Sampling the first predetermined bit of the wireless data; Calculating a total sum of at least one of a high pulse and a low pulse of the sampled wireless data; Detecting the number of pulse bits of at least one of a high pulse and a low pulse of the sampled wireless data; Calculating a jitter level by dividing the calculated total sum by the detected number of bits; Calculating a center sampling value of the radio data from a center position of the radio data duration calculated by the jitter level, wherein the center sampling value is sampled in units of transmission duty of the radio data And performing symbol timing recovery by comparing the calculated sampling value at the center position of the radio data with the original pattern access code data of the radio data. The method of claim 5, And as many bits as buffers for temporarily storing the predetermined bit sampling signal. The method of claim 5, Wherein the first predetermined bit is a bit for obtaining a high pulse of at least 5 bits. The method of claim 5, And the first predetermined bit is a bit for obtaining a low pulse of at least 5 bits.