KR20020079659A - AlGaInN semiconductor LED device - Google Patents

AlGaInN semiconductor LED device Download PDF

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KR20020079659A
KR20020079659A KR1020020053653A KR20020053653A KR20020079659A KR 20020079659 A KR20020079659 A KR 20020079659A KR 1020020053653 A KR1020020053653 A KR 1020020053653A KR 20020053653 A KR20020053653 A KR 20020053653A KR 20020079659 A KR20020079659 A KR 20020079659A
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semiconductor device
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KR100497127B1 (en
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유태경
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에피밸리 주식회사
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Abstract

PURPOSE: An AlGaInN semiconductor LED is provided to improve external quantum efficiency by forming n-InGaN layer on p-GaN and etching a predetermined portion of n-InGaN to make prominence and depression so that the light limited by the critical angle can be extracted. CONSTITUTION: A buffer layer(21), an n-GaN layer(22), an InGaN/GaN active layer(23), a p-GaN layer(24) and an n-InGaN crystal layer(25) are formed on an upper surface of a substrate(20) in a consecutive order. An ohmic contact electrode(27) is formed on the depressed surface after a predetermined portion of the upper surface of the n-InGaN crystal layer is etched. A p-type electrode pad(28) and an n-type electrode(26) are deposited on the transparent electrode for electrical connection to the external.

Description

질화갈륨계 반도체 엘이디 소자 {AlGaInN semiconductor LED device}Gallium nitride based semiconductor LED device {AlGaInN semiconductor LED device}

본 발명은 AlGaInN 반도체 LED 소자 및 그 제조 방법에 관한 것으로서, 더욱상세하게는 p-GaN 상에 n InxGa1-xN 층을 형성하고 n 층의 일부를 식각하여 요철을 형성하고 남은 요철의 하단면에 전극을 형성하고, n 층 표면을 요철 형상의 모양으로 만들어 외부 양자 효율을 획기적으로 개선한 질화갈륨계 반도체 소자의 구조에 관한 것이다.The present invention relates to an AlGaInN semiconductor LED device and a method of manufacturing the same. More particularly, the n In x Ga 1-x N layer is formed on p-GaN and a portion of the n layer is etched to form irregularities. The present invention relates to a structure of a gallium nitride-based semiconductor device in which an electrode is formed on a lower surface, and an n-layer surface is formed into an uneven shape to dramatically improve external quantum efficiency.

일반적으로 GaN계 LED(Light Emitting Diode) 광 소자는, 첨부 도면 도 1에 도시된 바와 같이, 사파이어 기판(10) 상에 buffer층(11), n형 GaN 층(12), InGaN/GaN 활성층(13), p형 GaN층(14), 전면의 투명전극(15), n형 금속전극(16) 및 p형 금속전극(17)으로 구성되는 것으로서, 상기 사파이어기판(10) 상에 buffer층(11), n형 GaN 층(12), InGaN/GaN 활성층(13) 및 p형 GaN층(14)을 순차적으로 결정 성장 한 후, n형 금속전극(16)의 형성을 위해 일부분을 상기 n형 GaN층(12)까지 식각(etching)하고, p-형 GaN 전면에 투명 전극(15)을 형성한 다음, n형 금속전극(17) 및 p형 금속전극(18)을 증착함으로써 형성된다.In general, a GaN-based light emitting diode (LED) optical device includes a buffer layer 11, an n-type GaN layer 12, and an InGaN / GaN active layer on a sapphire substrate 10, as shown in FIG. 1. 13), a p-type GaN layer 14, a transparent electrode 15 on the front surface, an n-type metal electrode 16 and a p-type metal electrode 17, the buffer layer on the sapphire substrate 10 ( 11) after the n-type GaN layer 12, the InGaN / GaN active layer 13, and the p-type GaN layer 14 are grown in sequential order, a portion of the n-type metal electrode 16 is formed to form the n-type metal electrode 16. It is formed by etching to the GaN layer 12, forming a transparent electrode 15 on the entire surface of the p-type GaN, and then depositing the n-type metal electrode 17 and the p-type metal electrode 18.

도 1에서 보이듯이 기존의 LED에는 p-GaN의 저항율이 매우 높으므로 전류 확산을 용이하게 하기 위해서 NiAu 등과 같은 다양한 종류의 투명 오믹 전극(15)을 채용하고 있다. 이러한 투명전극은 일반적으로 수 nm에서 수십 nm 두께를 가지는데 두께를 늘리면 p-GaN 층의 횡 방향 직렬저항이 줄어드는 효과가 있지만 금속 전극의 광투과율이 낮아져서 상측으로 방출되는 빛이 줄어들게 되어 외부 양자효율이 감소하게 된다. 투명 전극의 투과율은 두께 및 공정의 변화도에 따라 보통 60 ~ 80% 정도를 가진다. 이 경우 상측으로 방출되어야 할 빛의 20% ~ 40%는 chip 위로방출되지 못하는 단점이 있다.As shown in FIG. 1, since the resistivity of p-GaN is very high, conventional LEDs employ various kinds of transparent ohmic electrodes 15 such as NiAu to facilitate current spreading. These transparent electrodes generally have a thickness of several nm to several tens of nm, and increasing the thickness reduces the lateral series resistance of the p-GaN layer, but the light transmittance of the metal electrode is lowered, so that the light emitted to the upper side reduces the external quantum efficiency. This decreases. The transmittance of the transparent electrode is usually 60 to 80% depending on the thickness and the degree of change of the process. In this case, 20% ~ 40% of the light to be emitted to the upper side has a disadvantage that can not be emitted over the chip.

또한 LED의 광효율은 내부 양자 효율과 외부 양자 효율로 나누어지며 내부 양자 효율은 활성층의 설계나 품질에 따라서 결정된다. 외부 양자 효율의 경우 활성층에서 발생된 빛이 chip의 외부로 나오는 정도에 따라서 결정된다. 일정한 굴절율을 가진 GaN 물질이나 sapphire의 경우 굴절율이 1인 공기중으로 빛이 나오기 위해서는 임계각을 넘어야 한다. 도 2는 굴절율이 서로 다른 GaN과 공기 또는 수지사이에서 각 물질의 굴절율에 따른 굴절각을 보였다. 그림에서 보이듯이 탈출각 θ2 = 90도인 임계각 qc = sin-1(nlow/nhigh) 로 표시되고 GaN에서 chip의 상측 공기중으로 빛이 진행할 때 임계각은 약 23.6도가 된다. 그 이상의 각도로 발생되는 빛은 chip의 내부로 다시 돌아가게 되고 빛이 chip 내부에 가두어 지게 되고 epi 층 내부 또는 사파이어 wafer 내에서 흡수가 되어 외부 양자효율은 급격히 떨어지게 된다.In addition, the light efficiency of the LED is divided into internal quantum efficiency and external quantum efficiency, and the internal quantum efficiency is determined by the design and quality of the active layer. In the case of external quantum efficiency, the light generated from the active layer is determined according to the degree to which the chip comes out of the chip. In the case of GaN material or sapphire with a constant refractive index, it is necessary to cross the critical angle in order for the light to flow into the air having a refractive index of 1. Figure 2 shows the refractive angle according to the refractive index of each material between GaN and air or resin having different refractive index. As shown in the figure, the critical angle qc = sin-1 (n low / n high ) with escape angle θ2 = 90 degrees, and when the light travels from GaN into the air above the chip, the critical angle is about 23.6 degrees. Light generated at more angles is returned to the inside of the chip, and the light is confined inside the chip and absorbed in the epi layer or the sapphire wafer.

본 발명은 상기한 문제점을 해결하기 위하여 안출된 것으로서, 본 발명의 목적은 p-GaN 상에 n InxGa(1-x)N 층을 형성하고 n InGaN 층의 일부를 식각하여 요철을 형성하며 요철의 하단면에 n형 투명 오믹 전극을 형성하고 n 층 표면에 생긴 모양을 이용하여 임계각에 제한되는 빛을 외부로 추출하여 외부 양자 효율을 획기적으로 개선한 질화 갈륨계 반도체 엘이디 소자의 구조에 관한 것이다.SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to form an n InxGa (1-x) N layer on p-GaN and to form an unevenness by etching a portion of the n InGaN layer. The present invention relates to a structure of a gallium nitride-based semiconductor LED device in which an n-type transparent ohmic electrode is formed on a bottom surface and a shape formed on an n-layer surface is extracted to the outside, thereby greatly improving external quantum efficiency.

도 1은 종래 GaN계 반도체 광 소자의 구조를 도시한 단면도.1 is a cross-sectional view showing the structure of a conventional GaN-based semiconductor optical device.

도 2는 GaN 층에서 빛의 탈출 임계각을 설명하는 그림.2 is a diagram illustrating the escape angle of light in the GaN layer.

도 3는 본 발명에 따른 AlGaInN 반도체 광 소자의 구조를 도시한 단면도.3 is a cross-sectional view showing the structure of an AlGaInN semiconductor optical device according to the present invention;

도 4은 본 발명에 의한 n 층의 구조를 설명하는 세부 단면도.4 is a detailed cross-sectional view illustrating the structure of the n-layer according to the present invention.

도 5는 본 발명에 의한 n 층과 p 층의 동작 원리를 설명하는 에너지 밴드 다이어그램.5 is an energy band diagram for explaining the principle of operation of the n layer and p layer according to the present invention.

〈 도면의 주요 부분에 대한 부호의 설명 〉<Description of the code | symbol about the principal part of drawing>

10, 20. 기판 11, 21. 버퍼층10, 20. Substrate 11, 21. Buffer layer

12, 22. n - GaN 층 13, 23. InGaN/GaN 활성층12, 22.n-GaN layer 13, 23.InGaN / GaN active layer

14, 24, 34. p - GaN층 15, 27, 37. 투명전극14, 24, 34.p-GaN layer 15, 27, 37. transparent electrode

25, 35. n InGaN층 16, 26. n형 금속전극25, 35. n InGaN layer 16, 26. n-type metal electrode

17, 28. p 형 금속 전극 39. 광 경로17, 28. p-type metal electrode 39. Optical path

이와 같은 목적을 달성하기 위해서 본 발명에 따른 질화 갈륨계 반도체 소자는 n-p-n 접합 다이오드 구조를 갖는 GaN계 반도체 소자에 있어서, 기존 반도체 LED 소자의 맨 위층인 P-GaN 층 상측에 소정의 두께를 갖는 n 형 InGaN/GaN 결정층을 형성하고 n 층의 일부를 가공하여 n 층 상에 오옴형 전극을 형성하고 표면을 울퉁불퉁하게 하여 외부 양자효율을 획기적으로 개선한 구조를 가진 것을 특징으로 한다.In order to achieve the above object, the gallium nitride based semiconductor device according to the present invention is a GaN based semiconductor device having an npn junction diode structure, wherein n has a predetermined thickness on top of a P-GaN layer, which is the top layer of a conventional semiconductor LED device. A type InGaN / GaN crystal layer is formed, and a portion of the n layer is processed to form an ohmic electrode on the n layer, and the surface is rugged, thereby improving the external quantum efficiency.

본 발명에 의한 LED 소자를 첨부 도면에 의거 상세히 설명하면 다음과 같다.Referring to the LED device according to the present invention in detail based on the accompanying drawings as follows.

첨부된 도면 도 3은 본 발명에 따른 반도체 광 소자의 구조를 도시한 단면도이다.3 is a cross-sectional view illustrating a structure of a semiconductor optical device according to the present invention.

도 3에 도시된 바와 같이, 본 발명은 기존의 p-n형 구조와는 달리 n-p-n 다이오드 구조의 GaN계 반도체 광소자로서, 기판(20) 위에 버퍼층(21), n-GaN층(22), InGaN/GaN 활성층(23), p-GaN 층(24), n InxGa(1-x)N 결정층(25)을 순차적으로 형성한 후 상기 n InxGa(1-x)N 층(25) 상부 표면의 n 층의 일부를 식각하고, 소정의 두께가 되도록 n 층의 일부를 남기는데, 소정의 두께로 남게 되는 n 충은 n 층상에 형성되는 n-오옴 접촉형 금속과 n 층 아래의 얇게 구성된 n 상에 오옴 접촉형 투명 전극(27)을 형성하고 투명 전극상에 외부로의 전기적 연결을 위한 p-형 전극 패드(28)를 형성하고 n 층의 일부와 p층의 일부, 그리고 활성층의 일부를 식각하고 n-GaN 층 상에 n - 형 전극(26)을 형성한다.As shown in FIG. 3, the present invention is a GaN-based semiconductor optical device having an npn diode structure, unlike a conventional pn-type structure, and includes a buffer layer 21, an n-GaN layer 22, and InGaN / on a substrate 20. The GaN active layer 23, the p-GaN layer 24, and the n In x Ga (1-x) N crystal layer 25 are sequentially formed, and then the n In x Ga (1-x) N layer 25 A portion of the n layer of the top surface is etched away, leaving a portion of the n layer to be of a predetermined thickness, where n charges remaining at the predetermined thickness are thinned below the n layer with the n-ohm contact metal formed on the n layer. Forming an ohmic contact transparent electrode 27 on the configured n and forming a p-type electrode pad 28 for electrical connection to the outside on the transparent electrode and forming a portion of the n layer and a portion of the p layer, and an active layer A portion is etched and n-type electrode 26 is formed on the n-GaN layer.

상기 n InxGa1-xN(O≤x≤1) 결정층(25)은 1.0 nm ≤t ≤ 10,000 nm 정도의 두께로 성장되며, n 도핑 농도는 1017/cm3〈 n 〈 1023/cm3으로 구성한다.The n In x Ga 1-x N (O ≦ x1 ) crystal layer 25 is grown to a thickness of about 1.0 nm ≦ t ≦ 10,000 nm, and the n doping concentration is 10 17 / cm 3 <n <10 23 / cm 3 .

도 4는 얇게 구성된 n 상에 오옴 접촉형 투명 전극(27)을 형성한 후의 세부 단면도를 보이고 있다. n 층의 일부를 식각하여 표면을 요철 형상으로 만들어 활성층에서 방출된 빛의 광 탈출 유효각도를 키움으로써 외부 양자효율을 개선할 수 있음을 보이고 있다.4 shows a detailed cross-sectional view after forming the ohmic contact type transparent electrode 27 on the thinly configured n. It has been shown that the external quantum efficiency can be improved by etching a part of the n layer to form an uneven surface to increase the effective angle of light escape of the light emitted from the active layer.

도 5는 도 3의 B - B' 단면에서의 에너지 밴드 다이어그램을 보이고 있는데 n InxGa1-xN(0≤x≤1) 층과 금속 전극 그리고 p 층이 구성하는 터널 접합의 원리를 설명하고 있다. 금속 전극에 (+) 전압을 공급할 경우 홀(hole)이 터널 현상에 의해 p GaN 층으로 진행하기 위해서 얇은 n InxGa1-xN(0≤x≤1) 층이 형성된 구조를 보이고 있다.FIG. 5 shows an energy band diagram in cross section B-B 'of FIG. 3, illustrating a principle of tunnel junction composed of an n In x Ga 1-x N (0 ≦ x ≦ 1) layer, a metal electrode, and a p layer. Doing. When a positive voltage is supplied to the metal electrode, a thin n In x Ga 1-x N (0 ≦ x ≦ 1) layer is formed in order for a hole to progress to the p GaN layer due to a tunnel phenomenon.

상기된 바와 같이 본 발명은 외부 양자효율을 획기적으로 개선한 새로운 구조의 반도체 소자이다. 도 2에서 보이듯이 60 ~ 80% 정도를 가지는 투명 전극의 면적을 최소화 하여 chip 상측면으로의 광 방출 효율을 개선하는 구조를 가지고 있다. 또한 3도에서 보이듯이 chip의 표면을 요철 형상으로 만들어 활성층에서 방출된 빛의 광 탈출 유효각도를 키움으로써 외부 양자효율을 개선할 수 있음을 보이고 있다.As described above, the present invention is a semiconductor device having a new structure that significantly improves external quantum efficiency. As shown in Figure 2 has a structure to improve the light emission efficiency to the upper side of the chip by minimizing the area of the transparent electrode having about 60 ~ 80%. In addition, as shown in FIG. 3, the surface of the chip has an uneven shape to increase the effective angle of light escape of the light emitted from the active layer, thereby improving the external quantum efficiency.

상기한 바와 같이 이루어지는 본 발명에 의하면, p-GaN층 상부에 n InxGa1-xN(0≤x≤1)층을 형성하고 n InxGa1-xN(0≤x≤1) 층의 일부를 소정의 n InxGa1-xN(0≤x≤1) 층이 남도록 식각하고, 얇게 남은 n InxGa1-xN(0≤x≤1) 층 위에 투명 금속 전극을 형성하여 투명 전극의 면적을 최소화하여 빛의 외부 방출을 최대화 하고, 터널 현상에 의해 n - 금속 전극에서 n 층을 통해서 p-GaN으로 hole이 공급되도록 하여 p-층에 직접 오옴 접촉을 형성하는 것에 비해 낮은 동작 전압으로 구동되게 하여 소모 전력을 줄일 수 있고, n InxGa1-xN(0≤x≤1) 층의 표면을 요철 형상으로 형성함으로써 빛의 탈출 임계각을 변형시켜 활성층에서 chip의 상부로 방출되는 빛의 양을 극대화 하여 외부 양자효율을 획기적으로 개선할 수 있다.According to the present invention made as described above, an n In x Ga 1- xN (0 ≦ x1 ) layer is formed on the p-GaN layer and an n In x Ga 1-x N (0 ≦ x ≦ 1) layer. Is partially etched so that a predetermined n In x Ga 1-x N (0≤x≤1) layer remains, and a transparent metal electrode is formed on the thinly left n In x Ga 1-x N (0≤x≤1) layer. To maximize the external emission of light by minimizing the area of the transparent electrode, and to supply holes to the p-GaN through the n-layer from the n-metal electrode by tunneling, thereby forming a direct ohmic contact on the p-layer. Power consumption can be reduced by driving at a lower operating voltage, and the surface of the n In x Ga 1-x N (0≤x≤1) layer is formed into a concave-convex shape, thereby modifying the exit angle of the light so that the upper portion of the chip in the active layer By maximizing the amount of light emitted, the external quantum efficiency can be dramatically improved.

Claims (9)

n-p-n 접합 다이오드 구조를 갖는 GaN계 반도체 소자에 있어서,In a GaN-based semiconductor device having an n-p-n junction diode structure, 반도체 소자의 맨 위층인 p-GaN층 상측의 상부에 n 층의 InxGa1-xN(0≤x≤1) 층을 형성하고 n 층의 일부를 식각하여 소정의 n 층을 남기고, 얇게 남은 n InxGa1-xN(0≤x≤1) 상에 투명 n -오옴 금속 접합을 형성하여 식각되지 않은 n InxGa1-xN(0≤x≤1) 층의 표면을 요철 형상으로 만들어 활성층에서 chip의 상부로 방출되는 빛의 양을 최대화 한 반도체 소자.An n-layer In x Ga 1-x N (0≤x≤1) layer is formed on top of the p-GaN layer, which is the top layer of the semiconductor device, and a portion of the n layer is etched to leave a predetermined n layer and thin. Form a transparent n-ohm metal junction on the remaining n In x Ga 1-x N (0≤x≤1) to uneven the surface of the unetched n In x Ga 1-x N (0≤x≤1) layer. A semiconductor device that has been shaped to maximize the amount of light emitted from the active layer to the top of the chip. p 층 상부에 있는 InxGa1-xN의 In 조성 x는 활성층 InzGa1-zN의 z보다 작게 구성되는 것, 즉 x 〈 z.The In composition x of In x Ga 1-x N on top of the p layer is made smaller than z in the active layer In z Ga 1-z N, ie x <z. 제 1항에 있어서, 상기 n InxGa1-xN(0≤x≤1) 결정층은 식각하기 전에 두께(h2)를 1.0 ~ 10,000 nm의 두께로 형성되는 것.The method of claim 1, wherein the n In x Ga 1-x N (0 ≦ x ≦ 1) crystal layer is formed to have a thickness h2 of 1.0 to 10,000 nm before etching. 제 1항에 있어서, 식각되고 남은 n InGaN 층(h1)은 0.5 ~ 100nm의 두께로 형성되는 것.The n InGaN layer (h1) remaining after etching is formed to a thickness of 0.5 to 100nm. 제 1항에 있어서, n InGaN의 도핑농도를 1017~ 1023/cm3으로 조성하는 것을 특징으로 하는 질화 갈륨계 LED 반도체 소자.The gallium nitride based LED semiconductor device according to claim 1, wherein the doping concentration of n InGaN is set to 10 17 to 10 23 / cm 3 . 제 1항에 있어서, 요철의 폭(d1)은 100nm ~ 100,000nm로 형성되는 것.The width d1 of the unevenness is formed in a range of 100 nm to 100,000 nm. 제 1항에 있어서, 식각된 부분의 폭(d2)는 100nm ~ 100,00nm로 형성되는 것.The method of claim 1, wherein the width (d2) of the etched portion is formed to 100nm ~ 100,00nm. n-p-n 접합 다이오드 구조를 갖는 GaN계 반도체 소자에 있어서,In a GaN-based semiconductor device having an n-p-n junction diode structure, 반도체 소자의 맨 위층인 p-GaN층 상측의 상부에 n 층의 InzGa1-zNz(0≤z≤1) 층을 형성하고, 다른 인듐 량을 가진 n 층의 InyGa1-yN(0≤y≤1)층을 차례로 성장하고, 상층의 n InyGa1-yN(0≤y≤1) 층의 일부를 선택적으로 식각하여 하층의 n InzGa1-zN(0≤z≤1)층을 남기고, 얇게 남은 n InzGa1-zN(0≤z≤1) 상에 투명 n - 오옴 금속 접합을 형성하여 투명 전극의 면적을 최소화 하고, n InyGa1-yN(0≤y≤1) 층의 표면을 요철 형상으로 하여 활성층에서 chip의 상부로 방출되는 빛의 양을 최대화 한 반도체 소자.An n-layered In z Ga 1-z Nz (0 ≦ z ≦ 1) layer is formed on top of the p-GaN layer, which is the top layer of the semiconductor device, and n-layered In y Ga 1-y having different indium content. N (0≤y≤1) layers are grown in sequence, and a portion of the upper n In y Ga 1-y N (0≤y≤1) layer is selectively etched to lower n In z Ga 1-z N ( Leaving a layer of 0≤z≤1) and forming a transparent n-ohm metal junction on the thin n In z Ga 1-z N (0≤z≤1) to minimize the area of the transparent electrode, and n In y Ga A semiconductor device in which the surface of the 1-y N (0 ≦ y ≦ 1) layer is formed into an uneven shape to maximize the amount of light emitted from the active layer to the top of the chip. 제 8항에 있어서, 상층의 n InyGa1-yN(0≤y≤1) 결정층은 1.0 ~ 10,000 nm의두께로 형성되고, 하층의 n InzGa1-zNz(0≤z≤1) 층은 1.0 - 100nm의 두께로 형성되고, 두 가지의 n 층의 도핑농도를 1017~ 1023/cm3으로 조성하는 것을 특징으로 하는 질화 갈륨계 LED 반도체 소자.9. The method of claim 8, wherein the upper n In y Ga1- y N (0≤y≤1) crystal layer is formed to a thickness of 1.0 ~ 10,000 nm, the lower n In z Ga 1-z Nz (0≤z≤ 1) A layer is formed with a thickness of 1.0-100nm, gallium nitride-based LED semiconductor device characterized in that the doping concentration of the two n-layer to 10 17 ~ 10 23 / cm 3 to form.
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Family Cites Families (4)

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