KR20020073819A - Apparatus and method of generating vertical synchronization signal for stable monitor display - Google Patents

Abstract

PURPOSE: A device and a method for generating vertical synchronizing signals for stable screen display are provided to maintain a uniform interval between vertical synchronizing signals and active lines of respective fields when displaying PC signals of a predetermined mode in which the numbers of lines are changed per field, thereby obtaining stable screen output. CONSTITUTION: A device for generating vertical synchronizing signals for stable screen display includes a line counter(20) for counting horizontal synchronizing signals in response to vertical synchronizing signals applied from the outside, measuring a period of vertical synchronizing signals of each field by the counting result, and outputting the measurement results as field information and the correction amount information requested per field, a correction amount storing part(22) for storing the correction amount information, a multiplexer(24) for outputting one of the correction amount information selectively in response to the field information, and an adder(26) for outputting signals shifting the vertical synchronizing signals by a preset value and final vertical synchronizing signals by adding the selected correction amount information.

Description

Apparatus and method of generating vertical synchronization signal for stable monitor display

The present invention relates to an image processing system, and more particularly, to an apparatus and method for generating a vertical synchronization signal for stable screen display.

Recent advances in semiconductor and television set technology have made it possible to progressively scan progressive signals on television Cathode Ray Tubes (CRT) screens. In addition, as sequential scanning is enabled in a TV set, an application technology for outputting a signal of a personal computer (hereinafter referred to as a PC) using a sequential scanning method from a TV set has been developed. In general, the vertical synchronization frequency is 60 Hz in the NTSC (National Television System Committee). When the image signal including the 60 Hz vertical synchronization signal is converted into a sequential scanning method, the image signal of each field is stored in a storage element such as a memory. The stored video signal of each field is generated as a new video signal having improved screen density by the information between the fields. At this time, the frequency of the horizontal synchronizing signal is doubled than the horizontal synchronizing signal (15750 Hz) of the general video signal, and the frequency of the vertical synchronizing signal is the same as the vertical synchronizing signal (60 Hz) of the general video signal. However, when a signal output from a PC is input to the TV SET, the following problem may occur. For example, the signal output in a particular mode, such as the VGA3 mode of a PC, varies from field to field rather than the fixed number of lines per field to 525. Specifically, 524 lines and 526 lines repeatedly appear in every field. Therefore, when displaying an image signal on the CRT, the actual image information displayed on the CRT and the positioning signal for determining the position of the image information are not generated in the same manner, and a time difference may appear due to a delay between components of the CRT. Can be. To correct this, the TV adjusts the position of the horizontal / vertical sync signal of the video signal. In addition, since the number of active lines of the video signal is different according to the type of the input video signal, the area to be displayed on the CRT should be adjusted. In order to perform this function, an image processing integrated circuit (IC) inside the TV generates an internal horizontal / vertical synchronization signal using a horizontal / vertical synchronization signal of an externally applied image signal. If a vertical synchronization signal is generated by processing a video signal having a same number of lines per field as a normal TV signal such as a synchronization signal in the VGA3 mode, the screen may flicker.

1 is a waveform diagram illustrating a conventional vertical synchronization signal generation process, in which FIG. 1 (a) shows a vertical synchronization signal VSYNC_IN input from the outside, and FIG. 1 (b) shows a vertical line counting value CNT. 1 (c) shows the moved vertical synchronization signal M_VSYNC.

Referring to FIG. 1, in order to adjust the position of an image signal, the vertical synchronization signal VSYNC_IN of FIG. 1A input from an external PC is 523 by the line counting value CNT of FIG. 1B. Line is moved. Therefore, the vertical synchronization signal M_VSYNC moved as shown in FIG. 1C is generated. For example, when the vertical line of the input image signal is 524 lines, the vertical synchronization signal is generated by moving 523 lines from the input vertical synchronization signal as shown in FIG. Referring to FIG. 1C, it can be seen that there is a difference of three lines in the period T3 from the vertical synchronization signal generated in the T1 field to the active line of the T2 field. However, since the vertical line of the T2 field is 526 lines, when the vertical synchronization signal M_SYNC is generated by delaying the 523 lines as in the previous field, the vertical synchronization signal and the active line as shown in the section T4 of FIG. There will be a five-line difference between them.

As described above, in case of generating an internal vertical synchronization signal by delaying the vertical synchronization signal of the input image signal by a certain number of lines, if the number of lines in each field is the same, the active line including the image signal and the vertical synchronization signal are Maintained at equal intervals. However, in the case of the VGA 3 mode signal having a different number of lines between each field, the distance between the active line and the vertical synchronization signal is different. Since the vertical synchronizing signal is a reference signal for the vertical position of the image displayed on the CRT, when the distance between the image signal and the vertical synchronizing signal is different for each field, the position of the screen changes according to the period of the vertical synchronizing signal. In this case, there is a problem that the input video signal cannot be stably displayed on the TV screen.

An object of the present invention is to provide a vertical synchronization signal generator of a video signal capable of stably displaying a vertical synchronization signal on a TV screen by correcting the position of the vertical synchronization signal with respect to a PC signal of a specific mode in which the number of lines changes for each field. To provide.

Another object of the present invention is to provide a vertical synchronization signal generation method for stable screen display.

1 (a) to 1 (c) are waveform diagrams for explaining a conventional vertical synchronization signal generation process.

2 is a block diagram illustrating a vertical synchronization signal generator according to an embodiment of the present invention.

3 (a) to 3 (f) are waveform diagrams for explaining the operation of the apparatus shown in FIG.

FIG. 4 is a flowchart for describing a method of generating a vertical synchronization signal performed in the apparatus shown in FIG. 2.

In order to achieve the above object, the vertical synchronizing signal generating apparatus for stable screen display according to the present invention, counting the horizontal synchronizing signal in response to the vertical synchronizing signal applied from the outside, the vertical synchronizing signal of each field by the counted result A line counter for measuring the period of the signal and outputting the measured result as field information and correction amount information required for each field, a correction amount storage unit for storing correction amount information required for each field, and one of correction amount information in response to the field information And a multiplexer for selectively outputting the signal and a adder for outputting the final vertical synchronizing signal by adding the selected correction amount information by moving the vertical synchronizing signal by a predetermined value.

In order to achieve the above object, the vertical synchronization signal generation method for a stable screen display according to the present invention, counting the horizontal synchronization signal in response to the vertical synchronization signal applied from the outside, the vertical synchronization of each field by the counted result Measuring the period of the signal, obtaining field information and a correction amount for each field corresponding to the field information based on the period measurement result of the vertical synchronization signal, determining whether one of the fields is selected by the field information, and the field If is selected, it is preferably configured to output the final vertical synchronizing signal by adding the correction amount corresponding to the selected field with the movement amount of the vertical synchronizing signal.

Hereinafter, an apparatus and method for generating a vertical synchronization signal of an image signal according to the present invention will be described with reference to the accompanying drawings.

2 is a schematic block diagram illustrating an apparatus for generating a vertical synchronization signal of an image signal according to an embodiment of the present invention. Referring to FIG. 2, the vertical synchronization signal generator includes a line counter 20, a register 22, a multiplexer 24, and an adder 26.

The line counter 20 counts the horizontal synchronizing signal HSYNC_IN in response to the external vertical synchronizing signal VSYNC_IN, and measures the period of the vertical synchronizing signal of each field based on the counted result. In addition, the line counter 20 outputs the period measurement result of the vertical synchronization signal as the field information F_INF and the correction amount information CORR required for each field. Here, the field information F_INF is obtained according to the rule of the vertical synchronization signal period that appears repeatedly for each field. For example, in the VGA3 mode of the PC, since the vertical synchronization signal has two lines per field, the field information F_INF may be displayed as "1" and "0". However, in the case of the VGA3 mode, when the number of lines per field is represented by four types instead of two types, the field information F_INF may be set to indicate four states of 0 to 3. Therefore, the correction amount information CORR output from the line counter 20 has a different value for each field.

The register 22 stores correction amount information CORR required for each field output from the line counter 20. The multiplexer 24 inputs the field information F_INF output from the line counter 20 as a selection signal, and selectively outputs one of the correction amounts output from the register 22 in response to the field information F_INF. At this time, the selected correction amount is represented by S_CORR. The adder 26 generates the corrected vertical sync signal VSYNC by adding the correction amount output from the multiplexer 24 and the vertical sync signal M_VSYNC moved by a predetermined number of lines.

3 (a) to 3 (f) are waveform diagrams for explaining the operation of the apparatus shown in FIG. 2, and FIG. 3 (a) shows a vertical synchronization signal VSYNC_IN input from the outside. b) shows the line counting value CNT, FIG. 3C shows the shifted vertical synchronization signal M_VSYNC, FIG. 3D shows the field information F_INF, and FIG. 3E shows the correction amount. The information CORR is shown, and FIG. 3 (f) shows the corrected vertical sync signal VSYNC.

4 is a flowchart for explaining a method performed in the apparatus of FIG. 2. 2 to 3 will be described in detail with respect to the operation and generation method of the vertical synchronization signal generator according to the present invention.

First, it is assumed that an image signal is input from an external PC as shown in Fig. 3A. At this time, the line counter 20 of FIG. 2 is reset by the vertical synchronizing signal VSYNC_IN of FIG. 3 (a) included in the input video signal, and counts the horizontal synchronizing signal HSYNC_IN. The period of the vertical synchronization signal of the fields T31 and T32 is measured (step 400). The counting value of the horizontal sync signal, that is, the line counting value CNT, is shown in FIG. 3 (b). The field information F_INF of FIG. 3 (d) and the correction amount information CORR of FIG. 3 (e) for the corresponding field are generated according to the period measurement result of the vertical synchronization signal of each field obtained in operation 400 (second). Step 410). The sections T31 and T32 of FIG. 3A represent different field sections, and are composed of 524 lines and 526 lines, respectively. For example, the section T31 is assumed to be field 0, and the section T32 is assumed to be field 1. The correction amount information CORR for the corresponding field is stored in the register 22 as described above.

At this time, it is determined whether one of the fields is selected by the field information F_INF in the multiplexer 24 (step 420). When the field is selected in operation 420, the correction amount S_CORR corresponding to the selected field is output from the multiplexer 24, and is added to the movement amount M_VSYNC of the vertical synchronization signal to determine the final vertical synchronization signal VSYNC of FIG. ) Is output (step 430). Referring to FIG. 3C, the vertical sync signal M_VSYNC, which moves the external vertical sync signal VSYNC_IN by 523 lines, differs by an interval of T34 and T35 between the active lines of the next field. As shown in Fig. 3 (c), T34 represents three lines and T35 represents five lines. However, referring to the periods T36 and T37 of FIG. 3F, it can be seen that the corrected vertical synchronization signal VSYNC has a constant three-line difference between the vertical synchronization signal and the active line of every field.

According to the present invention, when displaying a PC signal of a specific mode in which the number of lines varies from field to field on a TV, a stable screen output can be obtained by maintaining a constant distance between the vertical synchronization signal and the active line of each field. .

Claims (3)

Counting the horizontal synchronizing signal in response to an externally applied vertical synchronizing signal, measuring the period of the vertical synchronizing signal of each field by the counted result, and using the measured result as field information and correction amount information required for each field An output line counter; A correction amount storage unit for storing correction amount information required for each field; A multiplexer for selectively outputting one of the correction amount informations in response to the field information; And And an adder configured to add a signal for moving the vertical synchronizing signal by a predetermined value and the selected correction amount information to output a final vertical synchronizing signal. The vertical synchronization signal generator of claim 1, wherein the correction amount storage unit is implemented as a register. Counting a horizontal synchronizing signal in response to an externally applied vertical synchronizing signal, and measuring a period of the vertical synchronizing signal of each field based on the counted result; Obtaining field information and a correction amount for each field corresponding to the field information based on a period measurement result of the vertical synchronization signal; Determining whether one of the fields is selected by the field information; And And if the field is selected, adding a correction amount corresponding to the selected field with the movement amount of the vertical synchronization signal to output a final vertical synchronization signal.