KR20020043730A - AGC device of the CDMA mobile communication system using a digital input/output level signal - Google Patents

Abstract

PURPOSE: An AGC(Automatic Gain Control) apparatus for a CDMA(Code Division Multiple Access) mobile communication system using a digital input and output level signal is provided to secure the control reliability of the AGC apparatus by adjusting the signal strength of a transmission output through a digital signal. CONSTITUTION: A baseband signal process block(1) detects digital I and Q signals of a baseband domain transmitted from a base band transmission board, uses the detected digital I and Q signals as a transmission AGC judgement signal, and detects a transmission output signal of the last terminal. A processor(2) controls the function of the baseband signal process block(1) and functions of the base station transmission board. An up-converter board(3) detects the last transmission output according to a function control signal of the processor(2), demodulates the detected function control signal as I and Q signals, and inputs the demodulated I and Q signals to the baseband signal process block(1). The up-converter board(3) judges detection transmission output strength values inputted from the baseband signal process block(1) and adjusts a transmission output level of the last terminal.

Description

AGC device of the CDMA mobile communication system using a digital input / output level signal}

The present invention relates to an AGC device of a CDMA mobile communication system using a digital input / output level signal. In particular, the digital input level detection unit provided with the digital output level detection unit at the FPGA stage of the transmission board detects and transmits a digital IQ modulation signal. CDMA mobile communication using digital input / output level signal which provides the reference value of output signal strength and compares it with the analog transmission output signal strength detected at the last stage using this reference value and then uses the difference signal to correct the strength of CDMA transmission output. It is about the AGC device of the system.

In general, mobile communication systems have been rapidly developed as the industrial society has spread rapidly. Especially in the early 1980s, in North America, the service area was divided into hexagonal cells of several km to several ten kilometers in diameter, and then in the geographically separated cells. The mobile communication system has grown rapidly by using a cellular mobile communication system that uses the same frequency channel repeatedly and implements a radio channel switching function between cells as the subscriber moves.

On the other hand, these mobile communication systems typically use FDMA, TDMA and CDMA as their access methods, among which CDMA modulates a transmission signal by assigning different codes with low correlation to each subscriber and transmits the code to the receiver. Demodulation is performed with the same code. A terminal or base station transmission system using such a CDMA system usually includes a transmission board and a reception board to form a call with a CDMA terminal. The transmission board detects a signal at a final output terminal and automatically transmits a transmission output level. It is usually equipped with an automatic gain control (AGC) device that adjusts with

Then, referring to FIG. 1, a transmission board of a conventional mobile communication system equipped with an AGC device as described above, receives a digital I signal and a Q signal of a baseband (hereinafter, referred to as a baseband) region respectively and receive an analog basis. A baseband signal processing block 70 for processing into a band signal, a processor 71 including the baseband signal processing block 70 for overall control of the function of the transmission board, and a function control of the processor 71 The up-converter board 72 which processes the analog baseband signal of the baseband signal processing block 70 according to the signal and outputs the IF and RF signals to the outside, detects the final transmission output and automatically adjusts the transmission output level. Include.

The baseband signal processing block 70 includes a digital baseband signal processing unit 73 for buffering the input digital I, Q signal data so as not to be damaged, and a digital input from the digital baseband signal processing unit 73. D / A converters 74 and 75 convert each of the I and Q signals into analog signals, and filter each of the analog I and Q signals input from the D / A converters 74 and 75 to remove noise components. LPF 76, 77, an analog baseband signal processor 78 for buffering analog I, Q signals input from each of the LPF 76, 77, and the analog miracle band signal processor 78 The I-mixer 80 which outputs an analog I-modulated signal by multiplying the modulated signal (cos wt) provided by the I-signal generator 79, and the signal by the analog miracle band signal processor 78 Modulated signal provided from the Q signal generator 81 to the processed Q signal multiplying (sin wt) to output an analog Q modulated signal and the analog I and Q modulated signals inputted from the I and Q mixers 80 and 82 to output a single signal. It consists of a mixing mixer (83).

Here, the digital miracle band signal processor 73 is configured on a field programmable gate array (FPGA).

In addition, the up-converter board 72 includes a first directional coupler 84 for signal matching and branching an analog baseband signal input from the baseband signal processing block 70, and from the first directional coupler 84. A first mixer 86 for mixing the input baseband signal with a local frequency of the first local frequency generator 85 which has received the control signal of the processor 71 and outputting it as an IF signal, for example, the first mixer 86; A first BPF 87 for filtering the IF signal outputted by the < RTI ID = 0.0 >) < / RTI > into an intermediate frequency band, a first amplifier 88 for amplifying the IF signal output from the first BPF 87 to a predetermined level, A second amplifier 89 which amplifies the IF signal amplified by the first amplifier 88 in two stages; and a second signal receiving the control signal of the processor 71 from the IF signal input from the second amplifier 89; A second mixer 91 which is mixed with the local frequency of the local frequency generator 90 and output, for example, as an RF signal; A second BPF 92 for filtering the RF signal output by 91 into the RF signal band, a variable attenuator 93 for adding or subtracting the output level of the RF signal output from the second BPF 92, and The third amplifier 94 amplifies the analog RF signal output from the variable attenuator 93 to a predetermined output level and the analog RF signal output from the third amplifier 94 is signal-matched and branched and output to the outside. A second directional coupler 95, an input level detector 96 for detecting and outputting an analog baseband signal branched by the first directional coupler 84 to a voltage level, and the second directional coupler ( 95 compares the values input from the input level detector 96 and the output level detector 97 with an output level detector 97 that detects and outputs the analog transmission output signal at the final stage branched by 95). Processor 71 based on the difference TX AGC circuit section 98 for automatically correcting the output level of the transmission board by adjusting the gain of the variable attenuator 93 in accordance with the TX RF gain control signal of the.

On the other hand, referring to the operation of the transmission board equipped with the conventional AGC device as described above, first, when the subscriber makes a call to his or her telephone, the communication signal of the telephone is switched by the exchange and finally input to the transmission board of the base station. In this case, the IQ signal part (not shown) of the transmission board converts the input communication signal into QPSK type I and Q signals and inputs them to the digital baseband signal processing part 73 of the baseband signal processing block 70, respectively. . Then, the digital baseband signal processing unit 73 buffers each of the input digital I and Q signals so that data is not damaged and inputs them to the D / A converters 74 and 75 at the rear stages, respectively. Therefore, the D / A converters 74 and 75 convert the input digital I and Q signals into analog signals and input them to the LPFs 76 and 77, respectively. The LPFs 76 and 77 filter each of the input analog I and Q signals to remove noise components and then input the analog baseband signal processor 78. Then, the analog baseband signal processing unit 78 buffers the analog I and Q signals inputted from the LPFs 76 and 77 and inputs the respective I mixers 80 and Q mixers 82, respectively. .

Therefore, the I mixer 80 multiplies the I signal processed by the analog miracle band signal processor 78 into the analog I modulated signal by multiplying the modulated signal (cos wt) provided from the I signal generator 79 and then mixes it. Input to mixer 83. In addition, the Q mixer 82 also multiplies the Q signal processed by the analog miracle band signal processor 78 by the modulation signal (sin wt) provided from the Q signal generator 81 to produce an analog Q modulated signal, and then mix Output to the mixer 83. Then, the mixing mixer 83 mixes the analog I and Q modulation signals inputted from the I and Q mixers 80 and 82, respectively, and inputs them into the first directional coupler 84 as one signal. The first directional coupler 84 performs signal matching to branch the analog baseband signal input from the mixer mixer 83 of the baseband signal processing block 70 to the first mixer 86 and the input level detector 96. . The first mixer 86 mixes the analog baseband signal input from the first directional coupler 84 with the local frequency of the first local frequency generator 85 that receives the control signal of the processor 71. , To the first BPF 87 as an IF signal. In addition, the first BPF 87 filters the IF signal output by the first mixer 86 into the intermediate frequency band and then inputs the filtered analog IF signal to the first amplifier 88 and accordingly. The first amplifier 88 amplifies the IF signal output from the first BPF 87 to one level and inputs it to the second amplifier 89. Then, the second amplifier 89 amplifies the IF signal amplified by the first amplifier 88 in two stages and inputs it to the second mixer 91. Therefore, the second mixer 91 mixes the IF signal input from the second amplifier 89 with the local frequency of the second local frequency generator 90 which receives the control signal of the processor 71, for example, into an RF signal. Output to the second BPF 92. Then, the second BPF 92 filters the RF signal output by the second mixer 91 into the RF signal band and then inputs it to the variable attenuator 93.

Accordingly, the variable attenuator 93 adjusts the transmission output gain of the transmission board by subtracting the output level of the RF signal output from the second BPF 92, wherein the variable attenuator 93 is a TX AGC circuit part 98. Gain is adjusted in accordance with the gain control signal of. In addition, the analog RF signal output from the variable attenuator 93 is amplified to a predetermined output level by the third amplifier 94 and input to the second directional coupler 95. Then, the second directional coupler 95 signal-matches the analog RF signal input from the third amplifier 94, emits it to the outside through the antenna, and branches it to the output level detector 97. The output level detector 97 detects the analog transmission output signal of the final stage branched by the second directional coupler 95, converts the signal into a voltage level, and inputs it to the TX AGC circuit section 98.

At the same time, the input level detector 96 also detects the analog baseband signal branched by the first directional coupler 84, converts the signal into a voltage level, and inputs the voltage to the TX AGC circuitry 98. . At this time, the processor 71 detects the current temperature through a temperature sensor (not shown) installed at a predetermined position of the transmission board, determines the detected value, and inputs the TX RF GAIN signal to the TX AGC circuitry 98. .

Accordingly, the TX AGC circuitry 98 compares the analog values input from the input level detector 96 and the output level detector 97 and according to the TX RF gain control signal of the processor 71 based on the difference value. The gain of the variable attenuator 93 is adjusted to automatically correct the output level of the transmission board.

However, the AGC circuit of the conventional base station transmission board is a CDMA final transmission output depending on the strength of the analog final transmission output detected before the transmission to the outside through the antenna at the time of the final transmission output correction and the current temperature value by the temperature sensor The RF signal strength of the transmission board is adjusted, and the components of the transmission board, for example, the analog detection detected by these devices because the input level detector 96 or the output level detector 97 are very sensitive to heat. The drawback was that the data were so inaccurate that it was difficult to correctly adjust the transmit power intensity.

In addition, since the AGC circuit part of the conventional base station transmission board is composed of components that use an analog signal, both the input level detector 96 and the output level detector 97 for detecting the transmission output level are actually accurate transmission output RF. There is a problem that a significant error occurs in determining the strength of the signal.

Accordingly, the present invention has been invented to solve the above problems, the digital input level detection unit provided with the digital output level detection unit in the FPGA stage of the transmission board detects the digital IQ modulation signal of the transmission output signal strength Through the digital signal that is hardly influenced by the external environment by providing it as a reference value and comparing it with the analog transmission output signal strength detected at the last stage using the reference value, and then using the difference signal to correct the strength of the CDMA transmission output. It is an object of the present invention to provide an AGC device of a CDMA mobile communication system using a digital input / output level signal capable of securing control reliability of the AGC device since the signal strength of the transmission output is adjusted.

Another object of the present invention is to correct the analog signal output signal strength of the final stage on the basis of the detected digital signal output signal strength, and accordingly CDMA mobile communication using digital input and output level signals that can significantly improve the precision of power control It is to provide the AGC device of the system.

The present invention for achieving the above object is a baseband signal for detecting the digital I, Q signal of the baseband region transmitted from the base station transmission board and using the TX AGC gain determination signal and at the same time detect the transmission output signal of the final stage A processor for controlling the overall function of the transmission board including the processing block, the baseband signal processing block, and detecting the final transmission output according to the function control signal of the processor, demodulating the signal into I, Q signals, and then processing the baseband signal. AGC device of a CDMA mobile communication system using a digital input / output level signal having an up-converter board for inputting into a block and determining values of the detected transmission output strength inputted from the baseband signal processing block and adjusting the transmission output level of the final stage. To provide.

1 is a block diagram of a TX AGC circuit of a conventional base station transmission board.

2 is a block diagram illustrating a TX AGC circuit of the present invention.

<Detailed Description of Codes>

1: baseband signal processing block 2: processor

3: up-converter board 4: FPGA

5,6: D / A converter 7,8: LPF

9: analog baseband signal processor 10: I signal generator

11: I mixer 12: Q signal generator

13: Mixer 14: Mixer

15,16: D / A converter 17: digital input level detector

18: digital output level detector 19: first local frequency generator

27: variable attenuator 34: TX AGC circuit

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

The base station transmission board including the apparatus of the present invention is transmitted as shown in FIG.

A baseband signal processing block for processing digital I, Q signals in the baseband region as analog baseband signals, detecting the digital baseband signals, using them as TX AGC gain determination signals, and detecting a transmission output signal at the final stage ( 1), a processor (2) including the baseband signal processing block (1) to control the overall function of the transmission board, and the baseband signal processing block (1) according to the function control signal of the processor (2). And an up-converter board (3) for processing the analog baseband signal of &lt; RTI ID = 0.0 &gt;) &lt; / RTI &gt;

The baseband signal processing block 1 buffers the digital I, Q signals in the baseband region to be input, detects the digital baseband signals, and uses them as TX AGC gain determination signals. Field programmable gate array (FPGA) 4 for detecting and outputting; D / A converters 5 and 6 for converting each of the digital I, Q signals inputted from the FPGA 4 into analog signals; LPF (7, 8) for filtering out each of the analog I, Q signals input from the A converter (5, 6) to remove noise components, and I, Q of analog input from each of the LPF (7, 8) The analog baseband signal processor 9 for buffering the signal and the I signal signaled by the analog miracle band signal processor 9 are multiplied by the modulation signal (cos wt) provided from the I signal generator 10 to obtain analog I. I mixer 11 for outputting a modulated signal and the analog miracle band scene A Q mixer 13 for outputting an analog Q modulated signal by multiplying the Q signal processed by the processor 9 by the modulation signal sin wt provided from the Q signal generator 12, and the I, Q mixer 13 A mixed mixer 14 for mixing the analog I and Q modulated signals inputted from the N-B and outputting them as a single signal, and a D / A converter for converting the digital baseband signal output from the FPGA 4 into an analog signal. And a D / A converter 16 for converting the digital I and Q modulated signals of the final output stage output from the FPGA 4 into analog signals.

Here, the FPGA 4 is input to the digital baseband signal processor 35 for buffering the digital I, Q signal data inputted from the front end of the transmission board so as not to be damaged, and to the digital baseband signal processor 35. A digital input level detector 17 which detects and squares each of the digital I and Q signals and outputs the result as a TX AGC gain determination signal, and a transmission output signal detected at the final stage of the up-converter board 3. A digital output level detector 18 is provided to square the I and Q signals and then output the TX and AGC gains as a determination signal.

In addition, the up-converter board 3 mixes the analog baseband signal input from the baseband signal processing block 1 with the local frequency of the first local frequency generator 19 which received the control signal of the processor 2. For example, a first mixer 20 for outputting an IF signal, a first BPF 21 for filtering an IF signal output by the first mixer 20 to an intermediate frequency band, and the first BPF 21. A first amplifier 22 for amplifying the IF signal outputted by the first stage to a predetermined level, a second amplifier 23 for amplifying the IF signal amplified by the first amplifier 22 in two stages, and A second mixer 25 for mixing the IF signal input from the two amplifiers 23 with the local frequency of the second local frequency generator 24 receiving the control signal of the processor 2 and outputting the RF signal as an RF signal, A second BPF 26 for filtering the RF signal output by the second mixer 25 into the RF signal band, and outputting the RF signal output from the second BPF 26; A variable attenuator 27 for adjusting the level, a third amplifier 28 for amplifying the analog RF signal output from the variable attenuator 27 to a constant output level, and an analog output from the third amplifier 28. Localization of the third local frequency generator 30 by detecting the directional coupler 29 for matching and branching the RF signal and transmitting the signal to the outside, and detecting the transmission output level signal of the final stage branched by the directional coupler 29. A third mixer 31 which demodulates and outputs each of the I and Q signals by mixing with a frequency, and converts each of the analog I and Q signals output from the third mixer 31 into digital signals and converts them into digital signals. D / A converters (32, 33) to be input to (18), and the value input from the digital input level detector 17 and the digital output level detector 18 of the FPGA (4) and the difference value Based on the TX RF gain control signal of the processor 2 TX AGC circuitry 34 for automatically correcting the output level of the transmission board by adjusting the gain of the wedge 27.

Here, the TX AGC circuit part 34 is connected to one end of the digital input level detector 17 via the D / A converter 15, and the D / A is connected to one end of the digital output level detector 18. The TA AGC circuitry 34 is connected via the converter 16.

Next, the operation and effect of the device of the present invention having the above configuration will be described.

In the operation of the present invention, first, when a communication signal is input to a transmission board of a base station for connection of a call, the IQ signal part of the transmission board is converted into an I, Q signal of the QPSK method, and then the FPGA of the baseband signal processing block (1). Enter each of them as (4). Then, the digital baseband signal processor 35 of the FPGA 4 buffers each of the input digital I and Q signals so that data is not damaged and inputs them to the D / A converters 5 and 6 at the rear stage. At this time, the digital input level detector 17 detects each of the digital I and Q signals input to the digital baseband signal processor 35 and squares them (I ² + Q ² ), and then the D / A converter 15. Enter Accordingly, the D / A converter 15 converts the digital signal output from the digital input level detector 17 of the FPGA 4 into an analog voltage and inputs it to the TX AGC circuit unit 34.

Meanwhile, the D / A converters 5 and 6 convert the digital I and Q signals input from the digital baseband signal processor 35 of the FPGA 4 into analog signals, respectively, and convert them into LPFs 7, 8 and 8, respectively. Enter it. The LPFs 7 and 8 filter the input analog I and Q signals respectively to remove noise components and then input the analog baseband signal processor 9. Then, the analog baseband signal processor 9 buffers the analog I and Q signals inputted from the LPFs 7 and 8 and inputs them to the respective I mixer 11 and the Q mixer 13, respectively. .

Therefore, the I mixer 11 multiplies the I signal signal processed by the analog miracle band signal processor 9 to the analog I modulated signal by multiplying the modulation signal (cos wt) provided from the I signal generator 10 and then mixes it. Input to mixer 14. The Q mixer 13 also multiplies the Q signal processed by the analog miracle band signal processor 9 by the modulated signal (sin wt) provided from the Q signal generator 12 to produce an analog Q modulated signal, and then mix Output to the mixer 14. Then, the mixing mixer 14 mixes the analog I and Q modulation signals inputted from the I and Q mixers 11 and 13, respectively, and inputs them into the first mixer 20 as one signal. The first mixer 20 then mixes the analog baseband signal input from the mixer mixer 14 with the local frequency of the first local frequency generator 19 which received the control signal of the processor 2, e.g. IF The signal is output to the first BPF 21. In addition, the first BPF 21 filters the IF signal output by the first mixer 20 into an intermediate frequency band, and then inputs the filtered analog IF signal to the first amplifier 22 and accordingly. The first amplifier 22 amplifies the IF signal output from the first BPF 21 by one stage to a predetermined level and inputs it to the second amplifier 23. Then, the second amplifier 23 amplifies the IF signal amplified by the first amplifier 22 in two stages and inputs it to the second mixer 25. Thus, the second mixer 25 mixes the IF signal input from the second amplifier 23 with the local frequency of the second local frequency generator 24 which receives the control signal of the processor 2, for example, into an RF signal. Output to the second BPF 26. Then, the second BPF 26 filters the RF signal output by the second mixer 25 into the RF signal band and then inputs it to the variable attenuator 27.

Accordingly, the variable attenuator 27 adjusts the transmission output gain of the transmission board by adding or subtracting the output level of the RF signal output from the second BPF 26. In this case, the variable attenuator 27 is a TX AGC circuit part 34. Gain is adjusted in accordance with the gain control signal of. In addition, the analog RF signal output from the variable attenuator 27 is amplified to a constant output level by the third amplifier 28 and is also input to the directional coupler 29. Then, the directional coupler 29 signal-matches the analog RF signal input from the third amplifier 28 and emits it to the outside through the antenna and branches to the third mixer 31. The third mixer 31 detects the transmission output level signal of the final stage branched by the directional coupler 29 and mixes it with the local frequency of the third local frequency generator 30 to produce respective I, Q signals. And demodulate it into D / A converters 32 and 33. Then, each of the D / A converters 32 and 33 converts each of the analog I and Q signals output from the third mixer 31 into digital signals and inputs them to the digital output level detector 18. Accordingly, the digital output level detecting unit 18 squares the I and Q signals of the transmission output signal detected at the final stage of the up-converter board 3 (I ² + Q ² ), and then the D / A converter 16. ). Then, the D / A converter 16 converts the digital signal output from the digital output level detection unit 18 of the FPGA 4 into an analog voltage and inputs it to the TX AGC circuit unit 34.

Accordingly, the TX AGC circuit section 34 is the final input from the digital output level detection section 18 with the digital I, Q signal strength input from the digital input level detection section 17 of the FPGA 4 as a reference value. The TX output power values of the stages are compared and the TX AGC control signal is input to the variable attenuator 27 according to the TX RF gain control signal of the processor 2 based on the difference value. Then, the variable attenuator 27 automatically adjusts the gain GAIN according to the TX AGC control signal of the input TX AGC circuit 34 to automatically correct the output level of the transmission board.

Here, the variable attenuator 27 is controlled according to the TX AGC control signal input from the TX AGC circuit unit 34 to adjust the output signal strength of the transmission board and to compensate for the variation of the output signal according to the temperature change. .

As described above, in the present invention, the digital input level detection unit provided with the digital output level detection unit at the FPGA stage of the transmission board detects the digital IQ modulated signal and provides it as a reference value of the transmission output signal strength. By comparing the signal strength of the analog transmission output detected at the last stage and then using the difference signal to correct the strength of the CDMA transmission output, the signal strength of the transmission output is adjusted through the digital signal that is hardly affected by the external environment. Accordingly, it has the advantage of ensuring the control reliability of the AGC device.

According to the present invention, since the analog transmit output signal strength of the final stage is corrected based on the detected digital transmit output signal strength, the precision of power control can also be significantly improved.

In addition, according to the present invention, since the digital output level detection unit and the digital input level detection unit are installed together in the FPGA stage of the conventional transmission board, it is not necessary to form a new additional circuit unit for signal detection. The design space utilization of the transmission board is also significantly improved.

Claims (4)

A baseband signal processing block for detecting digital I, Q signals in the baseband region transmitted from the base station transmission board and using the TX AGC gain determination signal and detecting the transmission output signal at the final stage, and the baseband signal processing block. A processor that controls the overall function of the transmission board, and detects the final transmission output according to the function control signal of the processor, demodulates it into I, Q signals, inputs to the baseband signal processing block, and inputs from the baseband signal processing block. And an up-converter board for adjusting the transmission output level of the final stage by determining the values of the detected detection transmission output strengths. The FPGA of claim 1, wherein the baseband signal processing block detects and uses a digital baseband signal as a TX AGC gain determination signal, and detects and outputs a transmission output signal at the final stage. And a D / A converter for converting a baseband signal into an analog signal, and a D / A converter for converting digital I and Q modulation signals of the final output terminal output from the FPGA into an analog signal. AGC device of a CDMA mobile communication system using. The digital input level detection unit of claim 2, wherein the FPGA detects and squares each of the baseband digital I and Q signals and outputs the result as a TX AGC gain determination signal, and at the final stage of the up-converter board. And a digital output level sensing unit for squaring the I and Q signals of the detected transmission output signal and outputting the result as a TX AGC gain determination signal. The local converter of claim 1, wherein the up-converter board is configured to adjust a gain to adjust an output level of an RF signal, and to detect a transmission output level signal of a final stage outputted from the variable attenuator. And a D / A converter for demodulating and outputting each of the I and Q signals, and converting each of the analog I and Q signals outputted from the mixer into digital signals and inputting them to the digital output level detector. TX that compares the values input from the digital input level detector and the digital output level detector and automatically adjusts the output of the transmission board by adjusting the gain of the variable attenuator according to the TX RF gain control signal of the processor based on the difference value. An AGC device of a CDMA mobile communication system using a digital input / output level signal, characterized in that it comprises an AGC circuit section.