KR20020038324A - Low Temperature Direct Bonding Method of Glass Substrate and Silicon Wafer - Google Patents
Low Temperature Direct Bonding Method of Glass Substrate and Silicon Wafer Download PDFInfo
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- KR20020038324A KR20020038324A KR1020000068485A KR20000068485A KR20020038324A KR 20020038324 A KR20020038324 A KR 20020038324A KR 1020000068485 A KR1020000068485 A KR 1020000068485A KR 20000068485 A KR20000068485 A KR 20000068485A KR 20020038324 A KR20020038324 A KR 20020038324A
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- 239000011521 glass Substances 0.000 title claims abstract description 54
- 238000000034 method Methods 0.000 title claims abstract description 51
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 46
- 239000010703 silicon Substances 0.000 title claims abstract description 46
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 42
- 239000000758 substrate Substances 0.000 title claims abstract description 33
- 238000004140 cleaning Methods 0.000 claims abstract description 26
- 238000010438 heat treatment Methods 0.000 claims abstract description 20
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 4
- 238000005406 washing Methods 0.000 claims description 10
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 8
- 229910021642 ultra pure water Inorganic materials 0.000 claims description 8
- 239000012498 ultrapure water Substances 0.000 claims description 8
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 5
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 5
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 4
- 238000001035 drying Methods 0.000 claims description 4
- 229910021529 ammonia Inorganic materials 0.000 claims description 3
- 239000008367 deionised water Substances 0.000 abstract 2
- 229910021641 deionized water Inorganic materials 0.000 abstract 2
- 229910021419 crystalline silicon Inorganic materials 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 19
- 239000000463 material Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 4
- QAOWNCQODCNURD-UHFFFAOYSA-L Sulfate Chemical compound [O-]S([O-])(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-L 0.000 description 3
- -1 hydrogen ions Chemical class 0.000 description 3
- 230000003746 surface roughness Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 1
- 101000859864 Rattus norvegicus Gamma-crystallin E Proteins 0.000 description 1
- 238000005411 Van der Waals force Methods 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- QOSATHPSBFQAML-UHFFFAOYSA-N hydrogen peroxide;hydrate Chemical compound O.OO QOSATHPSBFQAML-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000005297 pyrex Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02052—Wet cleaning only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Joining Of Glass To Other Materials (AREA)
Abstract
Description
본 발명은 유리와 실리콘 기판의 저온 직접접합방법에 관한 것으로써, 특히 웨이퍼 세척과 저온 열처리를 이용한 유리와 단결정 실리콘 기판의 저온 직접접합방법에 관한 것이다.The present invention relates to a low temperature direct bonding method of glass and a silicon substrate, and more particularly, to a low temperature direct bonding method of glass and a single crystal silicon substrate using wafer cleaning and low temperature heat treatment.
마이크로 장치(Micro Devices) 연구가 고집적화와 고효율성의 흐름으로 급속히 발전해감에 따라 웨이퍼의 특성 향상 문제가 대두되었다. ULSI(Ultra Large Scale Integrated) CMOS(Complementary Metal Oxide Semiconductor) 및 FPD(Flat Panel Display)의 LCD(Liquid Crystal Display) 등의 분야에서 특히 많은 연구가 진행되었으며, 웨이퍼 접합을 통한 SOI(Silicon-On-Insulator) 웨이퍼나 유리(Glass)와 단결정 실리콘(Single crystal silicon)의 접합이 이에 해당된다.As Micro Devices research has rapidly developed into a highly integrated and highly efficient flow, the problem of improving wafer characteristics has emerged. In particular, many studies have been conducted in the fields of Ultra Large Scale Integrated (ULSI) Complementary Metal Oxide Semiconductor (CMOS) and Liquid Crystal Display (LCD) of Flat Panel Display (FPD), and Silicon-On-Insulator through wafer bonding. This is the bonding of wafer or glass and single crystal silicon.
최근에 다결정 실리콘(Poly-crystal Silicon)을 이용한 LCD 시장이 차츰 고해상도의 단결정 실리콘 방식으로 전환되어 가고 있으며 이에 따른 유리와 단결정 실리콘의 접합에 대한 연구가 진행되고 있다. 또한, MEMS(Micro-electro -mechanical-systems)의 3-D 집적기술 등에 있어서 이종재료 접합에 대한 관심이 증대되고 있는 추세이다.Recently, the LCD market using poly-crystal silicon has gradually shifted to high-resolution single crystal silicon, and research on bonding of glass and single crystal silicon has been conducted. In addition, in the 3-D integrated technology of micro-electro-mechanical-systems (MEMS), interest in dissimilar materials bonding is increasing.
현재까지 단결정 실리콘과 유리의 접합방식은 주로 양극접합(Anodic Bonding)방법을 사용하여 왔다. 양극접합방법은 실리콘과 알칼리 유리와의 가열 및 고압에 의한 전하 이동 현상을 이용하여 계면에서의 전하 결합을 통해 접합하는 기술로서 450℃에서 가열 처리를 한다.Until now, the bonding method of single crystal silicon and glass has mainly used annodic bonding method. The anodic bonding method is a technique of bonding through charge bonding at an interface using heating of silicon and alkali glass and charge transfer phenomenon under high pressure, and heat treatment at 450 ° C.
구체적인 예로 일본공개특허 제 JP4072679A2호는 유리와 실리콘과의 양극접합방법에 관한 것으로 접합과정 중에 실리콘 웨이퍼와 유리의 표면상태를 확인하기 위해서 광학장치를 사용하여 확인하는 방법에 관하여 개시되어 있다.As a specific example, Japanese Patent Application Laid-Open No. JP4072679A2 relates to a method of anodic bonding between glass and silicon, and discloses a method of confirming using an optical device to check the surface state of a silicon wafer and glass during the bonding process.
그러나 상기한 양극접합방법은 가열 및 고압에 따른 공정 비용이 높고 유리의 금속이온이 실리콘층으로 이동됨에 따른 고전압이라는 비효율적 측면과 이온성물질을 포함한 유리로 인한 실리콘층의 품질 저하 문제가 응용의 한계를 가져오고 있다.However, the above-mentioned anode bonding method has a high process cost due to heating and high pressure, high voltage as the metal ion of glass is transferred to the silicon layer, and the problem of deterioration of the quality of the silicon layer due to the glass containing the ionic material. Is bringing.
본 발명은 상기한 종래 기술의 문제점을 해결하기 위해 제안된 것으로써, 본 발명의 목적은 종래의 양극접합에 작용되는 고전압 및 과부하등의 문제가 없는 웨이퍼직접접합(Wafer Direct Bonding ; WDB)방법을 유리와 실리콘의 접합에 최적화하여 고품질의 LCD용 기판을 제작할 수 있는 기술을 개발할 뿐만 아니라, MEMS 분야에서의 새로운 이종재료 접합 방법으로써 유리와 실리콘 기판의 저온 직접접합방법을 제공하는 것이다.The present invention has been proposed to solve the above problems of the prior art, and an object of the present invention is to provide a wafer direct bonding (WDB) method without problems such as high voltage and overload applied to the conventional anode bonding. In addition to developing a technology for manufacturing high quality LCD substrates by optimizing the bonding of glass and silicon, the new heterogeneous material bonding method in the MEMS field provides a low temperature direct bonding method of glass and silicon substrates.
도 1는 세척 종류에 따른 유리-실리콘 상온 직접접합상태를 비교한 사진.1 is a photograph comparing the glass-silicon room temperature direct bonding state according to the type of washing.
도 2는 세정용액에 의한 유리 기판의 단계별 계면 변화반응을 나타내는 모식도.Figure 2 is a schematic diagram showing the step-by-step interface change reaction of the glass substrate by the cleaning solution.
도 3에 세정용액의 종류에 대한 유리 표면 거칠기 정도를 나타내는 그래프.3 is a graph showing the degree of glass surface roughness with respect to the type of cleaning solution.
도 4은 열처리 온도 및 유지시간에 따른 접합강도를 나타낸 그래프.4 is a graph showing the bonding strength according to the heat treatment temperature and holding time.
도 5은 열처리 공정에 따른 접합률을 비교한 사진.5 is a photograph comparing the bonding ratio according to the heat treatment process.
도 6는 크랙오픈법을 나타내는 사진.6 is a photograph showing a crack opening method.
도 7는 유리와실리콘 기판의 직접접합공정 단계별에 따른 계면 변화반응을 나타내는 모식도.Figure 7 is a schematic diagram showing the interface change reaction according to the step of direct bonding process of the glass and silicon substrate.
상기한 목적을 달성하기 위해 본 발명은 거울면을 가진 유리와 단결정 실리콘을 1차 세정용액으로 세정한 후 초순수로 세척하여 건조시키는 단계와, 상기의 1차 세정한 유리와 실리콘을 2차 세정용액으로 세정한 후 초순수로 세척하여 건조시키는 단계와, 상기의 2차 세정한 유리의 거울면 전면과 실리콘을 클래스 100 이상의 클린룸에서 직접접합하는 단계와, 상기의 접합된 유리와 실리콘 기판을 열처리하는 단계를 포함하여 이루어짐을 특징으로 하는 유리와 실리콘 기판의 저온 직접접합방법을 제공하는 것이다.In order to achieve the above object, the present invention is the step of washing the glass and the single crystal silicon having a mirror surface with a first cleaning solution, followed by washing with ultrapure water and drying, and the second cleaning solution of the first cleaned glass and silicon Washing with ultrapure water and then drying, and directly bonding the entire mirror surface of the secondary cleaned glass and silicon in a clean room of class 100 or more, and heat-treating the bonded glass and the silicon substrate. It is to provide a low-temperature direct bonding method of the glass and silicon substrate, characterized in that comprising a step.
웨이퍼직접접합방법(WDB)은 이미 ULSI의 SOI나 MEMS 분야에서 널리 사용하고 있는 접합 방법이다. WDB 방법은 Class 10 Clean room에서 웨이퍼 세척을 하면 물질의 종류에 관계없이 계면의 반데르발스힘에 의한 기판 접합이 이루어진다는 원리를 이용한 방법으로 실제 응용할 수 있는 접합 강도를 얻기 위해서는 열처리에 의한 공유결합 형성 과정이 추가되어야 한다. 특히, 열처리 방법이 계면에 남아 있는 기포 등의 결함을 없애는 변수로 작용하기 때문에 어떠한 원리로 열처리 하느냐가 접합 강도를 결정하는 중요한 요소이다.The wafer direct bonding method (WDB) is a bonding method widely used in the field of SOI and MEMS of ULSI. WDB method uses the principle that substrate bonding is performed by van der Waals force of interface regardless of material type when wafer is cleaned in Class 10 Clean room. Formation process should be added. In particular, since the heat treatment method acts as a variable for eliminating defects such as bubbles remaining at the interface, the principle of heat treatment is an important factor in determining the bonding strength.
본 발명은 WDB 방법을 이종재료인 유리와 실리콘의 접합에 응용한 것으로 웨이퍼 세척방법에서 유리계면의 이온적 경향을 최소화하기 위하여 단계별 혼합 세정방법을 적용하였고, 유리와 실리콘과의 열팽창계수 차이를 고려해서 최소의 열변형력(Thermal Stress)을 나타내는 온도 범위에서 열처리함으로써 유리와 실리콘의 접합을 최적화하였다.In the present invention, the WDB method is applied to the bonding of dissimilar materials glass and silicon. In order to minimize the ionic tendency of the glass interface in the wafer cleaning method, the stepwise mixed cleaning method is applied and the difference in thermal expansion coefficient between glass and silicon is considered. By annealing at a temperature range exhibiting minimal thermal stress, the glass-silicon bonding was optimized.
이하, 본 발명의 유리와 실리콘 기판의 저온 직접접합방법을 단계별로 상세히 살펴보고자 한다.Hereinafter, the low temperature direct bonding method of the glass and the silicon substrate of the present invention will be described in detail step by step.
첫 번째 단계는 거울면을 가진 유리와 단결정 실리콘을 1차 세정용액으로 세정한 후 초순수로 세척하여 건조시키는 단계로서, 황산과 과산화수소수가 4:1의 비율로 혼합된 120℃의 SPM(Sulfuric-Perooxide-Mixture) 세정용액으로 10분간 세정한 후 초순수로 세척 및 건조한다. 이 단계에서는 반응식 1에 의하여 유기물, 금속등의 불순물이 제거되며 다량의 수소이온(H+)의 작용에 의해 1차 표면 친수화가(Hydrophilization) 형성된다. 황산이온이 잔존해 있기 때문에 직접 접합하기에 적합하지 않은 상태이다.The first step is to wash the glass and single crystal silicon with mirror surface with the first cleaning solution and then to dry with ultrapure water. The sulfuric acid and hydrogen peroxide water is mixed at a ratio of 4: 1 by SPM (Sulfuric-Perooxide) -Mixture) After washing with washing solution for 10 minutes, wash with ultrapure water and dry. In this step, impurities such as organic substances and metals are removed by the reaction scheme 1, and primary surface hydrophilization is formed by the action of a large amount of hydrogen ions (H + ). Since sulfate ions remain, they are not suitable for direct bonding.
두 번째 단계는 1차 세정한 유리와 실리콘을 2차 세정용액으로 세정한 후 초순수로 세척하여 건조시키는 단계로서 암모니아와 과산화수소수 및 물이 1:1:5의 비율로 혼합된 80℃의 RCA(Trademark) 세정용액을 사용하여 20분간 세정한 후 초순수로 세척 및 건조한다. 이 단계에서는 반응식 2에 의하여 유기물, 금속 및 입자등의 불순물이 제거되며 다량의 수산화이온(OH-) 작용에 의한 2차 표면 친수화(Hydrophilization)가 형성된다. 첫 번째 단계에서 잔존한 황산이온 잔유물이 암모니아이온에 의해 제거됨으로써 세척 효과가 극대화된다. 이 때, RCA에 의한 표면 거칠기 영향은 잔존 황산이온의 제거 효과에 의해 완화된다.The second step is to wash the first washed glass and silicon with a second cleaning solution and then to wash with ultrapure water and to dry. RCA at 80 ℃ mixed with ammonia, hydrogen peroxide and water in a ratio of 1: 1: 5 ( Trademark) After washing for 20 minutes using cleaning solution, it is washed with ultrapure water and dried. In this step, impurities such as organic substances, metals, and particles are removed by the reaction scheme 2, and secondary surface hydrophilization is formed by a large amount of hydroxide ions (OH − ). The remaining sulphate residue in the first step is removed by ammonia ions to maximize the cleaning effect. At this time, the surface roughness effect by RCA is alleviated by the effect of removing residual sulfate ions.
도 1는 세정용액의 종류에 따른 500㎛ 4″7740 파이렉스 유리 웨이퍼와 525㎛ 4″(100) p-type Epi-실리콘 웨이퍼의 직접 접합 상태를 비교한 것으로, 도 1a는 유리기판과 실리콘 기판을 각각 RCA로 처리한 경우이고, 도 1b 유리기판은 RCA, 실리콘 기판은 SPM으로 처리한 경우이고, 도 1c는 유리기판은 SPM으로 처리한 후RCA로 처리하고 실리콘 기판은 SPM으로 처리한 경우이며, 도 1d는 유리기판과 실리콘 기판을 SPM으로 처리한 후 RCA로 처리한 경우이다. 도 1a, 도 1b의 경우와 같이단일 세정용액에 의한 처리한 웨이퍼의 경우는 접합률이 60% 미만으로 나타나는데 반해, 한쪽 웨이퍼만이라도 혼합 세정용액을 사용할 경우에는 도 1c와 같이 접합률이 향상되며, 특히, 양쪽 웨이퍼 모두 혼합 세정 처리한 도 1d의 경우는 거의 100%에 가까운 접합률을 나타내었다.FIG. 1 compares a direct bonding state of a 500 μm 4 ″ 7740 Pyrex glass wafer and a 525 μm 4 ″ (100) p-type Epi-silicon wafer according to the type of cleaning solution. FIG. 1A illustrates a glass substrate and a silicon substrate. Each case is treated with RCA, FIG. 1B is a case where the glass substrate is treated with RCA and the silicon substrate is SPM, and FIG. 1C is the case where the glass substrate is treated with SPM and then treated with RCA and the silicon substrate is treated with SPM. 1D illustrates a case in which the glass substrate and the silicon substrate are treated with RCA after the SPM is treated. In the case of wafers treated with a single cleaning solution as in the case of FIGS. 1A and 1B, the bonding rate is less than 60%, whereas when only one wafer is used, the bonding rate is improved as shown in FIG. 1C. In particular, in the case of FIG. 1D in which both wafers were mixed and washed, the bonding ratio was nearly 100%.
도 2에 세정용액에 의한 유리 기판의 단계별 계면 변화반응을 나타내었다. 도 2와 같이 각 단계별로 세정용액의 종류에 따른 웨이퍼 계면 반응이 서로 다르게 진행되어 가며, SPM 처리한 후 RCA 처리한 경우, 유리 기판의 세정 효과가 가장 효과적일 수 있다.2 shows the interfacial change reaction of the glass substrate by the cleaning solution. As shown in FIG. 2, the wafer interface reaction proceeds differently according to the type of cleaning solution in each step, and when the RCA treatment is performed after the SPM treatment, the cleaning effect of the glass substrate may be most effective.
도 3에 세정용액의 종류에 대한 표면 거칠기 정도를 그래프로 나타내었다. 실제 측정에서도 SPM 처리한 후 RCA 처리한 경우가 가장 우수한 세정효과로 확인되었다.3 shows the degree of surface roughness with respect to the type of cleaning solution in a graph. In the actual measurement, it was confirmed that the RCA treatment after SPM treatment was the best cleaning effect.
세 번째 단계는 상기의 2차 세정한 유리의 거울면 전면과 실리콘을 상온의 대기중에서 직접접합하는 단계로서 클래스(Class) 100 이상의 클린룸(Clean room) 에서 수행하며, 하단에 세정한 유리 웨이퍼를 고정시키고, 상단에 수평영역(Flat zone)을 일치시킨 실리콘 웨이퍼를 충분한 압력으로 수직 균일하게 접합시켜서 상온 접합시킨다. 이때 가압 방향은 중앙으로부터 방사형으로 나타나도록 한다.The third step is a step of directly bonding the mirror surface of the secondary cleaned glass and silicon in an air at room temperature. The third step is performed in a clean room of Class 100 or more, and the cleaned glass wafer at the bottom is It is fixed and bonded at room temperature by vertically and uniformly bonding a silicon wafer having a flat zone coinciding with the top. At this time, the pressing direction is to appear radial from the center.
네 번째 단계는 상기의 접합된 유리와 실리콘 기판을 열처리하는 단계로서 열처리 온도와 유지시간을 공정 변수로 제어하여, 각 차이로부터 야기되는 접합 강도를 통하여 직접 접합 반응의 최적화 조건을 정립하였다. 도 4a에 열처리 온도에 따른 접합강도와 도 4b에 열처리 유지 시간에 따른 접합강도를 나타내었다. 도 4a과 도 4b의 결과로부터 400℃, 28시간에서 최대 접합강도를 얻을 수 있다. 접합강도는 크랙오픈법(Crack opening method)에 의한 표면에너지 산출로부터 측정되었다.The fourth step is to heat-treat the bonded glass and silicon substrates by controlling the heat treatment temperature and the retention time as process variables to establish the optimization conditions for the direct bonding reaction through the bond strength resulting from each difference. 4A shows the bond strength according to the heat treatment temperature and the bond strength according to the heat treatment holding time in FIG. 4B. The maximum bond strength can be obtained at 400 ° C. for 28 hours from the results of FIGS. 4A and 4B. Bond strength was measured from surface energy calculation by the crack opening method.
도 5은 승온 비율 2도/분 이하의 열처리 공정에 따른 접합률을 비교한 사진으로서 도 5a는 열처리 공정전의 상온 직접접합 상태를 나타내며, 도 5b는 열처리 공정후의 상온 직접접합 상태를 나타낸다. 도 4의 결과와 같이 승온 비율을 2도/분 이하로 할 경우 접합률을 증가시킨다는 사실을 확인할 수 있는데, 승온 비율이 높을 경우에는 열처리에 따른 이종재료간의 열팽창계수 차이로 인한 응력 발생으로 접합률 증가효과를 최대화시킬 수 없었다.5 is a photograph comparing the bonding rate of the heat treatment process of the temperature increase rate of 2 degrees / min or less, Figure 5a shows a normal temperature bonded state before the heat treatment process, Figure 5b shows a normal temperature bonded state after the heat treatment process. As shown in FIG. 4, it can be confirmed that the bonding rate is increased when the temperature raising rate is 2 degrees / min or less. When the temperature raising rate is high, the bonding rate is generated due to the stress generation due to the difference in thermal expansion coefficient between different materials. The increase effect could not be maximized.
크랙오픈법은 도 6와 같은 방법으로 실시하는 것으로서, 도 6a는 크랙형성전의 경우이고, 도 6b는 크랙형성전의 경우이다. 열처리과정을 마친 웨이퍼쌍에 대하여 접합계면에 면도날로 크랙을 형성시켜서 이 때 나타난 크랙 성장 길이를 아래와 같은 수학식 1에 넣어 표면에너지를 구하는 방법이다.The crack-opening method is carried out in the same manner as in FIG. 6, where FIG. 6A is before crack formation and FIG. 6B is before crack formation. For the wafer pairs after heat treatment, cracks are formed on the bonding interface with a razor blade, and the crack growth lengths expressed at this time are expressed in Equation 1 below to obtain surface energy.
gamma, {}gamma_1 ,{}gamma_2 : 계면에너지, t_1 ,{}t_2 : 기판의 두께, E_1 ,{}E_2 : Young's modulus,gamma, {} gamma_1, {} gamma_2: interfacial energy, t_1, {} t_2: substrate thickness, E_1, {} E_2: Young's modulus,
t_b : 칼날의 두께, L_2 : Crack의 형성 길이t_b: blade thickness, L_2: crack formation length
상기한 각 단계는 최대한 신속히 진행하여 공정 중간과정에서 유발될 수 있는 결함(Defects) 요인을 최소화한다. 또한, 열처리 공정을 제외한 모든 공정들을 청정도 Class 100이하에서 실시하여 공정 각각에 대한 신뢰성을 확보한다.Each of the above steps proceeds as quickly as possible to minimize the defects that may occur during the process. In addition, all processes except the heat treatment process are performed under cleanliness class 100 to ensure reliability of each process.
도 7에 유리와 실리콘 적접 접합의 각 단계에서의 유리와 실리콘의 계면 변화 반응을 나타내었다. 도 7와 같이 각 단계별로 웨이퍼 계면 반응이 서서히 진행되어 가며, 유리와 실리콘과 같은 이종재료 접합에서는 최적 열처리 조건의 경우 마지막 단계까지 반응할 수 있다.FIG. 7 shows the interfacial change reaction of glass and silicon at each stage of the glass-silicon intimate bonding. As shown in FIG. 7, the wafer interface reaction gradually progresses in each step, and in the case of dissimilar materials such as glass and silicon, the reaction may be performed until the final step in the case of optimum heat treatment conditions.
상술한 바와 같이, 본 발명에 의해 종래의 양극접합이 갖는 공정 비효율성을 개선하고, 기판 특성을 안정적으로 보존할 수 있다. 또한 본 발명의 유리와 실리콘 기판의 직접 접합 방법을 여러 이종재료의 접합에 응용할 수 있을 뿐만 아니라, SOI를 기반한 ULSI 소자로의 적용, Display에서의 FPD 응용, 그리고 MEMS 개발과 같은 여러 영역에 폭넓게 응용할 수 있다.As described above, according to the present invention, the process inefficiency of the conventional anode bonding can be improved, and the substrate characteristics can be stably preserved. In addition, the direct bonding method of glass and silicon substrates of the present invention can be applied not only to the bonding of various dissimilar materials but also widely applied to various areas such as the application of SOI-based ULSI devices, FPD application in display, and MEMS development. Can be.
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| US7950567B2 (en) | 2007-06-12 | 2011-05-31 | Samsung Mobile Display Co., Ltd | Organic light emitting diode display device and method of fabricating the same |
| US8016628B2 (en) | 2007-07-19 | 2011-09-13 | Samsung Mobile Display Co., Ltd. | Method of joining and method of fabricating an organic light emitting diode display device using the same |
| US8376017B2 (en) | 2007-06-14 | 2013-02-19 | Samsung Display Co., Ltd. | Flexible substrate bonding and debonding apparatus |
| CN103700733A (en) * | 2014-01-16 | 2014-04-02 | 常州天合光能有限公司 | Cleaning treatment method of N-type crystalline silicon substrate of solar cell |
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| US20180182665A1 (en) | 2016-12-28 | 2018-06-28 | Invensas Bonding Technologies, Inc. | Processed Substrate |
| US10879212B2 (en) | 2017-05-11 | 2020-12-29 | Invensas Bonding Technologies, Inc. | Processed stacked dies |
| US20200075533A1 (en) | 2018-08-29 | 2020-03-05 | Invensas Bonding Technologies, Inc. | Bond enhancement in microelectronics by trapping contaminants and arresting cracks during direct-bonding processes |
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| JPH06188166A (en) * | 1992-12-18 | 1994-07-08 | Fuji Electric Co Ltd | Electrostatic bonding method |
| KR19980054434A (en) * | 1996-12-27 | 1998-09-25 | 박원훈 | Direct bonding between substrates |
| KR100286252B1 (en) * | 1997-09-11 | 2001-04-16 | 박호군 | Electrostatic-thermal junction method for semiconductor sub strates |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US7950567B2 (en) | 2007-06-12 | 2011-05-31 | Samsung Mobile Display Co., Ltd | Organic light emitting diode display device and method of fabricating the same |
| US8376017B2 (en) | 2007-06-14 | 2013-02-19 | Samsung Display Co., Ltd. | Flexible substrate bonding and debonding apparatus |
| US8016628B2 (en) | 2007-07-19 | 2011-09-13 | Samsung Mobile Display Co., Ltd. | Method of joining and method of fabricating an organic light emitting diode display device using the same |
| US8187960B2 (en) | 2007-07-19 | 2012-05-29 | Samsung Mobile Display Co., Ltd. | Method of joining and method of fabricating an organic light emitting diode display device using the same |
| CN103700733A (en) * | 2014-01-16 | 2014-04-02 | 常州天合光能有限公司 | Cleaning treatment method of N-type crystalline silicon substrate of solar cell |
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