KR200159004Y1 - Semiconductor package of chip on board thermal - Google Patents
Semiconductor package of chip on board thermal Download PDFInfo
- Publication number
- KR200159004Y1 KR200159004Y1 KR2019940039490U KR19940039490U KR200159004Y1 KR 200159004 Y1 KR200159004 Y1 KR 200159004Y1 KR 2019940039490 U KR2019940039490 U KR 2019940039490U KR 19940039490 U KR19940039490 U KR 19940039490U KR 200159004 Y1 KR200159004 Y1 KR 200159004Y1
- Authority
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- South Korea
- Prior art keywords
- chip
- board
- semiconductor package
- heat
- heat dissipation
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
본 고안은 칩온보드 열방출 반도체 패키지에 관한 것으로, 칩을 전도체 범퍼상에 안착하고 열방출재 캡을 칩 뒷면의 전도체와 인케슈레이션에 맞추어 안착하여 열방출재 캡이 인켑슈레이션 캡 겸용으로 제조된 것을 특징으로 하며, 열방출재의 미스로딩을 방지하고 인켑슈레이션을 용이하게 하여 작업성과 신뢰성을 향상시킨 이점이 있다.The present invention relates to a chip-on-board heat dissipation semiconductor package, in which the chip is placed on the conductor bumper and the heat dissipation cap is seated in accordance with the conductor and the incubation on the back of the chip. It is characterized by preventing mis-loading of heat dissipating material and facilitating insulation to improve workability and reliability.
Description
제1도는 종래의 칩온보드 열방출 반도체 패키지의 단면도,1 is a cross-sectional view of a conventional chip-on-board heat dissipation semiconductor package,
제2도는 본 고안의 인쇄회로기판(PCB : Printed Circuits Board)의 평면도,2 is a plan view of a printed circuit board (PCB) of the present invention,
제3도는 본 고안의 인쇄회로기판의 단면도,3 is a cross-sectional view of the printed circuit board of the present invention,
제4도는 본 고안의 칩온보드(COB : Chip On Board) 열방출 반도체 패키지의 단면도이다.4 is a cross-sectional view of a chip on board (COB) heat dissipation semiconductor package of the present invention.
도면의 주요부분에 대한 부호의 설명Explanation of symbols for main parts of the drawings
1 : 인쇄회로기판(PCB : Printed Circuits Board)1: Printed Circuits Board (PCB)
2 : 제 1 전도체(conductive material)2: first conductive material
3 : 칩 4 : 열방출재3: chip 4: heat dissipating material
5 : 와이어 6 : 패턴5: wire 6: pattern
7 : 코팅절연체 8 : 인켑슈레이션용 캡 고정부7: coated insulator 8: cap fixing part for insulation
9 : 범퍼 10 : 열방출재 캡(인켑슈레이션용 캡)9: bumper 10: heat-dissipating material cap (cap for insulation)
11 : 제 2 전도체11: second conductor
본 고안은 칩온보드 반도체 패키지에 관한 것으로, 칩 뒷면에 열방출 물질을 안착시킴과 동시에 인켑슐레이션을 행한 칩온보드(COB : Chip On Board) 열방출 반도체 패키지에 관한 것이다.The present invention relates to a chip-on-board semiconductor package, and to a chip-on-board (COB) heat-dissipating semiconductor package that is encapsulated at the same time the heat-emitting material is deposited on the back of the chip.
일반적으로 반도체 패키지는 리드프레임의 본딩패드에 칩을 어태치하고 칩과 내부리드를 와이어 본딩한 다음 몰딩 및 포밍하여 완성한다. 그러나 이러한 구조는 칩의 열발산 기능이 없어 과열에 따른 패키지의 손상이 높게 되므로 열방출형 반도체 패키지의 출현이 요구되었다.In general, a semiconductor package is completed by attaching a chip to a bonding pad of a lead frame, wire bonding a chip and an internal lead, and then molding and forming the semiconductor package. However, this structure has no heat dissipation function of the chip, so that damage of the package due to overheating is high.
일반적으로 칩온보드 열방출형 반도체 패키지는 인쇄회로기판(1)에 칩(3)을 어태치하고 이어 칩(3)의 패드와 전도체(2)를 와이어(5)본딩 시키고 몰딩 전에 열방출재(4)를 로딩하여 전도체(2)와 와이어(5)본딩 시킨 다음 몰딩시켜 제작한다. 열방출재(4)는 알루미늄 히트 스프레더를 내장시키거나, 열전도율이 높은 구리 등을 외부로 노출되도록 이루어지기도 하며, 알루미늄 히트핀 등을 외부로 노출하기도 한다.In general, a chip-on-board heat dissipation-type semiconductor package attaches the chip 3 to the printed circuit board 1, and then bonds the pad and the conductor 2 of the chip 3 to the wire 5 and heat-release material 4 before molding. ) Is made by bonding the conductors (2) and wires (5) and then molding them. The heat dissipating material 4 may include an aluminum heat spreader, or may expose copper to a high thermal conductivity to the outside, or may expose the aluminum heat fin to the outside.
그러나 이와 같은 종래의 칩온보드 열방출형 반도체 패키지는 열방출재(4)가 칩(3) 위에 로딩되기 어려울뿐 아니라 로딩 후 인켑슐레이션(encapsulation)이 어려워 열방출재(4)의 미스로딩(miss loading)이 발생되고 와이어(5)가 쉽게 손상되며 인쇄회로기판(1)과 봉지재에 수분이 침투하는 등의 문제점이 있다. 또한 본 업계에서는 메모리의 용량이 증대되고 열방출의 능률이 향상된 소형박형화 패키지의 출현이 요구되었다.However, in the conventional chip-on-board heat dissipation type semiconductor package, not only the heat dissipation material 4 is difficult to be loaded on the chip 3 but also encapsulation is difficult after loading. ), The wire 5 is easily damaged, and moisture penetrates into the printed circuit board 1 and the encapsulant. There is also a need in the industry for the emergence of miniaturized packages with increased memory capacity and improved heat dissipation efficiency.
본 고안은 상기 문제점을 해결하고 본 업계의 요구에 부응하기 위하여 안출된 것으로, 칩 뒷면에 열방출재를 로딩함과 동시에 인켑슈레이션을 실시하여 신뢰도가 향상된 칩온보드 열방출형 반도체 패키지를 제공함을 목적으로 한다.The present invention was devised to solve the above problems and to meet the needs of the industry, and to provide a chip-on-board heat dissipation type semiconductor package with improved reliability by loading heat dissipation material on the back of the chip and performing incineration. It is done.
즉, 열방출용 인쇄회로기판(PCB)의 제작시 인켑슈레이션용 캡 고정부를 제작하고 이렇게 만들어진 기판에 전도체 범퍼를 사용하여 칩을 실장한 후 뒷면의 전도체와 인켑슈레이션용 캡 고정부에 맞추어 열방출재를 안착하여 열방출형 반도체 패키지를 제작하려는 것이다.That is, when manufacturing a heat dissipation printed circuit board (PCB), the insulator cap fixing unit is manufactured, and a chip is mounted using the conductor bumper on the substrate thus formed, and then the conductor and insulation cap fixing unit at the back side is mounted. In order to manufacture heat dissipating semiconductor package by mounting heat dissipating material.
이하 도면을 참조하여 본 고안을 좀 더 상세히 설명한다.Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.
제 2 도는 본 고안의 인쇄회로기판(PCB)의 평면도, 제 3 도는 본 고안의 인쇄회로기판(PCB)의 단면도, 제 4 도는 본 고안의 칩온보드(POB) 열방출형 반도체 패키지의 단면도이다.FIG. 2 is a plan view of a printed circuit board (PCB) of the present invention, FIG. 3 is a sectional view of a printed circuit board (PCB) of the present invention, and FIG. 4 is a sectional view of a chip-on-board (POB) heat emission type semiconductor package of the present invention.
도시한 바와 같이 인쇄회로기판(1)에 패턴을 제작한 후 절연체(7)로 일차 코팅하고 패키지의 인켑슈레이션 및 열방출의 효과를 동시에 수행하는 캡(10)의 안착을 위하여 열가소성 플라스틱 계열 수지로 패키지 형상에 맞추어 인켑슈레이션용 돌륜형 캡 고정부(8)를 만든다.As shown in the drawing, after manufacturing a pattern on the printed circuit board 1, the thermoplastic resin-based resin is used for the first coating with the insulator (7) and for the seating of the cap (10) which simultaneously performs the effect of the insulation and heat dissipation of the package. The wheel-shaped cap fixing part 8 for insulation is made to match the shape of the furnace package.
이렇게 완성된 보드에 재질이 전도체인 범퍼(9)를 제작한다. 이 범퍼(9)상에 칩(3)의 결합패드를 안착하여 칩(3)을 실장한다.The bumper 9 is made of a conductor on the finished board. The chip 3 is mounted by mounting the coupling pad of the chip 3 on the bumper 9.
안착된 칩(3)의 뒷면에 전도체(11)로 열가소성 프라스틱 계열수지를 실장한다. 이때 전도체는 필요에 따라 절연체를 사용할 수도 있다. 그후 열방출재캡(10) 즉 인켑슈레이션용 캡을 인켑슈레이션용 캡 고정부(8)와 칩 뒷면의 전도체(11)인 플라스틱 계열 수지부에 맞추어 안착한다.The thermoplastic plastic series resin is mounted on the rear surface of the seated chip 3 as the conductor 11. In this case, the conductor may use an insulator as necessary. Thereafter, the heat release material cap 10, that is, the cap for insulation, is seated in conformity with the plastic cap resin part, which is the insulation cap fixing part 8 and the conductor 11 on the back of the chip.
즉, 칩(3)의 안착을 위하여 인쇄회로기판(1)상에 패턴(6)을 형성하고 그 위에 전도체를 재질로 하여 범퍼(9)를 제작하였다. 또한 열방출재 캡(10)의 안착을 위하여 패턴(6)위에 절연체(7)로 코팅하여 그 위에 열가소성 계열 수지를 재질로 한 인켑슈레이션 캡 고정부(8)를 형성하고 칩(3) 뒷면에 역시 열가소성 계열 수지를 재질로 한 전도체(11)를 제작하였다. 이렇게 안착된 열방출재캡(10)은 인켑슈레이션 캡의 역할을 함께 수행함으로써 열방출재의 로딩과 인켑슐레이션의 어려움을 동시에 해결하였다.That is, the pattern 6 was formed on the printed circuit board 1 for mounting the chip 3, and the bumper 9 was manufactured using the conductor as a material thereon. In addition, an insulator (7) is coated on the pattern (6) for the seating of the heat dissipating material cap (10) to form an insulation cap fixing part (8) made of thermoplastic resin material on the back of the chip (3). Also, a conductor 11 made of a thermoplastic resin was produced. The heat release material cap 10 seated in this way solves the difficulties of loading and insulation of the heat release material by performing the role of the insulation cap.
이상과 같이 본 고안은 열방출재의 로딩과 인켑슈레이션을 동시에 행하여 열방출물질의 미스로딩을 방지하고 인켑슈레이션을 용이하게 하여 패키지의 작업성을 향상시키고 열방출의 능률을 향상시킬 뿐 아니라, 인쇄회로기판(1)과 봉지재(encapsulant)로의 수분침투의 취약성을 해결하여 패키지의 신뢰성을 향상시키는 이점이 있다. 또한 메로리의 증대화 더불어 소형 박형화 패키지의 요구에 부응한 칩온보드 열방출 패키지이다.As described above, the present invention simultaneously loads and heats the heat-dissipating material to prevent misloading of the heat-dissipating material and facilitates the heat-insulating, thereby improving the workability of the package and improving the efficiency of heat dissipation. There is an advantage of improving the reliability of the package by solving the vulnerability of moisture penetration into the printed circuit board 1 and the encapsulant. It is also a chip-on-board heat dissipation package that meets the needs of smaller and thinner packages with increased memory.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019940039490U KR200159004Y1 (en) | 1994-12-31 | 1994-12-31 | Semiconductor package of chip on board thermal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019940039490U KR200159004Y1 (en) | 1994-12-31 | 1994-12-31 | Semiconductor package of chip on board thermal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR960025495U KR960025495U (en) | 1996-07-22 |
| KR200159004Y1 true KR200159004Y1 (en) | 1999-10-15 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019940039490U KR200159004Y1 (en) | 1994-12-31 | 1994-12-31 | Semiconductor package of chip on board thermal |
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| Country | Link |
|---|---|
| KR (1) | KR200159004Y1 (en) |
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1994
- 1994-12-31 KR KR2019940039490U patent/KR200159004Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
|---|---|
| KR960025495U (en) | 1996-07-22 |
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