KR200148654Y1 - Solder plating apparatus - Google Patents

Solder plating apparatus Download PDF

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Publication number
KR200148654Y1
KR200148654Y1 KR2019960063820U KR19960063820U KR200148654Y1 KR 200148654 Y1 KR200148654 Y1 KR 200148654Y1 KR 2019960063820 U KR2019960063820 U KR 2019960063820U KR 19960063820 U KR19960063820 U KR 19960063820U KR 200148654 Y1 KR200148654 Y1 KR 200148654Y1
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South Korea
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plating
lead
product element
anode
product
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KR2019960063820U
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KR19980050646U (en
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이경철
오철만
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문정환
엘지반도체주식회사
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    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D17/00Constructional parts, or assemblies thereof, of cells for electrolytic coating
    • C25D17/10Electrodes, e.g. composition, counter electrode
    • C25D17/12Shape or form
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D17/00Constructional parts, or assemblies thereof, of cells for electrolytic coating
    • C25D17/008Current shielding devices
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/56Electroplating: Baths therefor from solutions of alloys
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

본 고안은 반도체의 납도금장비에 관한 것으로, 종래에는 제품소자의 상단은 도금용액의 레벨로 박형화를 달성하고, 그 하단은 별도의 쉴드를 설치하여 박형화를 달성하게 되는 것이나, 이는 제품소자의 상단부위의 도금층이 지나치게 얇게되어 전체적으로 도금층의 편차가 확대되는 문제점이 있었던 바, 본 고안에서는 양측에 설치된 애노드의 상측에 별도의 애노드를 설치하고, 그 각 애노드에 양극을 인가하여 분리되는 주석과 납이 음극을 띄고 있는 제품소자에 달라붙어 도금층을 형성하도록 함으로써, 상기 제품소자의 상단측 도금층이 지나치게 얇아지지 않도록 하여 전체적으로 도금층의 편차를 해소하게 되는 효과가 있다.The present invention relates to a lead plating equipment of a semiconductor, and conventionally, the upper end of the product element to achieve a thinning at the level of the plating solution, the lower end is to achieve a thinner by installing a separate shield, which is the upper end of the product Since the plated layer of the site was too thin, there was a problem that the variation of the plated layer was increased as a whole. In the present invention, separate anodes are installed on the upper sides of the anodes installed on both sides, and tin and lead separated by applying an anode to each of the anodes. By forming a plating layer by adhering to a product element having a cathode, there is an effect of eliminating the variation of the plating layer as a whole by preventing the upper plating layer of the product element from becoming too thin.

Description

반도체의 납도금장비Semiconductor Lead Plating Equipment

본 고안은 반도체의 납도금장비에 관한 것으로, 특히 소자의 상,하간 도금두께의 편차를 줄일 수 있는 반도체의 납도금장비에 관한 것이다.The present invention relates to a lead plating equipment of a semiconductor, and more particularly to a lead plating equipment of a semiconductor that can reduce the variation in plating thickness between the upper and lower elements.

일반적인 납도금장비는 제1도에 도시된 바와 같이, 도금용액(W)의 양측에 (+)전위를 갖는 애노이드(anode)(1,1')가 설치되고, 그 애노이드(1,1')의 중앙에는 (-)전위를 갖는 캐소드(cathode, 또는 제품소자)(2)가 설치되어 있다.As shown in FIG. 1, general lead plating equipment includes an anode (1,1 ') having positive potentials on both sides of the plating solution (W), and the anode (1,1). At the center of '), a cathode (cathode or product element) 2 having a negative potential is provided.

상기와 같이 구성된 납도금장비에 있어서 그 도금공정은 제2a도에 도시된 바와 같이, 각 애노이드(1,1')에 (+)전극을 가하게 되면, 같은 극의 (+)이온인 Pb2+, Sn2+이온들이 도금용액(W) 속으로 분해되어 나와서, (-)전위를 갖는 제품소자(2)의 표면에 달라붙어 소정의 도금층이 형성되는 것이다. 이때, 도금이 완료된 제품소자는 제2b도에 도시된 바와 같이 그 모서리측의 도금층(3a,3a')이 중간측의 도금층(3b)보다 두껍게 형성된다.In the lead plating apparatus configured as described above, as shown in FIG. 2A, when a positive electrode is applied to each of the anodes 1 and 1 ', Pb 2 having the same polarity is positive. + , Sn 2+ ions are decomposed into the plating solution W, and adhere to the surface of the product element 2 having a (−) potential to form a predetermined plating layer. At this time, as shown in FIG. 2B, the plated layers 3a and 3a 'are formed thicker than the plated layer 3b on the intermediate side, as shown in FIG.

따라서, 이와 같이 모서리의 두터운 도금층을 해소하기 위하여 제3도와 같은 납도금장비가 제시되어 있다.Therefore, in order to eliminate the thick plating layer of the corners, a lead plating apparatus as shown in FIG. 3 is proposed.

즉, 도금액(W)의 양측에는 종래와 같이 주석(Sn)과 납(Pb)의 합금으로 납 도금시 제품소자(2)의 표면에 막을 형성하는 애노드(1,1')가 설치되고, 그 중앙에는 제품소자(2)가 끼워져 (-)전위를 공급하는 벨트(4)가 설치되며, 상기 제품소자(2)의 하단에는 그 제품소자(2) 하단부의 도금두께를 조절하기 위한 쉴드(Shield)(5)가 설치 되어 있다.That is, anodes 1 and 1 'are formed on both sides of the plating liquid W to form a film on the surface of the product element 2 during lead plating with an alloy of tin (Sn) and lead (Pb). The product element 2 is inserted in the center is provided with a belt (4) for supplying the (-) potential, the lower portion of the product element 2 is a shield for adjusting the plating thickness of the lower end of the product element (2) (5) is installed.

여기서, 상기 제품노자(2)와 벨트(4)와의 사이에는 제4a도 및 제4b도에 도시된 바와 같이 클립(6)이 개재되어 상기 벨트(4)에 제품소자(2)가 물려져 고정되도록 되어 있다.Here, as shown in Figs. 4a and 4b, the product element 2 is inserted into the belt 4 and fixed as the product element 2 and the belt 4 are interposed therebetween. It is supposed to be.

상기와 같이 구성된 종래의 납도금장비는 제5에 도시된 바와 같이, 상기 제품소자(2) 상단의 도금층(3a)은 도금용액의 레벨을 이용하여 그 두께를 조절하고, 하단의 도금층(3a')에는 쉴드(Shield)(5)를 이용하여 제품소자(2)의 가장자리부분에 형성되는 높은 전류밀도를 해소시켜 줌으로써, 그 가장자리의 도금층(3a,3a')을 박형화하는 것이었다.In the conventional lead plating apparatus configured as described above, as shown in FIG. 5, the plating layer 3a on the top of the product device 2 is adjusted by using the level of the plating solution, and the plating layer 3a 'on the bottom is used. ), The shield 5 was used to eliminate the high current density formed at the edge of the product element 2, thereby reducing the thickness of the plated layers 3a and 3a '.

그러나, 상기와 같이 제품소자(2)의 상단 도금층(3a)은 도금용액의 레벨로 박형화를 달성하고, 그 하단의 도금층(3a')는 별도의 쉴드(5)를 설치하여 박형화를 달성하게 되는 납도금장비는, 상기 제품소자(2)의 상단부위의 도금층(3a)이 지나치게 얇게되어 전체적으로 도금층의 편차가 학대되는 문제점이 있었다.However, as described above, the upper plating layer 3a of the product element 2 achieves thinning at the level of the plating solution, and the lower plating layer 3a 'of the lower portion of the product device 2 achieves thinning by providing a separate shield 5. The lead plating equipment has a problem that the plating layer 3a on the upper end of the product element 2 becomes too thin and the variation of the plating layer is abused as a whole.

따라서, 본 고안의 목적은 상기 제품소자의 상단측 도금층이 지나치게 얇아지지 않도록 하여 전체적으로 도금층의 편차를 해소할 수 있는 반도체의 납도금장비를 제공하는 데 있다.Accordingly, it is an object of the present invention to provide a lead plating apparatus for a semiconductor capable of eliminating the variation of the plating layer as a whole by preventing the upper plating layer of the product element from becoming too thin.

제1도는 종래 도금공정시 도금 이온의 이동경로를 보인 개략도.1 is a schematic diagram showing a migration path of plating ions in a conventional plating process.

제2a도는 종래 납도금장비의 구성을 보인 개략도.Figure 2a is a schematic diagram showing the configuration of a conventional lead plating equipment.

제2b도는 종래 납도금장비에 의해 도금된 소자의 개략도.Figure 2b is a schematic diagram of a device plated by a conventional lead plating equipment.

제3도는 종래 납도금장비의 일례를 보인 개략도.Figure 3 is a schematic diagram showing an example of a conventional lead plating equipment.

제4a도 및 제4b도는 종래 납도금장비에 있어서, 소자의 고정상태를 보인 정면도 및 측면도.4a and 4b is a front view and a side view showing a fixed state of the device in the conventional lead plating equipment.

제5도는 본 고안에 의한 납도금장비의 구성을 보인 개략도.5 is a schematic view showing the configuration of the lead plating equipment according to the present invention.

제6a도 및 제6b도는 본 고안 납도금장비의 동작과 그에 의해 형성되는 소자의 도금분포도.6a and 6b is an operation of the present invention lead plating equipment and plating distribution of the device formed thereby.

제7a도 및 제7b도는 본 고안 납도금장비의 동작과 그에 의해 형성되는 소자의 도금분포도.7a and 7b is a plating distribution diagram of the operation and the device formed by the present invention lead plating equipment.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1,1' : 제1 애노드 10,10' : 제2 애노드1,1 ': first anode 10,10': second anode

이와 같은 본 고안의 목적을 달성하기 위하여, 양측에 설치된 애노드에 양극을 인가하여 그 애노드에서 분리되는 주석과 납이 음극을 띄고 있는 제품소자에 달라붙어 도금층을 형성하도록 하는 반도체의 납도금장비에 있어서, 상기 애노드의 상측에 별도의 애노드부를 설치하여 제품소자의 상단 도금층을 보충하도록 구성함을 특징으로 하는 반도체의 납도금장비가 제공된다.In order to achieve the object of the present invention, in the lead plating equipment of the semiconductor to apply a positive electrode to the anodes installed on both sides to form a plating layer by the tin and lead separated from the anode to the product device having the negative electrode Further, there is provided a lead plating equipment for a semiconductor, which is configured to supplement a top plating layer of a product device by installing a separate anode part on an upper side of the anode.

이하, 본 고안에 의한 반도체의 납도금장비를 첨부된 도면에 도시된 일실시예에 의거하여 상세하게 설명한다.Hereinafter, the lead plating equipment of the semiconductor according to the present invention will be described in detail with reference to an embodiment shown in the accompanying drawings.

제6도에 도시된 바와 같이 본 고안에 의한 납도금장비는, 도금액(W)의 양측에 주석(Sn)과 납(Pb)의 합금으로 납 도금시 제품소자(2)의 표면에 막을 형성하는 제1 애노드(1,1')가 설치되고, 그 중앙에는 제품소자(2)가 끼워져 (-)전위를 공급하는 벨트(4)가 설치되며, 상기 제품소자(2)의 하단에는 그 제품소자(2) 하단부의 도금두께를 조절하기 위한 쉴드(Shield)(7)가 설치되고, 상기 제1 애노드(1,1')의 상측에는 제품소자(2)의 상단 도금층(3a)을 보충하기 위한 별도의 제2 애노드(10,10')가 양측에 설치된다.As shown in FIG. 6, in the lead plating apparatus according to the present invention, a film is formed on the surface of the product element 2 when lead plating with an alloy of tin (Sn) and lead (Pb) on both sides of the plating solution (W). A first anode 1, 1 'is provided, and a belt 4 for supplying a negative potential is provided at the center of the product element 2, and at the bottom of the product element 2, the product element. (2) A shield (7) for adjusting the plating thickness of the lower end portion is provided, and on top of the first anode (1, 1 ') for replenishing the upper plating layer (3a) of the product element (2) Separate second anodes 10, 10 'are provided on both sides.

도면중 종래와 동일한 부분에 대하여는 동일한 부호를 부여하였다.In the drawings, the same reference numerals are given to the same parts as in the prior art.

도면중 미설명 부호인 6은 클립이다.6, which is not described, is a clip.

상기와 같이 구성되는 본 고안에 의한 납도금장비는 제7a도 및 제7b도에 도시된 바와 같이, 상기 제품소자(2) 하단의 도금층(3a') 두께는 쉴드(Shield)(5)를 이용하여 높은 전류밀도를 해소하고, 반면에 상기 제품소자(2)의 상단은 제2 애노드(10,10')에 양극의 전위를 공급하여 그 제2 애노드(10,10')로부터 분리되는 주석과 납이 상기 제품소자(2)의 상단에 달라붙도록 하여 도금층(3a)의 두께가 지나치게 박형화되는 것을 방지하는 것이다.Lead plating equipment according to the present invention is configured as described above, as shown in Figure 7a and 7b, the thickness of the plating layer (3a ') of the lower end of the product element 2 uses a shield (Shield) 5 To solve the high current density, while the upper end of the product element 2 supplies tin potentials to the second anodes 10 and 10 'and is separated from the second anodes 10 and 10'. Lead is stuck to the upper end of the product device 2 to prevent the thickness of the plating layer 3a from being too thin.

이상에서 설명한 바와 같이 본 고안에 의한 반도체의 납도금장비는, 양측에 설치된 애노드의 상측에 별도의 애노드를 설치하고, 그 각 애노드에 양극을 인가하여 분리되는 주석과 납이 음극을 띄고 있는 제품소자에 달라붙어 도금층을 형성하도록 함으로써, 상기 제품소자의 상단측 도금층이 지나치게 얇아지지 않도록 하여 전체적으로 도금층의 편차를 해소하게 되는 효과가 있다.As described above, in the semiconductor lead plating equipment according to the present invention, a separate anode is provided on an upper side of an anode installed on both sides, and a tin and lead separated from each other by applying an anode to each anode exhibit a cathode. By sticking to the plated layer to form the plated layer, the plated layer on the upper side of the product device is prevented from becoming too thin, thereby eliminating the variation of the plated layer as a whole.

Claims (1)

양측에 설치된 애노드에 양극을 인가하여 그 애노드에서 분리되는 주석과 납이 음극을 띄고 있는 제품소자에 달라붙어 도금층을 형성하도록 하는 반도체의 납도금장비에 있어서, 상기 애노드의 상측에 별도의 애노드부를 설치하여 제품소자의 상단 도금층을 보충하도록 구성함을 특징으로 하는 반도체의 납도금장비.In the lead plating equipment of a semiconductor in which a positive electrode is applied to an anode installed on both sides so that tin and lead separated from the anode adhere to a product device having a negative electrode, a plating layer is formed. Lead plating equipment of a semiconductor, characterized in that to configure to supplement the top plating layer of the product device.
KR2019960063820U 1996-12-30 1996-12-30 Solder plating apparatus KR200148654Y1 (en)

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KR200148654Y1 true KR200148654Y1 (en) 1999-06-15

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