KR20010105680A - Histogram Equalization device using block histogram in image signal processor - Google Patents

Abstract

For the purpose of conducting injection molding of an aromatic polyester preform through advantageous exposure of a melt of the aromatic polyester to a reduced-pressure atmosphere, the production of an aromatic polyester preform is conducted by the use of a molding machine provided with vent holes at specified positions in order to evacuate the machine, whereby a preform lowered in acetaldehyde content can be advantageously produced.

Description

Histogram Equalization device using block histogram in image signal processor

The present invention relates to an image signal processor that receives image data output from an image sensor for better image quality, and more particularly relates to an image signal processor. A flattening device.

In general, since the image data output from the image sensor has a relatively low image quality characteristic, the image data from the image sensor is subjected to image processing in the image signal processor for better image quality.

Such an image signal processor processes signals through histogram equalization for applications requiring real-time processing because it is difficult to obtain a desired brightness quality due to low sensitivity when operating an image sensor in real time. .

Here, the flattening method of the distribution is to determine the degree of brightness of one screen, and the gray level of each pixel divided by brightness, that is, the brightness information of the pixel by multiplying the scale factor to appropriate the dark screen As a method of obtaining a new screen adjusted by brightness, it has been mainly implemented by a software method until now, but with the development of VLSI (Very Large Scaled Integration) technology, it can be implemented in hardware inside an image signal processor.

1 is a block diagram of a distribution planarization apparatus of an image signal processor for implementing a conventional distribution planarization method.

Referring to the drawings, the conventional planarization flattening apparatus receives a brightness information Y_In of a pixel output from an image sensor (not shown) and stores the screen information one by one, and the brightness information of each pixel ( Y_In) to receive and store the distribution at 256 levels (dynamic range), and store the distribution to determine the brightness information corresponding to the median value of the stored distribution as the reference brightness information (YF_Mean) and the brightness determination unit 110 of the intermediate value. A scale factor generator 120 generating a scale factor of each pixel divided by brightness with respect to reference brightness information YF_Mean using the distribution chart, and a generated scale factor, and stored in the frame memory 100 The scale factor storage and distribution planarization unit 130 is configured to flatten the brightness information of one screen by multiplying the brightness information of the pixel by the corresponding scale factor.

The conventional planarization flattening device configured as shown in FIG. 1 requires a lot of hardware resources and is difficult to be implemented in hardware in an image signal processor, and uses a system host (for example, a microprocessor) and a system memory. If implemented in software, image signal processing will cause performance degradation of the entire system.

In addition, when the distribution factor is biased in a specific area by applying the middle value of the distribution chart composed of brightness information as the reference brightness information (YF_Mean), the image quality is good due to the extreme stretching in one direction. Can't get it.

The present invention has been made to solve the above problems, and stores the distribution of the brightness information of each pixel for each predetermined area divided into blocks, and uses the average value of the brightness information of each pixel as reference brightness information. In addition, the scale factor is generated by applying the scale factor for each block based on the average value of brightness information of one screen, and the distribution scale is flattened using the generated scale factor to increase the contrast to improve image quality and to increase the hardware size. SUMMARY To provide a flattening device for distribution using a block distribution in an image signal processing device.

1 is a block diagram of a distribution planarization apparatus of an image signal processor for implementing a conventional distribution planarization method.

Figure 2 is a graph for conceptually explaining a distribution planarization method according to the present invention.

3 is a block diagram of a distribution planarization apparatus according to the present invention;

4 is an internal block diagram of a brightness average value generator of a screen according to an embodiment of the present invention.

5 is a signal timing diagram for a brightness average value generator of the screen;

6 is an internal block diagram of a distribution chart generator for each block according to an embodiment of the present invention.

7 is an internal block diagram of a controller in the distribution chart generation unit for each block.

8 is an internal block diagram of a flattener according to an embodiment of the present invention.

9 is an internal block diagram of the range selector of FIG. 8; FIG.

FIG. 10 is an internal block diagram of the scale factor generator of FIG. 8. FIG.

FIG. 11 is an internal block diagram of the jet water generating unit of FIG. 10; FIG.

FIG. 12 is an internal block diagram of the pidget generator of FIG. 10; FIG.

In accordance with an aspect of the present invention, there is provided an apparatus for flattening a distribution using a block distribution in an image signal processing apparatus, and receiving brightness information of pixels from an external device in response to a clock signal and a frame synchronization signal. Means for generating a brightness average value of the screen for obtaining a brightness average of the displayed screen; A brightness average value from the brightness average value generating means and the brightness information of the pixel are received and divided into a plurality of blocks to generate and store a distribution map, and a block to which the number of pixels for each block and the brightness average value output from the brightness average value generating means belong. Distribution block generation and storage means for outputting a number of pixels and a number of pixels having brightness information less than and exceeding the brightness average value; And a brightness value required by the user, first and second factors for determining a dynamic range of the brightness information of the pixel, brightness information of the pixel, and information on the number of pixels output from the block generation and storage means for each block. And a flattening means for generating a scale factor for each block to which the brightness average value belongs, and generating a scale factor for each block for each block to flatten the brightness information of one screen.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

In a preferred embodiment of the present invention, the brightness information is divided into 16 blocks to store a distribution map, and when the scale factor is generated, the block scale factor is linearly divided and applied to minimize the error of the block, and the brightness information of each pixel. For the block in which the reference brightness information (YF_Mean), which is an average value of, does not store a cumulative value, only the number of pixels included in the block is stored to simplify the flattening distribution and reduce the implementation hardware size.

2 is a graph for conceptually explaining a distribution planarization method according to the present invention.

In the graph of FIG. 2, "Y" is gray level in the color space (pixel brightness information), YF_Mean is the average value of one screen brightness, Y_Target is the brightness level required by the user, and Y_Start and Y_end are brightness and contrast. The factor to determine the dynamic range is to support the adjustable, YaTotal is the number of pixels with brightness information greater than YF_Mean, Ya is the brightness information of any pixel in the brightness information area greater than YF_Mean, and YaSub is YF_Mean Is the number of pixels between Y and Yb, YbTotal is the number of pixels with brightness information less than YF_Mean, Yb is the brightness information of any pixel in brightness information area less than YF_Mean, and YbSub is between Ystart and Yb. Each pixel number is shown.

Referring to FIG. 2, YF_Mean, which is reference brightness information, is mapped to Y_Target by flattening the distribution, and the brightness information of pixels existing in a brighter area than YF_Mean and the brightness information of pixels in a darker area of YF_Mean are scaled around YF_Mean. By mapping in response to the factor, the screen is adjusted to the desired brightness.

In FIG. 2, Equation 1 is applied to map the brightness information Ya for any pixel present in the brightness information area larger than YF_Mean to Ya 'by distribution planarization.

Ya '= Ytarget + Range × Scale_Factor

Range = Yend-Ytarget

Scale_Factor = YaSub / YaTotal

In Equation 1, "Yend-Ytarget", which is a Range value, is a region where pixels of a range that are brighter than Ytarget will exist after flattening the distribution, and "YaSub / YaTotal" is a scale factor corresponding to Ya, and is "Yend-Ytarget". Each location is mapped to.

In FIG. 2, Equation 2 below is applied to map the brightness information Yb for any pixel present in the brightness information area smaller than YF_Mean to Yb 'by distribution planarization.

Yb '= Ystart + Range × Scale_Factor

Range = Ytarget-Ystart

Scale_Factor = YbSub / YbTotal

In Equation 2, the range value "Ytarget-Ystart" is a region where pixels of a range darker than Ytarget will exist after flattening the distribution, and "YbSub / YbTotal" is a scale factor corresponding to Yb and is a region of "Ytarget-Ystart". Each location is mapped to.

3 is a block diagram of the flattening device according to the present invention, an embodiment of flattening the distribution by dividing the distribution into 16 blocks.

Referring to FIG. 3, the distribution planarization apparatus of the present invention receives the brightness information YIn of a pixel output from an image sensor (not shown) in response to a clock signal Clk and a frame synchronization signal Vsync. 16 blocks by receiving the brightness average value generation unit 200, the brightness average value from the brightness average value generation unit 200 and the pixel brightness information YIn from the image sensor to obtain the average brightness of the screen displayed on one screen Generating a distribution chart, and outputting the number of pixels for each block, the number of pixels of a block to which the brightness average value output from the screen brightness average value generator 200 belongs, and the number of pixels exceeding and exceeding the brightness average value. The block diagram generation unit 210 and Ytarget, Ystart, Yend, brightness information (YIn) of the pixels, and the image information in response to the information about the number of pixels output from the block diagram generation unit 210. Each block includes a flattening unit 220 for generating a scale factor for each block belonging to the brightness average value and generating a scale factor for each other block to flatten the brightness information of one screen. It will be described in more detail with reference to Figures 4 to 8.

4 is an internal block diagram of the brightness average value generator 200 of the screen according to an embodiment of the present invention, Figure 5 is a signal timing diagram for the brightness average value generator of the screen.

4 and 5, the brightness average value generator 200 sequentially accumulates and receives brightness information YIn of a pixel on a screen in response to a clock signal Clk and accumulates 201 and a clock signal. A latch 202 for storing the accumulated value from the accumulator 201 in response thereto, a counter 203 for counting the number of pixels of brightness information input in response to the clock signal Clk, and a latch in the latch 202. A divider 204 which receives the accumulated value Sum and the count result value Cnt of the counter 203 and divides the count result value Cnt from the cumulative value Sum as the reference brightness information YF_Mean, A latch 205 for storing the reference brightness information YF_Mean of the divider 204 in response to the clock signal Clk and the latches 202 and 205 and the counter 203 in response to the frame synchronization signal Vsync. The control unit 206 controls the operation.

The brightness average value generation unit 200 configured as described above accumulates the brightness information (Yin) of each pixel while being displayed by the frame synchronization signal (Vsync) to obtain an average value of the brightness component (Yin) of the displayed image. The cumulative value is obtained, and reference brightness information YF_Mean, which is a brightness average value, is obtained while not being displayed.

In detail, the controller 206 activates a latch enable signal LatchEn1 that enables the latch 202 during a period in which the accumulator 201 calculates a cumulative value in response to the clock signal Clk. Activates latch enable signal LatchEn2 which enables latch 205 during divider period of divider 204, and latch 202 and counter 203 for accumulation of brightness information of the next screen after divider period. Activate the clear signal (Clear) to make "0".

The divider 204 divides the reference brightness information YF_Mean by dividing the accumulated value Sum stored in the latch 202 as the number of jets and the count result value Cnt stored in the counter 203 as the number of jets. In this case, the divider 204 can use both a parallel divider and a serial divider, and when the serial divider is used, the divider 204 operates in synchronization with the clock signal Clk.

In addition, the latch 205 stores and maintains the reference brightness information YF_Mean from the divider 204 for one screen period in synchronization with the latch enable signal LatchEn2.

FIG. 6 is an internal block diagram of a distribution chart generator 210 for each block according to an embodiment of the present invention. The controller 211 includes sixteen distribution map storage blocks and an incrementer. In response to the control of the block distribution diagram generation unit 212 and the block distribution diagram generation unit 212 and the block distribution diagram generation unit 212 to increment the active block according to the control of the control unit 211 The pixel number output unit 213 outputs the number of pixels for each block, the number of pixels of the block to which the brightness average value belongs, and the number of pixels exceeding and exceeding the brightness average value. The accumulator 215 and 16 blocks receive a cumulative distribution of the active block in response to the clock signal Clk and the control signal Accelear from the controller 211. Control unit 211 The result of the accumulator 215 is stored in the block activated by the control signal DWriteSel in synchronization with the clock signal Clk, and is activated by the control signal DensityRead from the control unit 211. The first storage unit 216 outputs the number of pixels accumulated in a block to which brightness information belongs and the number of pixels accumulated in blocks belonging to a brightness area darker than the brightness information of the current pixel. The second storage unit 217 and the control unit 211 configured to be activated by the control signal MeanBlockWrt from the control unit 211 and store the number of pixels of the block in which the average brightness value belongs to the block in synchronization with the clock signal Clk. When the control signal from LowTotal_Wrt is activated, the result of the accumulator 215 is stored in synchronization with the clock signal Clk, the stored value is output, and when the control signal HighTotal_Wrt from the control unit 211 is activated, the accumulated value is accumulated. Flag (215 ) Is a third storage unit 218 for storing and outputting the result of synchronously with the clock signal Clk. Here, when the block to which the brightness information of the current pixel belongs is the lowest block, the first storage unit 216 outputs a value of "0" to UnderDensity, and the block activated by the signal MeanBlockWrt output from the controller 211 is cleared. do. When the number of pixels of the block activated by the control signal MeanBlockWrt from the controller 211 and the brightness average value belongs to the block is stored in the second storage unit 217, the accumulator 215 is cleared to generate a block distribution chart. The number of pixels of the block to which the average brightness value from the unit 212 belongs is sent to the second storage unit 217 as it is.

Herein, when the frame synchronization signal Vsync indicates the display time, the controller 211 compares the brightness information Yin of the pixel and the reference brightness information YF_Mean, which is a brightness average value output from the brightness average value generator 200. And a control signal HWriteSel for incrementing a value of the corresponding distribution storage block in the block distribution generator 212 in response to each decoding result, and brightness information of the current pixel stored in the first storage unit 216. The control signal DensityRead is generated in response to the clock signal Clk to control the output of the pixel number CurrentDensity accumulated in the block to which the block belongs and the number of pixels UnderDensity accumulated in the blocks belonging to the brightness region darker than the brightness information of the current pixel. The controller 211 outputs a control signal AccClear for clearing the value of the accumulator 215 to the accumulator 215 during the period that is not displayed by the frame sync signal Vsync, and generates a block distribution diagram stored during the display period. The control signal HReadSel for reading the value of each distribution storing block in the unit 212 is output to the block distribution generating unit 212. In addition, the control unit 211 controls to selectively store the result of the accumulator 215 in any one of 16 blocks in the first storage unit 216 during the period that is not displayed by the frame synchronization signal Vsync. Generates a signal DWriteSel and outputs it to the first storage unit 216, and outputs a control signal MeanBlockWrt to the second storage unit 217 to store the number of pixels of the block to which the brightness average value belongs in the second storage unit 217. The control unit LowTotal_Wrt for storing the number of pixels having brightness smaller than the reference brightness information YF_Mean in the third storage unit 218 and the number of pixels having brightness greater than the reference brightness information YF_Mean are stored in the third storage unit. The control signal HighTotal_Wrt for storing in 218 is output to the third storage unit 218, respectively. In particular, the control unit 211 activates the control signal AccClear before and after storing the number of pixels of the block to which the average brightness value belongs in the second storage unit 217 to control the number of pixels of the block to which the average brightness value belongs to the third storage unit 218. Control not to be included in the number of stored pixels.

FIG. 7 is an internal block diagram of the control unit 211. As shown in the drawing, the control unit includes 8-bit reference information of 8-bit brightness information Yin and the brightness average value output from the brightness average value generation unit 200. Comparing unit 300 for receiving and comparing the information (YF_Mean), decode the upper four bits of the 8-bit brightness information (Yin) to select any one of the 16 distribution map storage block in the block distribution generator 212 A block decoder 301 for generating a control signal YblockSel for the control, a control signal DisplayTime indicating that it is a display period, and a value of the corresponding distribution map storage block in the block distribution generator 212 in response to the control signal YblockSel output from the block decoder 301. The number of pixels accumulated in the block to which the control signal HWriteSel and the brightness information of the current pixel stored in the first storage unit 216 belong are increased. The first control signal generator 303 for outputting the control signal DensityRead for controlling the output of the pixel number UnderDensity accumulated in blocks belonging to a darker area than the previous information, in response to the upper 4 bits of the reference brightness information YF_mean. The block distribution chart in response to the address signal DblockSel from the address generator 304 and the address generator 304 for generating an address signal DblockSel for selecting any one of the 16 distribution map storage blocks in the block distribution chart generator 212. A second control signal for generating and outputting a control signal HReadSel for reading the value of each distribution map storage block in the generation unit 212 and a control signal MeanBlockWrt, DWriteSel, LowTotal_Wrt, HighTotal_Wrt for controlling the output of the pixel number output unit 213; The current reference brightness information YF_mean is valid from the generation unit 305, the frame synchronization signal Vsync, the clock signal Clk, and the brightness average value generation unit 200. The timing controller 306 outputs a plurality of timing control signals for controlling the operation timings of the address generator 304 and the first and second control signal generators 303 and 305 in response to the valid signal Mean_Valid. .

Here, the comparison unit 300 outputs the signals YisHigh and YisMeanBlock to the flattening unit 220 as a result of comparing the reference brightness information YF_Mean and the brightness information Yin, and the YisMeanBlock signal is the reference brightness information YF_Mean and brightness information. The upper 4 bits of (Yin) are compared and enabled in the same case.

The first control signal generator 303 outputs the control signal YblockSel from the block decoder 301 to HWriteSel and DensityRead, respectively, while the control signal DisplayTime indicating that the display period output from the timing controller 306 is enabled. While the control signal DisplayTime is disabled, all output signals are disabled.

Next, the address generator 304 includes a block counting unit and a comparing unit to clear the block counting unit according to the control signal IncClr from the timing control unit 306, and when the control signal IncEn is enabled, the block counting unit is a clock signal ( Increment in synchronization with Clk). When the counting value of the block counting unit is equal to YF_Mean [7: 4], the signal MeanBlock is enabled to indicate that the block includes the YF_Mean. When the counting value of the block counting unit is smaller than "1" than YF_Mean [7: 4], The signal UnderBlock is enabled to allow the second control signal generator 305 to activate LowTotal_Wrt. Subsequently, when counting of the block counting unit is completed, enable signal HighBlock to activate HighTotal_Wrt of the second control signal generator 305, enable signal DensityEnd, output the timing controller 306, and then output the timing controller 306. The operation is terminated by the control signal IncEn disabled from).

Next, the second control signal generator 305 outputs DblockSel from the address generator 304 to HReadSel and DWriteSel, respectively, while the control signal DensityGenTime output from the timing controller 306 is enabled, and MeanBlock is MeanBlockWrt when enabled, LowTotal_Wrt while UnderBlock is enabled, and HighTotal_Wrt when HighBlock is enabled.

Next, the timing controller 306 distinguishes and enables the control signals DisplayTime and DensityGenTime in response to the frame synchronization signal Vsync, and activates IncEnr and AccClear when the valid signal Mean_Valid is enabled, and then enables IncEn. . After that, when the enabled Densityend is input from the address generator 304, IncEn is disabled. When the enabled MeanBlock is input from the address generator 304, AccClear is enabled.

Finally, the internal configuration and operation of the flattening unit 220 of FIG. 4 will be described.

8 is an internal block diagram of the planarization unit 220 according to an embodiment of the present invention.

As mentioned above, the flattening unit 220 corresponds to the Ytarget, Ystart, Yend, brightness information (Yin) of pixels, and information on the number of pixels output from the distribution chart generator for each block 210 to which the brightness average value belongs. The scale factor is generated for each block and the scale factor is generated for each block, and the brightness information of the pixel inputting the frame sync signal Vsync is delayed to flatten the brightness information for one screen. The latches 400 and 401 for delaying, the latches 402 and 403 for latching the signal YisHigh output from the block-by-block distribution generator 210, and the block-by-block distribution in response to Ystart, Ytarget and Yend defined by the user The range is selected by YisHigh output from the generation unit 210 according to whether the position of brightness information of the pixel is in the brightness region or the dark region than YF_Mean. Generates a scale factor used to change the brightness information of the pixel in response to a plurality of signals output from the range selector 404 and the distribution chart generator 210 for each block and brightness information of the lower 4 bits. A multiplier 406 and a latch 403 that are multiplied by a range 405 and a range output from the range selector 404 and a scale factor output from the scale factor generator 405. In response to YisHigh, the multiplication result from the offset selector 407 and multiplier 406 that selectively outputs Ytarget and Ystart and the output value of the offset selector 407 are added to flatten the brightness information Yin of the pixel. And an adder 408 for finally outputting the brightness information Yout.

The flattening unit 220 formed as described above delays the frame synchronization signal Vsync as much as the brightness information Yin of the input pixel is delayed, and obtains the scale factor from the block diagram generation unit 210 of FIG. 6. The scale factor generator 405 generates a scale factor for two clocks by receiving signals necessary for lowTotal, HighTotal, CurrentDensity, UnderDensity, MeanDensity, and YisMeanBlock in response to the clock signal Clk. Then, the range selector 404 selects a range two clocks later according to Ytarget, Ystart, and Yend defined by the user, multiplies the selected range by the scale factor, and YisHigh identifies whether the area is larger or smaller than YF_Mean. After selecting Ytarget or Ystart as the offset value and adding the result value multiplied by the selected offset value, the brightness information of the flattened distribution pixel is finally output.

FIG. 9 is an internal block diagram of the range selector of FIG. 8. The upper limit selector 500 selects and outputs Yend or Ytarget as the upper limit threshold in response to YisHigh, and lowers Ytarget or Ystart in response to YisHigh. The subtractor 502 which subtracts the lower limit boundary value from the lower limit boundary selector 501 from the lower limit boundary selector 501 to select and output the threshold value, and the upper limit boundary value from the upper limit boundary selector 500. It consists of two latches 503 and 504 for delaying the subtraction result value output from 502 in response to the clock signal Clk.

First, the range selector 404 selects Yend and Ytarget or Ytarget and Ystart as the upper and lower boundary values by the upper boundary selector 500 and the lower boundary selector 501 by YisHigh. Obtain "Yend-Ytarget" or "Ytarget-Ystart", delay the subtracted value by two clock signals, and export it as a range value.

FIG. 10 is an internal block diagram illustrating the scale factor generator of FIG. 8.

As mentioned above, the scale factor is a value that is multiplied by the brightness information of the pixel and used to change the brightness information of the pixel.

As shown in FIG. 10, the scale factor generator generates a jet number generator 600 generating jet numbers YaTotal and YbTotal of the scale factor described in FIG. 601, a divider 602 that divides the number of jets (YaTal, YbTotal) output from the jet number generating unit 600 from the number of jets (YaSub, YbSub) output from the jet number generating unit 601, and a clock signal The latch 603 outputs a scale factor after latching the division result of the divider 602 in response to (Clk).

The scale factor generator configured as described above distinguishes darker areas from brighter areas than YF_Mean based on YF_Mean, and includes pixels that have brightness of pixels applied based on the number of pixels (YaTotal, YbTotal) present in each area. The ratio of the numbers YaSub and YbSub is output in a scale factor. In this case, theoretically, the scale factor ranges from "0" to "1", which is very limited when implemented in digital logic. Therefore, in the present invention, in order to minimize the rounding error caused by the division operation, multiplying YaSub or YbSub by an arbitrary value corresponding to an integer multiple of 2 (that is, after shifting to the left by an arbitrary number) In order to compensate for this, the output of the multiplier 406 multiplied by the range of the range selector 404 and the scale factor is divided by an arbitrary value (that is, shifted to the right by an arbitrary number of digits). do).

11 is an internal block diagram of the jet water generating unit 600.

Referring to FIG. 11, the jet number generator 600 is output from a multiplier 701 for multiplying YF_Mean [3: 0] and a MeanDensity from the block diagram generator 210, and a block diagram generator 210 for each block. An adder 703 that adds the multiplication result of the LowTotal and the multiplier 701, a subtractor 702 that receives the multiplication result of the MeanDensity and the multiplier 701, and subtracts the multiplication result of the multiplier 701 from the MeanDensity. An adder 704 that receives and adds the subtraction result value and HighTotal of 702 and a multiplexer 705 that selectively outputs the addition result values of the adders 703 and 704 in response to the output signal YisHigh of the comparator 300. ) And a latch 706 for latching the output signal of the multiplexer 705 in response to a clock signal Clk and outputting it as YaTotal or YbTotal, which is darker and brighter than YF_Mean used as the number of jets when generating the scale factor. YaTot, the number of pixels present in each al and YbTotal are obtained.

The number of pixels YaTotal and YbTotal used as the number of jets is determined by the output signals LowTotal, HighTotal, and MeanDensity of the distribution chart generator 210 for each block, and the sum (LowTotal + HighTotal + MeanDensity) becomes the number of all pixels on the screen.

Specifically, based on YF_Mean, the cumulative value from the darkest block to the previous block of the block including YF_Mean accumulates in LowTotal, and the cumulative value for blocks in which the brightness information is brighter than YF_Mean without YF_Mean is accumulated. When passed and inputted to highTotal, the jet number generator 600 obtains the number of pixels in the range less than YF_Mean from MeanDensity indicating the number of pixels of the block including YF_Mean, adds the obtained value to LowTotal in the adder 703, and then YbTotal. Make Then, the number of pixels in a range larger than YF_Mean is obtained and added to HighTotal in the adder 704 to generate YaTotal. The YbTotal or YaTotal generated in this way is selected by YisHigh indicating a range in which the brightness information of the pixel is located in the multiplexer 705, and is output in the number of jets when generating the scale factor. In addition, the output MeanHigh of the subtractor 702 is output to the pidget number generator 601.

12 is an internal block diagram of the pidget generator 601.

Referring to FIG. 12, the pidget number generator 601 subtracts an UnderDensity from the current densities output from the distribution chart generator 210 for each block, in response to the output signal YisMeanBlock of the comparator 300. Or a multiplexer 804 for selectively outputting a subtraction result of the subtractor 801, a subtractor 802 for subtracting YF_Mean [3: 0] from Yin [3: 0], and an output signal YisHigh of the comparator 300; A multiplexer 805 for selectively outputting the result of subtraction of Yin [3: 0] or the subtractor 802 in response to the logical multiplication of YisMeanBlock, and an adder for receiving and adding MeanHigh from UnderDensity and the jet number generator 600. 803, a multiplexer 806, multiplexers 804, 805 for selectively outputting an underDensity or an addition result of the adder 803 in response to a logical AND of the output signal YisHigh and the inverted YisMeanBlock of the comparator 300; Each selected value from The output signal of the adder 808 is latched in response to the multiplier 807, the multiplication result of the multiplier 807, the adder 808 for adding the output value of the multiplexer 806, and the clock signal Clk. Or a latch 809 for outputting to YbSub, and outputting the position where the input pixel exists in the two areas divided by YF_Mean as the number of pidgets when generating the scale factor expressed by the number of pixels. That is, the number of pidgets is a cumulative value for the number of pixels from a block in a dark place to a position where an input pixel exists.

The process of generating the pidget number in FIG. 12 is classified into four types according to the brightness information of the input pixel.

First, when the brightness information of the input pixel is less than YF_Mean and is included in a block of brightness smaller than the block containing YF_Mean.

Second, when the brightness information of the input pixel is less than YF_Mean and is included in a block including YF_Mean.

Third, if the brightness information of the input pixel is larger than YF_Mean and included in the block containing YF_Mean.

Fourth, if the brightness information of the input pixel is larger than YF_Mean and is included in a block of brightness larger than the block containing YF_Mean.

Referring to FIG. 12, the process of generating the pidget number for the four cases as described above is as follows. Here, for the convenience of description, the description of each operation performed in each component of FIG. 12 will be omitted, and for the four cases, the process of generating the pidget number YaSub and YbSub output through the pidget number generation unit of FIG. 12 will be described. Expressed as

First, through the logical expression "UnderDensity + ((CurrentDensity-UnderDensity) × Yin [3: 0])", the second case uses the logical expression "UnderDensity + (MeanDensity × Yin [3: 0])". The third case is via the logical expression "UnderDensity + (MeanDensity × (Yin [3: 0]-YF_Mean [3: 0]))", and the fourth case is "(UnderDensity + MeanHigh) + ((CurrentDensity-UnderDensity The number of pidgets is generated through the logical expression of () x Yin [3: 0]) ".

In the present invention made as described above, based on an image system in which brightness information is divided into 256 levels, the distribution map is divided into 256 levels without obtaining distribution maps. It can be implemented by dividing into blocks or 64 blocks, and this can be changed according to the performance of the image system to be implemented.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

According to the present invention made as described above, the distribution of the brightness information of each pixel for each predetermined area divided into blocks is stored, the average value of the brightness information of each pixel is used as reference brightness information, and The scale factor is generated by applying the block factor based on the average value, and the distribution factor is flattened using the generated scale factor to increase the contrast to improve image quality and at the same time to realize an excellent effect of reducing the hardware size. .

Claims (7)

In the device for performing the distribution planarization using the block distribution in the image signal processing device, Brightness average value generating means for receiving brightness information of pixels from an external device in response to a clock signal and a frame synchronization signal to obtain a brightness average of a screen displayed on one screen; A brightness average value from the brightness average value generating means and the brightness information of the pixel are received and divided into a plurality of blocks to generate and store a distribution map, and a block to which the number of pixels for each block and the brightness average value output from the brightness average value generating means belong. Distribution block generation and storage means for outputting a number of pixels and a number of pixels having brightness information less than and exceeding the brightness average value; And The brightness value required by the user, first and second factors for determining a dynamic range of the brightness information of the pixel, brightness information of the pixel, and information on the number of pixels output from the block generation and storage means for each block. And a flattening means for generating a scale factor in pixels for the block to which the brightness average value belongs, and generating a scale factor for each block for the remaining blocks to flatten the brightness information of one screen. Distribution planarization device in the image signal processing device comprising a. The method of claim 1, wherein the brightness average value generating means, Accumulating means for sequentially receiving and accumulating brightness information of the pixel on a screen in response to the clock signal; First latch means for storing an accumulated value from said accumulating means in response to said clock signal; Counting means for counting the number of pixels of brightness information input in response to the clock signal; Division means for receiving a cumulative value latched by the first latch means and a count result value of the counting means, dividing the count result value from the cumulative value and outputting the result as a brightness average value of the screen; Second latch means for storing the average brightness value of the screen output from the dividing means in response to the clock signal; And Control means for controlling the operation of said first and second latch means and said counting means in response to said frame synchronization signal; Distribution planarization device in the image signal processing apparatus comprising a. The method of claim 1, wherein the distribution map generation and storage means for each block, Control means; Block distribution generating means for generating a distribution for each block by incrementing the storage block which is activated under the control of the control means, including a plurality of storage blocks and an incrementer; And The number of pixels for each block, the number of pixels of the block to which the brightness average value output from the brightness average value generating means belongs, and the brightness average value exceeding the block distribution degree of the block distribution chart generating means and the control of the control means. It comprises a pixel number output means for outputting the number of pixels with brightness information, The pixel number output means, Accumulating means for receiving and accumulating a distribution diagram of an active storage block in response to the clock signal and the cumulative clear signal output from the control means; Synchronizing a result value of the accumulating means with the clock signal in a storage unit activated by a first write selection signal from the control means, including the same number of storage units as the number of blocks of the block generation and storage means for each block; The number of pixels activated by the first read control signal from the control means and stored in the storage unit in a brightness area darker than the number of pixels accumulated in the block to which the brightness information of the current pixel belongs and the brightness information of the current pixel. First storage means for outputting the number of pixels accumulated in the belonging blocks; The number of pixels of the storage block belonging to the brightness average value is included in the storage unit activated by the first write control signal from the control means, including the number of storage units equal to the number of blocks of the distribution map generation and storage means. Second storage means for storing in synchronization with a clock signal; And In response to a second write control signal from the control means to store the result value of the accumulating means in synchronization with the clock signal, output the stored value as the number of pixels having brightness information less than the brightness average value, and the control means Third storage means for storing the resultant value of the accumulating means in synchronization with the clock signal in response to a third write control signal from the digital signal and outputting the number of pixels having brightness information exceeding the brightness average value; The control means, When the frame synchronization signal indicates a display time, a comparison value between the brightness information of the pixel and the brightness average value output from the brightness average value generating means, and the value of the corresponding storage block in the block distribution chart generating means in response to each decoding result. Output an increment enable signal to be incremented, and output the first read control signal in response to the clock signal; Activate the cumulative clear signal when the frame synchronization signal is not displayed, and activate a second read control signal for reading a value of the corresponding storage block in the block distribution chart generating means stored during the display time; And the first write selection signal and the first to third write control signals are activated. The method of claim 3, wherein the control means, Comparing means for receiving and comparing brightness information of the pixels and brightness average values output from the brightness average value generating means; Block decoding means for decoding the upper bits of a predetermined size among the brightness information of the pixel and outputting a block selection signal for selecting any one of the storage blocks in the block distribution generating means; First control signal generating means for generating said increment enable signal and said first read control signal in response to a block selection signal output from said block decoding means during a display time; Address generating means for generating an address signal for selecting any one of the storage blocks in said block distribution generating means in response to upper bits of a predetermined size among said brightness average values; Second control signal generating means for generating the second read control signal, the first write selection signal, and the first to third write control signals in response to the address signal from the address generating means; And A plurality of controlling the operation timings of the address generating means, the first and second control signal generating means in response to a valid signal indicating the validity of the brightness value of the frame synchronization signal, the clock signal and the brightness average value generating means; Timing control means for outputting a timing control signal of a Distribution planarization device in the image signal processing apparatus comprising a. The method of claim 4, wherein the planarization means, First latch means for delaying the frame synchronization signal for a predetermined time; Second latching means for latching an output signal of said comparing means; Range depending on the brightness value required by the user and the output signal of the comparing means in response to the first and second factors, depending on whether the position of the brightness information of the corresponding pixel is in the brightness region or in the dark region than the brightness average value. Range selection means for selecting a; Scale factor generating means for generating a scale factor used when the brightness information of the pixel is changed; First multiplication means for multiplying a range output from said range selection means with a scale factor output from said scale factor generating means; Offset selection means for selectively outputting a brightness value or the first factor required by the user in response to an output signal of the comparison means to the second latch means; And First adding means for adding the multiplication result value from the first multiplication means and the output value of the offset selecting means to finally output the flattened brightness information with respect to the brightness information of the pixel; Distribution planarization device in the image signal processing apparatus comprising a. The method of claim 5, wherein the range selection means, Upper limit boundary selecting means for selecting and outputting a brightness value required by the second factor or the user as an upper limit threshold value in response to an output signal of the comparing means; Lower limit boundary selecting means for selecting and outputting a brightness value or the first factor required by the user as a lower limit threshold value in response to an output signal of the comparing means; And Subtraction means for subtracting the lower limit boundary value from the lower limit boundary selecting means from the upper limit boundary value from the upper limit boundary selecting means. Distribution planarization device in the image signal processing apparatus comprising a. The method of claim 5, wherein the scale factor generating means, In order to distinguish between a darker region and a brighter region than the brightness average value, and to output the ratio of the number of pixels existing between brightness information positions of the corresponding pixel based on the number of pixels present in each region, the scale factor. First means for calculating and outputting the number of first pixels present in the respective areas; Second means for calculating and outputting the number of second pixels existing between brightness information positions of the corresponding pixel based on the number of pixels present in each region; Division means for dividing the first pixel number of the first means by the second pixel number of the second means; And A third latch means for latching the division result of the division means in response to the clock signal and outputting the result in the scale factor; The first means, Second multiplication means for multiplying a lower bit of a predetermined size among the brightness average values by the number of pixels of a storage block including the brightness average value; Second addition means for adding a multiplication result value of the second multiplication means with the number of pixels having brightness information less than the brightness average value output from the third storage means; First subtracting means for subtracting a multiplication result value of the second multiplication means from the number of pixels of the storage block including the brightness average value; Third addition means for adding a subtraction result value of the first subtraction means and the number of pixels having brightness information that exceeds the brightness average value output from the third storage means; And First selecting means for selectively outputting addition result values of the second and third adding means in the first pixel number in response to an output signal of the comparing means, The second means, Second subtracting means for subtracting the number of pixels accumulated in blocks belonging to a brightness region darker than the brightness information of the current pixel from the number of pixels accumulated in the block to which the brightness information of the current pixel output from the first storage means belongs; Subtracting the number of pixels of the storage block or the second subtraction means including the brightness average value in response to an output signal of the comparing means enabled when the brightness average value and the higher bits of the brightness information of the pixel are equal to each other. Second selection means for selectively outputting a result value; Third subtraction means for subtracting a lower bit of a predetermined size from the lower average bit among the brightness information of the pixel; Third selecting means for selectively outputting a lower bit of brightness information of the pixel or a subtraction result value of the third subtracting means in response to an output signal of the comparing means; Fourth adding means for receiving and adding the number of pixels accumulated in blocks belonging to a brightness region darker than the brightness information of the current pixel and a result of subtraction of the first subtracting means; Fourth selecting means for selectively outputting the number of pixels accumulated in blocks belonging to a brightness region darker than the brightness information of the current pixel or an addition result value of the fourth adding means in response to the output signal of the comparing means; And Third multiplication means for multiplying the values selected and output from the second and third selection means, respectively; And Fifth adding means for adding the multiplication result value of the third multiplication means and the output value of the fourth selecting means and outputting the added result in the number of the second pixels; Distribution planarization device in the image signal processing apparatus comprising a.