KR20010105425A - A method for estimating behaviour of non-volatile memory device and an adaptive learning of neuro-device - Google Patents

Abstract

The present invention relates to a method for predicting the operation of an MFSFET device, which is a nonvolatile memory device, and a neuro-device adaptive learning circuit using the device, wherein the current flow is controlled by switching the polarization of a gate ferroelectric. In the operation prediction method of a memory device, the first process of obtaining the time differential form of the electrical displacement vector D (t) of the MFDM capacitor to form a dielectric layer by forming oxygen vacancies around the lower electrode interface of the ferroelectric thin film due to fatigue phenomenon; In the circuit in which load resistance is connected in series with ferroelectric thin film, the second process of obtaining switching characteristics according to fatigue phenomenon by measuring the switching current flowing through both ends of load resistance by obtaining the ferroelectric total voltage over time and MFDS (Metal-Ferroeletric-Dielectric) -Semiconductor) A semiconductor according to the gate voltage by calculating the total capacitance of the device and the voltage of each part. Obtaining a correlation between the surface potential (Vs), the ferroelectric layer voltage (V_F), oxygen vacancies layer voltage (V_ox) will be characterized by a third constituted by any process to quantify the fatigue properties of the non-volatile memory element.

Description

A METHOD FOR ESTIMATING BEHAVIOUR OF NON-VOLATILE MEMORY DEVICE AND AN ADAPTIVE LEARNING OF NEURO-DEVICE

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nonvolatile memory device that controls the flow of current by switching the polarization of a gate ferroelectric. In particular, the present invention relates to a method for predicting the operation of a metal-ferroeletric-semiconductor FET (MFSFET) device. The present invention relates to a neuro-device adaptive learning circuit using a device.

Recently, with the rapid development of the semiconductor industry, researches on non-volatile memory using polarization inversion and hysteresis, which are inherent characteristics of ferroelectric thin films, have been actively conducted. In particular, research on the non-volatile memory device MFSFET (Metal-Ferroeletric-Semiconductor FET) device that can store information without using an external electric field has been actively conducted, the importance of the ferroelectric thin film is increasing. The MFSFET device is a device that controls the flow of current by switching the polarization of the gate ferroelectric, and it can achieve high integration, high speed driving, high durability, radiation resistance, and low power consumption compared to conventional nonvolatile memory EEPROM or flash EEPROM. It is in the spotlight as an ideal memory. However, the MFSFET device using ferroelectrics has a fatigue phenomenon in which the polarization value decreases as the number of repeated reads / writes increases, which is a serious obstacle to the practical use of the MFSFET.

In order to apply MFSFET devices to practical memory devices, it is essential to clearly quantitatively analyze and model switching characteristics, drain current and capacitance-voltage characteristics, and how these characteristics change with fatigue. However, since ferroelectrics have unique polarization characteristics, it is difficult to express them numerically, and it is also difficult to quantitatively model the switching characteristics of ferroelectrics and the relationship between ferroelectrics and FET devices. In particular, since ferroelectrics have fatigue phenomena, it is more difficult to model MFSFET devices by setting the amount of polarization change due to polarization inversion as a variable. Therefore, in order to put the MFSFET device into practical use, an apparatus and method for predicting the operation of the MFSFET device are needed.

Meanwhile, neural networks that can implement information processing like the human brain are attracting much attention as a new future information system. Such neural networks are highly applicable to future space research projects such as satellite photography, spacecraft control systems, and flight path simulations, and high value-added future industries such as object tracking devices and image signal processing.

Synapses between neurons in a neural network have non-volatile "memory" and "learning" characteristics, which are responsible for adaptive learning that stores signals and recognizes and learns stored information. Here, "adaptive learning" is defined as a change in device characteristics after the device has processed several general signals. However, the adaptive learning characteristics of the synepse part have not been clearly solved in terms of weight control ability and control time, despite many studies on neural networks using floating-gate devices. Recently, the introduction of a new concept of neuro-devices using MFSFET devices is facing a new leap forward. This method has superior advantages over conventional floating-gate devices such as "light" operation of 10 ^ 12 or more, gradual learning characteristics, and robustness to electric field flow. However, in the case of neuro-devices using MFSFET devices, there are still many limitations in their practical application because the numerical analysis of adaptive learning in the robust operation model and design circuit of MFSFET devices has not been validated yet.

Accordingly, an object of the present invention is to provide a method for predicting the operation of the MFSFET device by modeling the MFSFET device as a prerequisite for practical use of the non-volatile memory device MFSFET device.

Another object of the present invention is to provide an adaptive learning circuit that can design a neuro-device using an MFSFET device.

1 is a structural diagram of a MFDM (Metal-Ferroeletric-Dielectric-Metal) capacitor used to model the MFSFET device according to an embodiment of the present invention.

2 is an exemplary diagram of an input pulse waveform and an RC series circuit for explaining a process for obtaining a variable in a circuit used for switching measurement as an embodiment of the present invention.

3 is a structural diagram of an MFDS capacitor according to an embodiment of the present invention.

4 is a diagram illustrating a switching current simulation result (a) and a switching current waveform (b) according to an applied voltage of a ferroelectric thin film without fatigue phenomenon.

5 is a current waveform diagram for showing a switching current model before and after fatigue.

6 is a waveform diagram showing low frequency region capacitance of an MFS capacitor before and after fatigue.

7 is a waveform diagram showing high frequency region capacitance of an MFS capacitor before and after fatigue.

8 is an exemplary diagram of voltage waveforms of the ferroelectric layer and the oxygen pore layer before (a) and after fatigue (b) in an MFSFET.

9 is a diagram illustrating a drain current model of an MFSFET device according to a gate voltage before and after fatigue.

10 is a diagram illustrating a drain current model of an MFSFET device according to drain voltage before and after fatigue.

11 is an equivalent circuit diagram of a UJT for explaining an adaptive learning circuit according to an embodiment of the present invention.

12 is an oscillation trigger circuit diagram using an MFSFET and a UJT according to an embodiment of the present invention.

13 is an emitter current waveform diagram according to the emitter voltage of UJT.

14 is an exemplary output pulse of an adaptive learning circuit according to an embodiment of the present invention.

15 is an exemplary diagram illustrating output pulse frequency relations between capacitance a and source-drain resistance of an MFSFET device in an adaptive learning circuit according to an exemplary embodiment of the present invention.

16 shows a polarization change (a) according to the number of input pulses, a ferroelectric hysteresis curve (b) of a PZT film according to a ferroelectric potential, and a surface charge of silicon according to a semiconductor potential (c) in an adaptive learning circuit according to an exemplary embodiment of the present invention. Graph showing).

17 is a graph showing a gradual learning effect of the MFSFET device by applying the input pulse of the gate terminal in the adaptive learning circuit according to an embodiment of the present invention.

18 illustrates an example of change in saturation drain current a and source-drain resistance b according to the number of input pulses.

19 is a graph showing a continuous gate voltage change example (a) and a frequency modulation characteristic (b) of an output pulse according to a short-pulse.

The present invention for achieving the above object is a method for predicting the operation of a non-volatile memory device of the method of controlling the flow of current by switching the polarization of the gate ferroelectric,

Oxygen vacancies accumulate around the lower electrode interface of the ferroelectric thin film due to the fatigue phenomenon to obtain a time differential form of the electrical displacement vector D (t) of the MFDM capacitor. ,

A second process of obtaining a switching characteristic according to fatigue phenomenon by measuring the switching current flowing through both ends of the load resistance by obtaining the ferroelectric total voltage over time in a circuit in which load resistance is connected in series with the ferroelectric thin film;

Calculate the total capacitance of each MFDS (Metal-Ferroeletric-Dielectric-Semiconductor) device and the voltage of each part to correlate the semiconductor surface potential (Vs), ferroelectric layer voltage (V_F) and oxygen pore layer voltage (V_ox) according to gate voltage And a third process of quantifying the fatigue characteristics of the nonvolatile memory device.

In addition, the present invention provides a non-volatile memory device of the method of controlling the flow of current by switching the polarization of the gate ferroelectric,

The emitter is connected to the source terminal of the nonvolatile memory device, the base terminal is connected to the drain of the nonvolatile memory device through a resistor, and the collector terminal is connected to the source terminal through a resistor. It is composed of a single junction transistor connected to is characterized in that the output frequency is adjusted according to the capacitance and the source-drain resistance of the nonvolatile memory device.

Hereinafter, an operation prediction method of an MFSFET device, a neuro-device learning circuit using the device, and a design method thereof will be described in detail with reference to the accompanying drawings.

1 is a structural diagram of a metal-ferroeletric-dielectric-metal (MFDM) capacitor used to model an MFSFET device according to an embodiment of the present invention. Hereinafter, a process for modeling an MFSFET device will be described with reference to FIG. 1. if,

The theory is that oxygen vacancies accumulate around the lower electrode interface of the ferroelectric thin film to form a dielectric layer due to fatigue phenomenon (IKYoo and SB Desu, "Fatigue Parameters of Lead Zirconate Titanete Thin Films", Mat. Res. Soc. Symp. Proc. , vol. 243, pp. 323-328, 1992; JJ Lee TM Bhattacharya and SB Desu, "Electrode Contacts on PZT Thin Films and Their influence on Fatigue Properties", Mat. Res. Soc. Symp. Proc., vol. 361, pp. 241 to 247, 1995), a MFDM (Metal-Ferroeletric-Dieletric-Metal) capacitor structure in which the oxygen-porous layer is taken into consideration is applied to the ferroelectric thin film. And to model the switching characteristics, the definition of "normal component of electrical displacement vector D is discontinuous through the boundary where surface charge exists" (JD Jackson, Classical Electrodynamics, third edition, John Wiley & Sons, New York, Chapter 1). , 1998) to derive Equations 1 and 2 below.

In Equations 1 and 2 Is the surface charge density between the ferroelectric and the oxygen pore layer, Is the relative dielectric constant of the oxygen pore layer, Is the relative dielectric constant in vacuum, Is the thickness of the ferroelectric layer, Is the thickness of the oxygen pore layer, Is the voltage of the ferroelectric layer, Is the voltage of the oxygen air layer, Is the polarization of the ferroelectric, and V (t) is the total voltage of the capacitor. together Uses the tanh function commonly used to express ferroelectric polarization (see FK Chai, JR Brews, RD Schrimpf and DP Birnie III, "Relating Local Eletric Field in a Ferroeletric Capacitor to Externally Measureable Voltages", Proceedings of the 9th Int. Symp. On Applications of Ferroeletrics, pp. 83-86, 1994; JA Gonzalo, Effective Field Approach to Phase Transitions and Some Applications to Ferroeletrics, World Scientific Lecture Notes in Physics, vol. 25, World Scientific, New Jersey, 1991). Summarizing Equations 1 and 2, the voltage of the ferroelectric layer The expression of can be derived, and the derivatives of the values can be derived by deriving the following equations (3) and (4).

In Equation 4 Is the capacitance of the oxygen pore layer, and by substituting Equation 3 into the electrical displacement vector D (t), Equation 5 can be obtained.

In order to apply the time differential form of the electrical displacement vector D (t) expressed in Equation 5 to the switching characteristic, a variable must be obtained in a circuit used for switching measurement.

FIG. 2 illustrates an input pulse waveform and an RC series circuit for explaining a process for obtaining a variable in a circuit used for switching measurement as an embodiment of the present invention.

Looking at the operation of the RC series circuit, the input pulse is initialized by two set-up pulses, and the switching characteristic can be analyzed as the current flowing across the load resistor R connected in series with the ferroelectric thin film. And the output voltage shown in FIG. Can be obtained as in Equation 6 below.

In Equation 6 Is input voltage, A is the cross-sectional area of electrode, and R is load resistance If Equation 5 is substituted by Equation 6, it can be expressed as an expression relating to the time differential form of the entire ferroelectric voltage V (t), and when the equation is expressed using a numerical analysis method, the entire ferroelectric with time The voltage V (t) can be obtained. And using the value to find the current passing through the load resistance is as shown in Equation 7.

In Equation 7 The internal resistance of the ferroelectric is taken into account the leakage current terms. And input voltage Is expressed by Equation 8 in consideration of the rising time, which is the time taken to reach the maximum input voltage.

In Equation 8 Is the maximum input voltage, Represents the rising time. Similarly, maximum input voltage Falling time, which is the time it takes to become 0 [V], is expressed using Equation 9 below.

In Equation 9 Is the polling time Is the holding time. By substituting all the variables considered above into Equation 7 and representing it numerically, the switching current can be effectively expressed.

The characteristics of the MFSFET device, which is evaluated as the next-generation memory, among the devices using ferroelectric thin films based on the switching characteristics of fatigue phenomena, are analyzed as follows.

First, FIG. 3 illustrates a structure diagram of an MFDS capacitor according to an embodiment of the present invention. When the total capacitance is obtained from FIG. 3, the following equations are obtained.

In Equations 10 to 13 Is , Is the surface potential of the semiconductor, Is Surface charge per area Is the Debye length, , Are the hole and electron balance densities of the p-type substrate, k is Boltzmann constant, T is absolute temperature, Is the p-type concentration of the substrate, Is the relative dielectric constant of silicon, q is the charge amount, Is the capacitance of silicon semiconductors, Is the capacitance of the oxygen air layer, Shows the total capacitance of the MFSFET device. Accordingly, by numerically arranging Equation 13, the capacitance of the MFSFET device can be obtained.

Next, Equations 14 and 15 may be derived from FIG. 3 to obtain voltages of respective parts of the MFSFET device.

In Equation 14 The gate voltage, Represents the work function between the metal and the bulk silicon semiconductor. Meanwhile, the equations 1, 2, 10, 11, 12, 14, and 15 In accordance , , The correlation between In order to analyze the characteristics of the MFSFET device with fatigue phenomena using the voltage of each part, we examine the drain current over the threshold voltage, that is, during the strong inversion period. The drain current at this time is the saturation drain voltage It is divided into a linear region formed below and a saturation region appearing above the saturation drain voltage. The drain current of the n-type FET is represented by Equation 16 below.

Looking at the parameter of Equation 16 is as follows.

In Equation 16, 17, 18, Z is the width of the channel, L is the length of the channel, Silver electron mobility, Is the potential between the source and the drain, Is the charge density of the silicon bulk, Is the Fermi level of p-type silicon, V (y) represents the reverse bias corresponding between the source electrode and any point y. Therefore, when the drain current is obtained by substituting Equations 1, 2, 10, 11, 12, 14, 15, 17, and 18 into Equation 16, the following equation 19 is used. Can be expressed by Equation 20.

Threshold Voltage in Equation 20 Is As a gate voltage at the time, it can be obtained by the following equation (21) using the above equation (14).

In Equation 19, Equation 19 represents the drain current of the linear region, and the drain current of the saturated region is represented by Equation 19: instead Can be obtained by substituting By using Equation 19 as described above, it is possible to effectively represent the drain current at any drain voltage or gate voltage.

4 is a switching current model when the parameters shown in Table 1 below are applied to Equation 7, illustrating a switching current simulation result (a) of a ferroelectric thin film without fatigue phenomenon and a switching current waveform (b) according to an applied voltage. It is. Wherein the full switching current of the equation (5) When the value is in a forward sweep polarization state with a negative polarization value at the input voltage 0 [V], it is a current generated by the polarization inversion induced by the positive input voltage and is non-switching. (non-switching) current is reversed The value is the current when the polarization inversion phenomenon is not induced in the backward sweep polarization state having a positive polarization value at the input voltage 0 [V]. And net switching current is the difference between full switching current and non-switching current.

Element Value 2000Å 1.0 V 50 20ns Element R A Value 20ns 3 V 50 16 ×

Referring to the model of FIG. 4A, the difference between the full switching current and the non-switching current is evident, and is similar to the switching curve of a general ferroelectric thin film. 4 (b) is a case in which the rising time and the falling time of Equations 11 and 12 are taken into consideration, and is a switching current model according to two positive input voltage changes. As shown in FIG. 3, the switching current was modeled by changing the input voltage of the ferroelectric thin film already initialized in the forward sweep polarization direction in the first set-up process. Here, the first input voltage (time: 0 to 1.0μs) induces polarization inversion to generate a full switching current in the ferroelectric thin film, and the resulting polarization inversion causes the ferroelectric thin film to change in the backward sweep polarization direction. (2.0 -3.0 ) Does not induce polarization reversal and generates a non-switching current.

Figure 5 shows the current waveform diagram to show the switching current model before and after the fatigue phenomenon, more specifically in the absence of fatigue phenomenon and fatigue progression when the thickness of the oxygen vacancy layer is 10, 50, 100 Å Shows a switching current model of. Referring to FIG. 5, the switching current is drastically reduced as the thickness of the oxygen vacancy layer increases, in particular, the full switching current is more severe than the non-switching current. In order to analyze the change of each switching current according to the thickness of the oxygen vacancy layer more accurately, the closed area of each curve is numerically calculated using the fact that the closed area of the switching curve is the same as the switched charge amount. It is shown in Table 2 below.

Switching state Switch charge (nC) Before Fatigue After Fatigue Oxygen Vacancy Thickness 10 Å 50 Å 100 Å Full Switching 1.04 0.62 0.30 0.20 Non Switching 0.28 0.20 0.15 0.12 Net switching 0.76 0.42 0.15 0.08

As shown in Table 2, as the fatigue phenomenon progresses, both the fully switched charge and the non-switched charge decrease. However, since the non-switched charges have a smaller reduction ratio than the full-switched charges and are small in value, the relative switch charges, which is the difference between full-switched and non-switched charges, dominate the amount of full-switched charges. Decreases with receiving Looking at the relative switch charge in terms of the change in polarization can be obtained as shown in equation (22).

In Equation 22 Is the relative switch charge, and if the fatigue phenomenon and the oxygen vacancy layer increases to 10, 50, 100 50 by applying Equation 22, the residual polarization value is 24, 13, 5, 2.5, respectively. to be. Since the residual polarization and the relative switch charge are determined according to the polarization inversion, the above results can be inferred that the oxygen pore layer appears to interfere with the normal polarization inversion of the ferroelectric thin film.

Based on the above analysis, the accumulation of oxygen vacancy layers due to fatigue phenomenon not only directly affects the operation of nonvolatile memory using ferroelectric thin films but also prevents the polarization inversion of ferroelectric thin films. It is believed that many problems will be exposed to their operation.

Next, looking at the characteristics of the MFSFET device in terms of capacitance and drain current, the total capacitance of the MFSFET was first investigated using Equation 13, and the model is introduced in FIG. Equation 13 has a different capacitance according to the forward sweep and backward sweep polarization directions in a low frequency region. Referring to FIG. 6, it can be seen that the forward sweep polarization direction is moved about 2 [V] to the right with respect to the gate voltage compared to the backward sweep polarization direction. In addition, deep hole-shaped curves generated by reducing the total capacitance of the MFSFET exist along each polarization direction, which is a part of the silicon semiconductor corresponding to the depletion region. If there is no fatigue phenomenon, the capacitance of the accumulation region and the inversion region increases in each polarization direction, which is the capacitance of the ferroelectric layer among the capacitances of the respective parts of the MFSFET. Is a phenomenon due to the large value at this gate voltage. On the other hand, in the case where 50 Å of oxygen vacancies are formed due to fatigue phenomena, the capacitance of the accumulation and inversion regions is 3x maximum. 7 × Reduced to less. Here, in particular, the reduction of the capacitance of the inverted region means that the channel formation is reduced, and thus it is understood that the MFSFET device having the oxygen pore layer of 50 kV will have many problems in channel and drain current formation.

Unlike the low frequency region, the high frequency region of the MFSFET undergoes deformation of the capacitance curve. In equation (13) , , Are all affected by frequency, in the embodiment of the present invention, Wow Has an effect on the frequency of Very little compared to Consider only. In general, the surface charge of the semiconductor in the high frequency region in the inversion region Surface potential Since the amount of increase is weak, the equation (13) from the depletion region to the inversion region The term has been modified to remain constant.

7 is expressed in equation (13). This is a capacitance model modified for the high frequency region. In FIG. 7, the memory window has a characteristic similar to that of the low frequency region, except that the memory window has a possibility of being utilized as a memory device at about 2 [V], and the capacitance of the section which becomes the inversion region in the depletion region is fixed.

8 summarizes Equations 1, 2, 10, 11, 12, 14 and Equation 15 In accordance Wow Is a diagram showing the correlation between. FIG. 8A is a ferroelectric layer voltage distribution of an MFSFET device without an oxygen pore layer, and FIG. 8B is a voltage distribution when an oxygen pore layer of 50 kV is included. In FIG. 8A, the ferroelectric layer voltage is linear with the increase of the gate voltage except for a gate voltage of about -1.5 to 0 [V] in the backward sweep polarization direction and about 0.5 to 2.0 [V] in the forward sweep polarization direction. In turn, this indicates that the gate voltage is accurately transferred to the ferroelectric layer. In FIG. 8A, the reason why the ferroelectric layer voltage remains constant despite the increase in the gate voltage is because of the surface potential of the semiconductor. This is because is an increasing area. Unlike (a) of FIG. 8, in FIG. 8 (b), another aspect of voltage distribution occurs. The ferroelectric layer is formed by occupying a substantial portion of the voltage to be provided to the ferroelectric layer in the oxygen pore layer formed as the fatigue phenomenon progresses. The increase in voltage slows down.

9 is Is 0.1, 0.2, 0.3 and 0.4 [V], respectively, above the threshold voltage indicated by the numerical method Drain current model according to. here, Is 2, silver , 1.0 × , Is 11.8 and the parameters of the ferroelectric are the same as the switching model. And expressed in Equation 21 ( ) Is extremely small, so the threshold voltage The values before and after the fatigue phenomenon are almost the same, and when the numerical value is calculated numerically, the threshold voltages are 1.66 [V] and -0.34 [V] in the forward sweep and backward sweep polarization directions, respectively. In the drain current shown in FIG. 9, the threshold voltage is almost equal to the threshold voltage calculated numerically along each polarization direction, and the drain current becomes larger as the drain voltage is set larger. Have In the absence of fatigue, the drain current has a memory window of about 2 [V], as shown in the capacitance models shown in Figures 10 and 11, which is exactly the same as 2 [V], the difference in constant voltage along the polarization direction. .

In the absence of fatigue, there is a clear saturation region and memory window, and it is a general indication of increasing region and saturation region. - It has a curved shape. On the other hand, in the case where the oxygen vacancy layer is accumulated at 50 mA, the drain current increases with the gate voltage, but the distortion of the current is severe and the saturation region hardly appears. This phenomenon also occurs because the channel is not formed by the voltage interruption or occupancy of the oxygen pore layer, which shows that the fatigue phenomenon is a serious problem for the MFSFET to function as a memory.

The MFSFET device is an application of the fact that the drain current difference occurs according to the polarization direction of the ferroelectric thin film. The MFSFET device has a method of setting up and down polarization directions as information '1' or '0', respectively. Therefore, when characterizing the drain current of an MFSFET, the gate voltage Should be set to 0 [V] so that polarization inversion, i.e., destruction of information, does not occur.

10 is Is a drain current model of the linear region and the saturated region in which Equation 19 is expressed by the numerical method when 0 [V]. In FIG. 10, the drain current is a gate voltage of 0 [V]. Threshold voltage It occurs in the larger backward sweep polarization direction and no drain current occurs in the forward sweep polarization direction. And saturation drain voltage Are -1.66 [V] and 0.34 [V] in the forward sweep and backward sweep polarization directions, respectively, which means only the backward sweep polarization direction. In FIG. 10, when there is no fatigue phenomenon, the difference between the saturation drain current according to the polarization direction and the threshold voltage is about 6 mA / cm 2, thereby distinguishing between information '0' and '1'. However, when the oxygen pore layer having a thickness of 50 mA was formed, the saturation region drain current in the backward sweep polarization direction was reduced by about 50. This fact implies that the oxygen pore layer formed by the fatigue phenomenon inhibits the information storage of the MFSFET device.

As described above, in the embodiment of the present invention, the switching characteristics and the MFSFET device characteristics of the ferroelectric thin film due to the fatigue phenomenon are effectively represented by introducing the accumulation theory of oxygen vacancies. The switching current of the ferroelectric thin film decreased drastically depending on the oxygen pore layer generated by the fatigue phenomenon. Relative switch charges were 0.42, 0.15 and 0.08 nC with increasing to 50 and 100 mA. From this fact, it was confirmed that the oxygen pore layer is a factor that inhibits the polarization inversion, and pointed out that the oxygen pore layer has a problem in the application of the ferroelectric element to which the polarization inversion is applied. Simulation results of the MFSFET device show that the accumulation, depletion, and inversion regions are clearly expressed in the capacitance characteristics of high frequency and low frequency, and the memory window is 2 [V] according to the constant voltage difference. In particular, the high frequency band is from depletion to inversion. The term is effectively modified by keeping the form constant. And drain current characteristics - The curve clearly shows the increase and saturation areas, - The curve shows a clear saturation drain current difference of 6mA / cm2 along the polarization direction, proving that the MFSFET device is promising as a memory. However, when the oxygen pore layer having a thickness of 50Å is formed due to the fatigue phenomenon, the capacitance of the inverted region is 3x maximum. 7 × It was found that the channel formation of the MFSFET is reduced in direct relation with the oxygen vacancies by reducing it below. - The drain current in the curve showed severe distortion, - The saturation drain current of the curve decreased by more than 50 in the backward sweep polarization direction. This shows that the fatigue phenomenon is an important factor to be considered and an urgent problem to be overcome in order to apply the MFSFET device to the actual memory device.

This simulation can be used to quantify the fatigue characteristics of ferroelectrics and to be useful for verifying the characteristics before fabricating MFSFET devices.

Hereinafter, a process of designing an adaptive learning circuit based on the modeling of the MFSFET device described above and analyzing the numerical results will be described.

In an embodiment of the present invention, an oscillation trigger circuit using an MFSFET device and a Uni-Junction Transistor (UJT) device is designed to implement an adaptive learning circuit, and a short pulse is applied to a gate of the MFSFET device. Changes in source-drain resistance are utilized for output frequency modulation. The adaptive learning circuit adopts the characteristic that the polarization inversion gradually occurs when a short pulse is applied to the ferroelectric gate of the MFSFET device. The adaptive learning circuit derives the source-drain resistance by identifying the channel formation process of the MFSFET device due to the polarization inversion. The process is necessary. The process is expressed by combining the drain current equation of the MFSFET device obtained from the square-law FET model and the switching polarization inversion relationship demonstrated by J. F. Scott et al. Finally, the output pulse is obtained by applying the source-drain resistance of the MFSFET device to the oscillation trigger circuit, and it is confirmed that the frequency modulation occurs according to the change of the source-drain resistance. Prove that it can be shown.

Hereinafter, the adaptive learning circuit implemented using the MFSFET and the UJT device will be described in detail. First, FIG. 11 illustrates an equivalent circuit diagram of the UJT for explaining the adaptive learning circuit according to an embodiment of the present invention. For example, an equivalent circuit of a three-terminal UJT device consisting of one emitter and two bases is shown.

Referring to FIG. 11, the equivalent circuit of the UJT element is composed of OR operators OR1, OR2, voltage control switch SWn, resistor Rn, and DC voltage source V_F. In the operation of the UJT device, the emitter voltage controls the switches SWc and SWd, and the switch SWd has the emitter voltage being the valley voltage ( Is operated when it is greater than) and SWc is the peak voltage of UJT ( Is greater than). The switch SWa is operated in accordance with the operation of SWc, and the switch SWb is operated in accordance with the operations of the OR operators OR1 and SWd. In addition, when the OR operator OR2 is operated, the switch SW1 is operated so that a lot of current flows from the emitter to the base 1, while when the SW1 is not operated, a small current flows through the high resistance R_E. The equivalent circuit thus completed has the same characteristics as a general UJT device.

12 illustrates an oscillation trigger circuit diagram using an MFSFET and a UJT according to an embodiment of the present invention. In such a circuit, the emitter voltage of the UJT is increased to the peak voltage by the capacitance C charged by the DC bias Vcc. When the emitter voltage is at the peak voltage, a large amount of emitter current flows to the base 1 terminal, where the charge of the capacitance (C) is rapidly discharged, the emitter voltage drops below the valley voltage, and a small amount of emitter Current flows to the Base 1 terminal. This process is repeated periodically by the time constant of capacitance C, whereby the output voltage exhibits a pulse waveform having a constant frequency. In addition, in FIG. 12, the output pulse also changes due to the source-drain resistance of the MFSFET device. Since the DC bias Vcc is charged to the capacitance C after the voltage drop is caused by the source-drain resistance of the MFSFET device, the charging speed of the capacitance C and the frequency of the output pulse change according to the source-drain resistance. Therefore, the output frequency can be adjusted in the adaptive learning circuit of FIG. 12 according to the capacitance and the source-drain resistance of the MFSFET device.

Next, Equation 23 was derived from the square-low FET model to investigate the characteristics of the MFSFET device.

In Equation 23, Z is the width of the channel, L is the length of the channel, Silver electron mobility, Is the potential between the source and the drain, Ferroelectric polarization, Is the thickness of the ferroelectric layer, Is the oxide layer voltage between the ferroelectric and the semiconductor, Is the work function between the ferroelectric and the semiconductor, Is the dielectric constant of silicon, Is the acceptor concentration of p-type silicon, Denotes the Fermi level of p-type silicon, respectively. Equation 23 represents an n-type drain current in the linear region, and the drain current formula in the saturated region is Saturation drain voltage Can be obtained by substituting In this way, the drain current can be effectively represented at any drain voltage or gate voltage. Saturated Drain Voltage And threshold voltage May be represented by the following Equations 24 and 25, respectively.

In the embodiment of the present invention, it is assumed that there is no oxide layer between the ferroelectric and the semiconductor. The value of was fixed at 0 [V].

FIG. 13 shows the emitter current according to the emitter voltage calculated by simulating the UJT equivalent circuit shown in FIG. 11. In the equivalent circuit of the UJT element of FIG. 11, when the emitter voltage increases from 0 [V], since no voltage is initially induced to the switch SW1 of FIG. 11, the emitter current has a high resistance ( To the collector terminal. When the emitter voltage continues to increase and reaches a valley voltage of 1.4 V, the switch SWd is operated. However, since the switches SWa, SWb, and SWc are not operated, no voltage is induced to the switch SW1. However, when the emitter voltage reaches the peak voltage of 2.25 [V], the switch SWc is operated, and in turn, the switches SWa, SWb, and SW1 are also operated. After the voltage decrease occurs, much current flows rapidly through the switch SWa. After that, when the emitter voltage is above the peak voltage, ), The emitter current increases linearly. On the other hand, when the emitter voltage is gradually decreased after the emitter voltage is applied above the peak voltage, the characteristics are very different. When the emitter voltage decreases below the peak voltage, the switches SWc and SWa do not operate but the logic operator OR2 still operates to induce the voltage to SW1. When the emitter voltage becomes the valley voltage, the switches SWd and SWb do not operate as a ratio, and thus the switch SW1 does not operate, so that a small emitter current flows through the high resistance R_E. The physical cause of this phenomenon can be explained by conductivity modulation at the junction between the emitter and the base.

FIG. 13 shows an emitter current waveform diagram according to the emitter voltage of the UJT. More specifically, 10 [V] is applied to the base 2 terminal. = 10㏁, = 0.65 V, = 1㏀, = 500mA, it shows the emitter current according to the emitter voltage shown by this operation, and shows the same characteristics as the actual UJT device.

FIG. 14 is a diagram illustrating an output pulse of an adaptive learning circuit according to an exemplary embodiment of the present invention. More specifically, in the adaptive learning circuit of FIG. 12, the source-drain resistance of the MFSFET device is 1 MΩ, the capacitance is 1 pF, resistance and Shows the output pulse characteristics over time when is set to 5kΩ. As shown in Fig. 14, the output frequency is about 1 MHz and the magnitude of the output pulse is about 1.25 [V]. From this, it can be seen that the UJT equivalent circuit of FIG. 11 operates stably even at high frequencies as well as at low frequencies, and output pulses have a constant frequency according to the capacitance time constant. Therefore, when applied to the PFM system, it is possible to confirm the adaptive learning characteristics by analyzing the output pulse shape.

FIG. 15 shows a characteristic in which the output pulse frequency of FIG. 14 varies with the source-drain resistance and capacitance of the MFSFET device. FIG. 15 illustrates the relationship between the output pulse frequency according to the capacitance a and the source-drain resistance of the MFSFET device in the adaptive learning circuit according to the embodiment of the present invention. Referring to FIG. 15, the output pulse frequency exhibited a property inversely proportional to the source-drain resistance and the capacitance. This is consistent with Equations 26 and 27 relating to the frequency of the oscillation trigger circuit.

In Equations 26 and 27, f represents the output pulse frequency of the adaptive learning circuit. In the equivalent circuit of FIG. 12, the larger the value of the capacitance, the longer the charging time caused by the DC bias Vcc, and the capacitance C and the frequency are inversely proportional. In addition, since the applied voltage of the DC bias Vcc is distributed by the source-drain resistance and the capacitance of the MFSFET device, the larger the source-drain resistance, the longer the charging time of the capacitance, and the frequency of the source-drain resistance and the output pulse are also inversely proportional. From these results, it can be seen that the capacitance-output pulse frequency characteristics can be used to set the frequency modulation band according to the purpose of use, and the PFM system can be realized by using the source-drain resistors obtained according to the channel formation of the MFSFET device. have.

16 shows a polarization change (a) according to the number of input pulses, a ferroelectric hysteresis curve (b) and a semiconductor potential of a PZT film according to a ferroelectric potential while applying a short pulse to an MFSFET device in an adaptive learning circuit according to an embodiment of the present invention. The surface charge (c) characteristics of the silicon according to the model is shown respectively. FIG. 16A is derived from Equation 28 below.

In Equation 28 Is spontaneous polarization, n is dimensionality factor, Represents the switching time. 16 (a) shows the degree of polarization reversal as the dimensionality factor is changed from 1 to 3, and the pulse interval is shortened by 5/100 times the switching time. In this case, when n is 1, the polarization reversal is observed up to 100 pulses, and when n becomes 2 and 3, respectively, the polarization reversal no longer occurs at about 45 and 35 pulse numbers. From this, it can be seen that the closer the dimensionality factor is to 1, the more various the frequency modulation characteristics can be achieved. 16 (b) and 16 (c) show ferroelectric polarization and surface charge of a semiconductor to obtain source-drain resistance of an MFSFET device by applying a short pulse to a gate. When a voltage is applied to the MFS capacitor, the ferroelectric exhibits a hysteresis curve as shown in FIG. 16 (b) not only on the metal lower electrode but also on the silicon layer, and the polarization is changed. The polarization causes the same silicon having the opposite polarity to the ferroelectric polarization value. Surface charges are formed. Therefore, if the polarization change of FIG. 16A is applied to FIGS. 16B and 16C, ferroelectric polarization and silicon surface charge according to the number of pulses can be obtained. From this value, the gate voltage can be known, and substituted into Equation 23, to obtain the drain current and the source-drain resistance of the MFSFET device according to the number of pulses.

17 is a graph showing a gradual learning effect of the MFSFET device by applying the input pulse of the gate terminal in the adaptive learning circuit according to the embodiment of the present invention. (A), (b), and (c) of FIG. 17 show the drain current characteristics according to the application of the short pulse when the dimensionality factors are 1, 2 and 3, respectively, obtained from the parameters of the ferroelectric thin film shown in Table 3 below. will be.

Element Å (V) Value 30 24 2000 1.0 Element Z / L Value 11.8 5 1500

The polarization of the ferroelectric was initially set to the case of having a negative value so that the polarization gradually showed a positive value according to the short pulse. In this case, the drain current due to the charge drift phenomenon is not generated initially, but the drain current due to the drift phenomenon flows only when the polarization shows a "+" value according to the short pulse. Therefore, the variation of the source-drain resistance of the MFSFET device can be represented variously, and the output frequency of the adaptive learning circuit can be effectively modulated. In FIG. 17, the increase in the saturation drain current decreases as the number of pulses increases, and when the dimensionality factor is 1,2,3, the drain current is 100, 45, and 35, respectively, as in the polarization inversion curve of FIG. The increase did not happen anymore. In particular, when the dimensionality factor is 3, the increase in the saturation drain current appears only in the number of pulses 20 to 35, it can be seen that it is not easy to control the source-drain resistance of the MFSFET device according to the pulse number. This shows that the MFSFET device with the dimensionality factor close to 1 is suitable for the adaptive learning circuit.

FIG. 18 shows an example of saturation drain current (a) and source-drain resistance (b) change according to the number of input pulses, and FIG. 19 shows an example of continuous gate voltage change (a) and short-pulse (short-). This graph shows the frequency modulation characteristic (b) of the output pulse according to the pulse). First, FIG. 18 (a) is a saturation drain current curve according to the number of pulses and has a form very similar to that of FIG. 16 (a). This shows that ferroelectric polarization acts as a key factor in controlling the drain current of the MFSFET device. it means. However, in the saturation drain current characteristic curve of FIG. 18 (a), the difference according to the dimensionality factor appears larger than the polarization inversion characteristic curve of FIG. 16 (a), which means that the polarization is reversed when the number of pulses is 20 or more. This is because it has a "+" value. When the ferroelectric is "+" polarization, the channel can be formed in the MFSFET device, so the drain current is sensitive to the polarization change of the ferroelectric. On the other hand, when the number of pulses is 20 or less, the saturation drain current characteristic curve is much smaller than the polarization inversion characteristic curve. This shows that the polarization increase characteristic after the polarization inversion occurs and shows the "+" polarization value is important for the adaptive learning circuit. In addition, when the number of pulses is 0 to 18, the saturation drain current due to the drift of the charge was not generated, and the difference in the saturation drain current increase when the dimensionality factor was 1 and 2,3 was severe. From the curve of FIG. 18A, a source-drain resistance according to an arbitrary drain voltage may be obtained, which is illustrated in FIG. 18B. The drain voltage is 10 [V], and the cross-sectional area of the source-drain terminal is Set to. When the source-drain resistance according to the number of pulses is applied to the adaptive learning circuit of FIG. 12, the output pulse and the frequency according to the number of pulses applied to the gate of the MFSFET device can be known.

FIG. 19 (a) shows the change of output frequency when the continuous voltage is increased and decreased, not the pulse voltage at the gate. FIG. 19 (b) shows the source-drain resistance of the adaptive learning circuit of FIG. It shows the change of output frequency according to the applied pulse number. 19 (a) shows an output pulse frequency similar to that of FIG. 19 (b), and changes, about 2V, which indicates the effect of constant voltage along the direction of polarization. 19 (a), the maximum output frequency per capacitance is almost identical to the maximum output frequency per capacitance in FIG. 19 (b). 19 (b) shows the change of the output frequency according to the change of capacitance in the dimensionality factor and the adaptive learning circuit. In particular, the range of the output frequency changes according to the capacitance. This means that the frequency band can be adjusted according to the purpose when the adaptive learning circuit is applied to the PFM system, and indicates that the adaptive learning circuit according to the embodiment of the present invention has a wide frequency adjusting capability. .

As described above, in the embodiment of the present invention, the adaptive learning circuit is designed based on the modeling of the MFSFET device, and the numerical results are analyzed. An oscillation trigger circuit using MFSFET and UJT devices is implemented to design the adaptive learning circuit, and the variation of the source-drain resistance caused by applying a short pulse to the gate of the MFSFET device is used to modulate the output frequency of the oscillation trigger circuit. It was. The characteristics of the MFSFET device are expressed by combining the drain current equation of the MFSFET device obtained from the square-low FET model and the switching polarization inversion relationship demonstrated by J.F SCOTT.

Analyze the emitter current characteristics according to the emitter voltage of the UJT equivalent circuit from the conductivity modulation phenomenon at the junction between the emitter and the base.The output pulse characteristics over time when the source-drain resistance of the MFSFET device is 1 MΩ and the capacitance is 1 pF are analyzed. Analyzed. The output frequency at that time was about 1 MHz, and the magnitude of the output pulse was about 1.25 [V]. From this, it can be seen that the UJT equivalent circuit operates stably at high frequencies as well as at low frequencies, and the output pulse proceeds with a constant frequency depending on the capacitance time constant. In this circuit, the output frequency was shown to be inversely proportional to the source-drain resistance and capacitance of the MFSFET device. It is possible to set the frequency modulation band according to the purpose of use by utilizing the capacitance-output pulse frequency characteristic. The use of source-drain resistance due to channel formation indicates that a PFM system can be implemented. Next, the polarization inversion characteristics were investigated to check the frequency modulation characteristics of the adaptive learning circuit while applying a short pulse to the MFSFET device. As the dimensionality factor is close to 1 in the polarization inversion of the ferroelectric, the frequency modulation characteristics vary. It was found that this could be done for a long time, and based on the hysteresis curve and the surface charge characteristics of silicon, the drain current and source-drain resistance of the MFSFET device according to the number of pulses could be obtained. It can be seen that the saturation drain current curve according to the number of pulses is similar to the polarization reversal characteristics of the ferroelectric, which means that the ferroelectric polarization plays a key role in controlling the drain current of the MFSFET device. From the source-drain resistance of the MFSFET device, we analyzed the output frequency change according to the dimensionality factor and the number of pulses of the adaptive learning circuit, and it was found that the output frequency range changes according to the capacitance. This means that when the PFM system is applied to the adaptive learning circuit, the frequency band can be adjusted according to its purpose. This indicates that the adaptive learning circuit utilized in this study has a wide frequency control capability. .

From this, we could clearly see the frequency modulation characteristics of the adaptive learning circuit, that is, the adaptive learning characteristic that means the gradual change of the output pulse as the input pulse progresses. It proved that it can be used effectively.

As described above, the present invention can perform simulation on all ferroelectric thin films, so that any arbitrary ferroelectric can be used as a memory device before fabricating an MFSFET device. By quantitatively analyzing the characteristic change of the MFSFET device due to the fatigue phenomenon, it is possible to grasp the reliability of the MFSFET device using an arbitrary ferroelectric thin film.

In addition, since the frequency of the output voltage pulse can be changed according to the source-drain resistance of the MFSFET device, the present invention can not only adjust the output voltage magnitude through the change of the source-drain resistance, but also simulate the human neural tissue. There is an advantage to use.

Claims (4)

In the operation prediction method of a nonvolatile memory device of the method of controlling the flow of current by switching the polarization of the gate ferroelectric, Oxygen vacancies accumulate around the lower electrode interface of the ferroelectric thin film due to the fatigue phenomenon to obtain a time differential form of the electrical displacement vector D (t) of the MFDM capacitor. , A second process of obtaining a switching characteristic according to fatigue phenomenon by measuring the switching current flowing through both ends of the load resistance by obtaining the ferroelectric total voltage over time in a circuit in which load resistance is connected in series with the ferroelectric thin film; Calculate the total capacitance of the MFDS (Metal-Ferroeletric-Dielectric-Semiconductor) device and the voltage of each part to calculate semiconductor surface potential (Vs) and ferroelectric layer voltage ( ), Oxygen air bed voltage ( And a third process of quantifying the fatigue characteristics of the nonvolatile memory device by acquiring the correlation. Non-volatile memory device of the method of controlling the flow of current by switching the polarization of the gate ferroelectric, The emitter is connected to the source terminal of the nonvolatile memory device, the base terminal is connected to the drain of the nonvolatile memory device through a resistor, and the collector terminal is connected to the source terminal through a resistor. An adaptive learning circuit comprising: a single junction transistor connected to the source circuit; the output frequency is adjusted according to capacitance and source-drain resistance of the nonvolatile memory device. The adaptive learning circuit of claim 2, wherein the nonvolatile memory device is an MFSFET device. 4. The adaptive learning circuit of claim 3, wherein a change in source-drain resistance, which occurs when a short pulse is applied to a gate of the MFSFET device, is used for output frequency modulation of the adaptive learning circuit.