KR20010104320A - Vertically integrated semiconductor system - Google Patents

Abstract

The present invention relates to a semiconductor device comprising at least one semiconductor chip having a first and a second base surface. The first and second base surfaces are provided with active structures that are connected to each other by means of connection portions penetrated by the semiconductor chip. One of the base surfaces of the at least one semiconductor chip is disposed above the first base surface of the support.

Description

Vertical Integrated Semiconductor Device {VERTICALLY INTEGRATED SEMICONDUCTOR SYSTEM}

In the category of new technology, it is of interest to thinly polish a semiconductor chip, for example, so that a stack of a plurality of semiconductor chips can be installed in turn. For this purpose, the semiconductor chip is thinly polished to enable a through connection for connecting two or more layers. In order to use the back side of the semiconductor chip for the circuit structure, in addition to the method of using a semiconductor chip-stack having a lower overall height, a through connection method of the thinly polished semiconductor chip as described above may also be introduced. This is of particular interest in the area of safety cards and chip cards in ICs, since active protection against physical corrosion can be implemented in this way (eg back safety shields).

To this end, today's semiconductor chips are polished to a thickness of 15-20 μm. As a result, further processing of the produced semiconductor chip becomes relatively difficult. On the one hand it is possible to "roll" a semiconductor chip, but on the other hand it is very difficult to install on a conventional support. Wiring can also be formed between the layers of the stack, which in the worst case can lead to a decrease in the temperature carrying capacity of the device.

In the case of high power computers, the stack described above is already used, but the cost of installing and processing the chip is very high. In order to avoid the above mentioned problems during processing, ie during manufacturing, a temporary support is used which is connected to the semiconductor chip only during installation and which is removed after the semiconductor chip stack is mounted. In addition to the high cost, the complex manufacturing process by many method steps is not suitable for low cost applications.

The present invention relates to a semiconductor device comprising at least one semiconductor chip having a first and a second base surface.

1 shows a first embodiment of a semiconductor device according to the invention with a semiconductor chip on one base surface of the support.

2 shows a second embodiment of a semiconductor device according to the invention with semiconductor chips on two basic surfaces of the support.

3 shows a third embodiment of the semiconductor device according to the invention, which has a special form of a through connection of a support.

It is an object of the present invention to provide a semiconductor device having a thinly polished semiconductor chip which can be manufactured at low cost.

This object is achieved by the features of claim 1. Claim 1 proposes a semiconductor device with at least one semiconductor chip having a first and a second base surface. In this case, the semiconductor chip has active structures on the first and second base surfaces, and the active structures are connected to each other by connecting portions passing through the semiconductor chip, and one of the base surfaces of the at least one semiconductor chip is connected to the support. It is disposed on the first base surface.

It is proposed to continuously mount thinly polished semiconductor chips onto an inexpensive support. The advantages of the through connection of the active structure and the thin thickness of the semiconductor chip material thereby required are combined with high mechanical stability. Unlike the prior art, since the support remains in the semiconductor device, high convenience of manufacturing is ensured. At this time, there is a possibility to arrange a plurality of chips on the first base surface of the support. In one embodiment of the present invention, at least one additional semiconductor chip having an active structure on its first and second base surfaces is provided on a second base surface opposite the first base surface of the support, wherein the additional semiconductor chip One base surface of the substrate faces the support, and the additional semiconductor chip lies opposite the semiconductor chip above the first base surface of the support. In this case, the semiconductor chip device is provided in the form of a "sandwich" structure on both sides of the support. This makes it possible to implement a semiconductor device with less required space.

In another embodiment of the present invention, the support of the first and / or second base surface comprises contact terminals connected to the contacts of the semiconductor chip of the active structure. The support can be used to accommodate simple passive connection structures, thereby reducing the complexity of the active structure on the one hand and ensuring high safety for separation of the active structure and the support on the other hand. have. Thus, the contacts of one semiconductor chip can be connected in the support via the passive connection structure, or the contacts of different semiconductor chips can be connected in the support through the passive connection structure. The connecting structures may be provided in one or a plurality of planes in the support.

Wherein the contact terminals on the first base surface of the support are connected to each other and / or the contact terminals on the second base surface of the support are connected to each other and / or contacts on the first and second base surfaces of the support. The terminals are connected to each other via through connections. Electrical connection between two semiconductor chips positioned on opposingly disposed base surfaces of the support may be implemented through through connections in the support. For safety related applications, it is desirable for the semiconductor device to only operate when at least two semiconductor chips are electrically connected to each other. The interconnected contacts of the semiconductor chips are then preferably located on the surfaces facing the support, respectively, of the semiconductor chips. If the contact between one of the semiconductor chips and the support is separated, the circuit implemented on the semiconductor chip will no longer be able to operate. Thus, it can be a hindrance to checking the charge potential formed on the line.

In a preferred embodiment, the support is arranged with through connections and non-conductive areas extending at regular intervals from the first base surface to the second base surface. If an appropriate minimum spacing of the contacts of the semiconductor chip is maintained, there is an advantage that a general support can be used that can be used regardless of the position of the contact on the active surface of the semiconductor chip.

In one embodiment of the invention, the support is preferably implemented as a semiconductor wafer. Semiconductor wafers used as supports can be manufactured at low cost and also have the advantage of selecting the layer thickness appropriately for the mechanical requirements without affecting the technical constraints of the active layer. This applies of course also to any other support, for example made of plastic or ceramic. In addition, there is an advantage that a semiconductor wafer as a support can be very simply connected to a semiconductor chip. To this end, thermal expansion coefficients are matched with each other.

The invention and its advantages are described in more detail below with reference to the drawings.

1 shows the simplest form of a semiconductor device according to the invention. The semiconductor chip 1 is provided on the first base surface 8 of the support 7. The semiconductor chip 1 has an active structure 5 on the first base surface 2. The active structure 5 is likewise provided on the second base surface 3. At this time, the second basic surface 3 of the semiconductor chip 1 is connected to the first basic surface 8 of the support 7. The active structures 4, 5 of the semiconductor chip 1 are connected to each other via a plurality of connecting portions extending from the first base surface 2 to the second base surface 3.

The semiconductor chip is a thinly polished semiconductor chip having, for example, a thickness of 15 to 20 mu m. The support has, for example, a thickness of 100 μm. The layer thickness of the support can be selected according to the physical requirements. Since the support 7 is not conductive, it is not necessary to consider the technical constraints of the active layer 5.

The support 7 of FIG. 1 also has a connecting structure 18 connecting the contacts (not shown) of the semiconductor chip 1 to each other in the above-described example. The support 7 may have one or more additional wiring layers. This may reduce the complexity of wiring in the active structure of the semiconductor chip 1. The connection between the support 7 and the semiconductor chip 1 can be performed, for example, by bonding or laminating. This connection can of course also be done in other suitable ways.

In the present invention, it is important that the thinly polished semiconductor chip and the support 7 are continuously connected to each other. As a result, the semiconductor chip can be easily handled. Disadvantages of the prior art are avoided by the use of semiconductor chips or semiconductor chip stacks with active structures on two base surfaces for low cost-applications.

2 shows a second embodiment of a semiconductor device according to the present invention. On the support 7 a semiconductor chip 1 or a semiconductor chip 10 is now provided not only on the first base surface 8 but also on the second base surface 9, respectively. The support 7 now has contact terminals 15, 16 on the first and second base surfaces 8, 9. The contact terminals 15 and 16 are connected to each other through a through connection and form an electrical connection between the active structure 5 of the semiconductor chip 1 and the active structure 14 of the semiconductor chip 10. The gap formed by the contact terminals 15, 16 between the semiconductor chips 1, 10 and the support 7 may be filled with a lower filler (not shown), for example.

The semiconductor chips 1 and 10 are arranged on the support 7 so that their edges are opposite each other, that is, the edges of each semiconductor chip end at some level with each other. As a result, a semiconductor device having a small external dimension is produced.

In the embodiment shown in FIGS. 1 and 2, only one semiconductor chip is shown on the base surface of the support 7. It is of course also conceivable that a plurality of semiconductor chips are arranged side by side on the first and second base surfaces 8, 9 of the support 7. The semiconductor chips can be connected to one another, for example, via connecting structures in the support 7. The connection structures may then be provided in such a way that they connect the contacts of the plurality of semiconductor chips to each other on the base surface of the support. However, the connection structures may also be provided in such a manner that only contacts of one semiconductor chip are connected to each other, as shown in FIG. 1.

Also, a method of stacking a plurality of semiconductor devices illustrated in FIGS. 1 and 2 may be considered. Here, the active structures of the two semiconductor chips will be connected to each other. The layer sequence of the semiconductor device of the above manner is then made of, for example, a structure of a semiconductor chip-support-semiconductor chip-semiconductor chip-support-semiconductor chip. Since every "base module (consisting of one support and semiconductor chips provided on one or both sides)" is evaluated as having high stability by itself, it is now possible to integrate the active structures of two semiconductor chips with each other.

Now on top of the "base module" according to one of the illustrated embodiments there is provided only one additional semiconductor chip having an active structure on one or both sides, thinly polished over the active structure of one semiconductor chip of the "base module". You can also consider.

3 shows a third embodiment of semiconductor device according to the present invention. The semiconductor device of FIG. 3 is merely a general vertical structure, i.e., a region extending from the first base surface 8 to the second base surface 9 in an area in which the semiconductor device (through connection portion 17) is not electrically conductive. It differs from the semiconductor device shown in FIG. 2 in that the support is constructed. In this case, the contact and contact terminals of the semiconductor chip need not be aligned with each other on the support. A universal support can be used that can be used regardless of the location of the contact on the semiconductor chip. In this case, care should be taken to maintain an appropriate minimum distance between the contacts on the semiconductor chip so that a short circuit does not occur between the two contacts of the semiconductor chip by the through connection.

The present invention enables semiconductor devices that can be layered with each other with semiconductor chips structured on both sides, thereby enabling simple and low cost processing in the manufacture of the semiconductor devices. The semiconductor device according to the present invention has excellent mechanical properties. At the same time, the layer thickness can be made thin by the semiconductor chip being thinly polished.

Claims (7)

At least one semiconductor chip (1) having first and second base surfaces (2, 3) and having active structures (4, 5) on said first and second base surfaces (2, 3), The active structures 4 and 5 are semiconductor devices connected to each other by connecting portions 6 passing through the semiconductor chip 1. A semiconductor device, characterized in that one (3) of the basic surfaces of the at least one semiconductor chip (1) is arranged on the first basic surface (8) of the support (7). The method of claim 1, At least one additional semiconductor chip 10 having active structures 13, 14 on the second base surface 9, which is opposite to the first base surface of the support 7, has its first and second base surfaces ( 11, 12, wherein one of the base surfaces 14 of the semiconductor chip 10 faces the support 7, the semiconductor chip 10 having a first base surface 8 of the support 7. A semiconductor device, characterized in that it is placed opposite the semiconductor chip (1) above. The method according to claim 1 or 2, The support 7 has contact terminals 15, 16 on the first and / or second base surfaces 8, 9, the contact terminals 15, 16 of the active structure 4, 5. A semiconductor device characterized by being connected to a contact of a semiconductor chip (1, 10). The method according to any one of claims 1 to 3, A semiconductor device, characterized in that the support (7) has a passive connection structure (18). The method according to claim 3 or 4, Contact terminals 15 on the first base surface 8 of the support 7 are connected to each other and / or contact terminals 16 on the second base surface 9 of the support 7. Are connected to each other and / or that the contact terminals (15, 16) on the first and second basic surfaces of the support (7) are connected to each other via a through connection (17). The method according to any one of claims 2 to 5, The semiconductor device according to claim 7, wherein the through connecting portion (17) and the non-conductive region extending from the first base surface (8) to the second base surface (9) at regular intervals are alternately arranged on the support (7). The method according to any one of claims 1 to 6, A semiconductor device, characterized in that the support (7) is a semiconductor wafer.