KR20010056473A - Improved high dielectric constant x7r ceramic capacitor and powder for making - Google Patents

Abstract

PURPOSE: A high dielectric constant X7R ceramic capacitor is provided to obtain a mature ceramic having smooth characteristic of X7R, high dielectric constant, high operating temperature and high insulating resistance. CONSTITUTION: A high electric constant X7R ceramic capacitor comprises Barium Titanat e body(20), Paladium 30 wt% and silver 70 wt%, two groups of interdigitated electrodes(22), each buried at one of the both ends of the body, and two silver terminations(25,26), each coupled with the corresponding one of the two groups of the interdigitated electrodes(22) at the end of the body(20). The body(20) consists of at least 90 wt% of Barium Titanate of 0.7-1.5 micron average diameter particles that are matured only by sintered within a sealed furnace at 1120 °C - 1150 °C, Cadmium Silicate 1.5-2.5 wt% compared with the Barium Titanate, reactive preventer Cation 0.89-2.72 mol%, and Calcium Cation 0.2-1.0 mol%.

Description

Ceramic capacitor and its manufacturing powder which improved the dielectric constant temperature of 7 높게 high {IMPROVED HIGH DIELECTRIC CONSTANT 7 Ｘ CERAMIC CAPACITOR AND POWDER FOR MAKING}

The present invention is composed of barium titanate fine particles and a small amount of carbohydrate silicate flux, has a high dielectric constant and smooth and constant temperature coefficient of dielectric constant, and is particularly sintered at low temperature suitable for the use of thin dielectric multilayer ceramic capacitors. The present invention relates to a ceramic powder compound capable of producing a temperature sintered dielectric ceramic body.

After sintering at about 1100 ° C., a dielectric ceramic composition for obtaining a dielectric having a high dielectric constant and smooth reference X7R performance is disclosed in Patent Documents USP5,358,338 (Galeb Maher, Nov. 02, 1993) and USP5,010,553 (Galeb). Maher, patented April 23, 1999).

In the first of these patent documents, a starting powder having a simple composition mainly composed of pure fine particles of BaTiO ₃ , a small amount of sodium silicate flux and a smaller amount of sintering inhibitor compound, i.e., niobium oxide, was used.

About 0.1 wt% MnCO ₃ .

The multilayer body was formed from this powder, and sintering was accomplished by carrying out in a sealed crucible at about 1100 ° C.

The multilayer body sintered in this manner has exceptionally desirable dielectric properties.

As an exceptional example, insulation resistance at high lifetime test temperatures of 125 ° C and high voltages (about three times the voltage, or 150V) tends to drop below 100 megohms.

In the first patent document cited above, it can be seen that this problem was mainly solved by performing an annealing treatment step for 1 hour or 2 hours at a temperature slightly lower than the temperature at which sintering was performed and at atmospheric pressure.

The ceramic powder composition in accordance with the technical configuration of the first patent document (USP 5,258,338) cited above was defined as the composition of Example 1 corresponding to Table 2.

It has been used as a commercial product for many years by many multi-layer ceramic capacitor manufacturers.

In the production of multilayer ceramic capacitors, this commercial powder was formed in a nearly dry ceramic paste layer or tape containing mainly organic binders.

Next, a thin film of 30% palladium and 70% silver electrodes is a screen printed on multiple pieces of green ceramic tape, and the tape pieces are stacked. A green ceramic stack structure or chip is formed.

After baking the binder at about 400 ° C., the chip was first baked, and the chip was cured by heating at about 800 ° C.

Next, the chip was fired.

That is, sintering was carried out in a hermetically sealed crucible from 1100 ° C to 1120 ° C, and the ceramic was cured to a high density to obtain a ceramic substrate having a high dielectric constant.

Sintering in the hermetically sealed crucible is necessary to establish a peripheral air pressure of the chip including cadmium oxide vapor discharged at the sintering temperature from the cadmium silicate sintering flux of the chip.

Since the cadmium silicate compound is not a glass composition, it does not melt at the sintering temperature, as described in patent document USP 4,266,265 (G. Maher).

In this cited patent document (USP4,266,265), a cadmium silicate flux melted at high temperature is reacted with other elements of the starting powder mixture at a low sintering temperature of about 1100 ° C., thereby modifying the composition of the flux so that the flux is liquefied at It described as being.

In the composition of this cited patent document USP 4,266,265, the melt flux acts as a reservoir where another exchange between the cations in the ceramic body and the cations in the flux itself occurs when sintering.

However, in patent document USP 4,266,265, the starting material of the flux contains a lead which acts on the flux when sintered, thereby lowering the melting temperature.

Other low temperature glass formers, boron and bismuth, which are capable of melting the flux, are not described in the present invention.

Therefore, in the capacitor of patent document USP5,258,338 and the capacitor of the present invention, there is no such element that reacts with the cadmium silicate and melts, so that the reaction when sintering between the elements of the starting material at the time of sintering, It can only be seen by the diffusion of solid state which is aided by the atmospheric pressure of chemically very active cadmium vapor.

Thus, in the above patent document (USP 4, 266, 265) and the starting powder of the present invention, such an element that is mixed with the cadmium flux and melted at the time of sintering is not constituted.

An additional reason for sintering in closed crucibles is the escape of large amounts of cadmium oxide upon firing, which creates an extreme health and hygiene risk to their cadmium oxides in the manufacture of capacitors.

As such, the annealing step described above is necessary, but another experience has shown a burden on capacitor manufacturers for several reasons.

The post-sinter anneal step is then an additional manufacturing process that adds cost and is the final step.

Lack of sufficient process control in this final process can destroy nearly finished capacitors.

As a result, the dielectric constant increases by about 5 to 10%.

Also, the dissipation factor (DF) is slightly higher, and the temperature coefficient is slightly less smooth.

Accordingly, an object of the present invention is to seal the material without a subsequent anneal step so that the temperature characteristic of the temperature coefficient X7R of the dielectric constant is smooth, the dielectric constant is high, the operation temperature is high, and the insulation resistance is high. It is to provide a low firing dielectric powder composition containing cadmium silicate flux that can be sintered in a crucible.

1 is a side view of a monolithic or multilayer ceramic capacitor (MLC) according to the present invention.

Figure 2 shows the performance data for the conventional composition and a method for producing a multilayer capacitor including three kinds of sintering temperatures, the method requires a post sinter annealing process and passed the insulation resistance life test, these capacitors Is a control to prepare data.

3 shows performance data of multilayer capacitors tested according to various kinds and amounts of reactive inhibitors in the starting ceramic powder composition.

4 shows performance data of a multilayer capacitor tested by replacing the palladium-silver electrode of the reference capacitor of FIG. 1 with non-silver precious metals.

FIG. 5 shows the performance data of a multilayer capacitor tested by replacing BaTiO ₃ powder with two identical BaTiO ₃ prepared by second and third manufacturers in the table of FIG. 2.

FIG. 6 shows performance data of multilayer capacitors tested by adding a small amount of titania to the start powder mixture of the capacitors in the table of FIG. 2.

FIG. 7 shows performance data of a multilayer capacitor tested by adding a small amount of five rare earth metal oxides to the starting powder mixture of the capacitor at a time in the table of FIG. 2.

FIG. 8 shows performance data of a multilayer capacitor tested by adding a small amount of calcium carbonate and magnesium carbonate to the starting powder mixture of the capacitor in the table of FIG.

FIG. 9 shows performance data of multi-layer capacitors tested by adding a small amount of calcium niobate to the starting powder mixture of the capacitors in the table of FIG. 2.

Figure 10 shows a three-dimensional bar graph showing the failure rate of the life test by the amount of calcium and sintering temperature in the capacitor of the present invention.

<Description of Signs of Major Parts shown in Drawings>

20: ceramic body

21: ceramic layer

22: buried electrode

25: silver termination

26: Hermit

The method for producing a ceramic powder mixture is based on at least 90 wt% pure barium titanate powder with an average particle size of 0.4 to 0.7 microns, 1.5 to 2.5 wt% cadmium silicate powder, and the amount of reactive-inhibitor cation based on the amount of the barium titanate. A starting powder mixture comprising 0.89 to 2.72 mol.% And a powder additive consisting of 0.2 to 1.0 mol% of calcium cation is prepared.

The starting powder mixture is then gently calcined at about 700 ° C. to obtain a powder consisting of agglomerates of the powder mixture, wherein each of the masses is prepared as barium titanate, as in the starting powder mixture, It is the same composition of cadmium silicate, reactive inhibitor and calcium, and it is composed of calcined powder mixture which is formed into a material which can be sintered by firing in closed crucible at 1000 ℃ ~ 1150 ℃, and insulation resistance under high temperature operation condition. It is possible to manufacture a dielectric ceramic substrate capable of keeping a high.

The calcium cation is preferably used as a calcium compound selected from CaO, a precursor of CaO, CaNb ₂ O ₇ and a combination thereof.

The powder additive preferably contains up to 0.2 mol% of manganese oxide based on the barium titanate.

In the second aspect of the present invention, the method for producing a X7R high K multilayer ceramic capacitor body having a high dielectric constant K temperature coefficient X7R is at least 90 wt% of a pure barium titanate powder having an average particle size of 0.4 to 0.7 microns. And a starting powder mixture composed of cadmium silicate powder of 1.5 to 2.5 wt%, 0.89 to 2.72 mol% of reactive inhibitor cation, and 0.2 to 1.0 mol% of calcium cation, with respect to the amount of barium titanate. It forms by forming a slurry.

The slurries of the slurry were prepared and dried, stacking with interleaved patterned films of palladium-silver ink between successive adjacent layers.

The ceramic capacitor body is sintered in a sealed crucible at a temperature of 1120 ° C. to 1150 ° C. to produce a dense ceramic capacitor body having buried electrodes without further sintering or annealing, thereby sintering the substrate. Ceramics have a dielectric constant at temperatures that meet the smoothness X7R criterion, and have insulation resistances greater than 15 megohm microfarads at 125 ° C for a 100-hour life test without annealing in open air.

The sintered ceramic material has a dielectric constant of 3800 or more, and the average size of the sintered ceramic particles in the substrate is preferably in the range of 0.5 to 1.2 microns.

In the third aspect of the present invention, the X7R multilayer ceramic capacitor comprises a barium titanate body, 30 wt% of palladium and 70 wt% of silver, embedded in the base, and formed of two groups of insertion electrodes formed at both ends thereof ( interdigitated electrodes) and two conductive terminals each contacting the two groups at their ends.

Its base is at least 90 wt% of barium titanate with an average diameter of 0.7 to 1.5 microns of particles aged only by sintering at 1120 ° C to 1150 ° C in a sealed crucible and 1.5 to 2.5wt% of cadmium silicate relative to the amount of barium titanate. , Reactivity inhibitor cation 0.89-2.72 mol% and calcium cation 0.2-1.0 mol%.

The use of multilayer ceramic capacitors of cadmium silicate flux is described in patent document USP4,266,265 (Galeb Maher, patented May 05, 1981).

The cadmium silicate flux, which does not melt at the sintering temperature, further improves its physical properties, so that the effect is sufficiently recognized.

However, in the present invention, when sintering in a ceramic composition, the flux combines with one element, that is, lead, bismuth or zinc, so that the element causes a reaction to lower the melting temperature of the flux below the sintering temperature, The sintered body tends to become semiconducting, which has a high failure rate, mainly in rapid life test of high voltage and high temperature.

In the present invention, the source of semiconductivity is also sintered in a hermetically sealed crucible which provides cadmium vapor pressure which is important for the ceramic densification process, but the sintering is compared with conventional open air. It was recognized that deficiency would be sufficient to form the sintered part semiconductively.

The problem of lowering the insulation resistance before post-sintering anneal has begun to solve which mechanism is caused by this phenomenon.

As in US Pat. No. 5,258,338, it was judged that free cadmium remained in the grain boundary of the sintered body which caused the degradation of the insulation resistance due to a low resistance path.

Also, when the silver from the palladium-silver buried electrode sintered, it was considered that there was a path of the silver in the gap between the particles.

Various tests have been devised to test these two possible technical approaches to the unacceptable resistance of the ceramic body at high operating voltages and temperatures.

First, using the commercially available powders described above, and using the same capacitor manufacturing method as described in the above-cited patent, which is limited to the commercially available powders, 36 multi-layer capacitors in each of the three groups defined in Examples 1, 2, and 3 are used. Prepared.

Capacitors in this group were used here as the basis for comparison with the example capacitors.

The starting material is pure barium titanate powder with an average particle size of 0.5 microns prepared by a hydrothermal process.

The starting powder mixture contains a certain amount of barium titanate, ₂ wt% cadmium silicate glass of composition 5CdO.2SiO 2, 1.2 wt% reactive inhibitor Nb ₂ O _5, and MnCO ₃ 0.1 which is commonly used to help form high insulation resistance. It is composed of wt%.

Their small amounts of additives are taken as described in wt% of the amount of barium titanate.

A slurry is formed by milling the starting powder mixture in a liquid organic developer.

Some layers of the slurry are dispersed in a planar base layer and dried.

A film of palladium-silver ink is screened in a pattern on a dry layer of ceramic slurry.

Additional layers of slurry and electrode paste are formed by the curtain coating process or the tape process described above, whereby metal ink film patterns are deposited between the adjacent adjacent ceramic layers, respectively, interposed therebetween. A patterned electrode layer and a stack of dry " green " ceramic layers are formed.

Example

As shown in FIG. 1, the ceramic body 20 has a ceramic layer 21 and a buried electrode 22 as cut in the stack.

The stack is a green ceramic chip that has been heated to remove organic components, subjected to initial roasting, and hardened the green stack as in the conventional process described above.

In each of the three groups of 36 chips corresponding to Examples 1, 2, and 3, respectively, one group of stacks / chips was set in an airtight crucible and sintered at 1090 ° C, 1100 ° C, and 1130 ° C, respectively.

In Examples 1, 2 and 3, 36 capacitors of each group were separated into first and second subgroups for 18 capacitor chips, respectively.

In the chip, the three first subgroups were terminated by treating silver paste at the ends of the ceramic substrate 20, exposing a set of alternately formed excrement electrodes at both ends thereof. The ceramic body was heated at 750 ° C. for several minutes to form silver terminations 25 and 26.

The thickness of each dielectric ceramic layer was typically 16-18 microns between adjacent buried electrodes.

After cooling the capacitor to room temperature, measure the capacitance and loss factor (DF) of each capacitor subgroup, and then apply 150V of DC (to be 8.8V per unit micron of normal dielectric thickness). At the same time, the life test was conducted keeping the temperature of the capacitor at 125 ° C.

If the capacitor's insulation resistance is less than 15 megohm-microfarads 100 hours before, the capacitor is deemed to have failed this life test.

The upper half of the table of FIG. 2 shows data for the first subgroup capacitor of Example 1 after sintering, showing no annealing and no failure after 24 hours.

In addition, when the capacitor is removed, there is no failure after 150 hours of testing.

However, the capacitors of Examples 2 and 3 all failed within 24 hours.

As in the upper half of the table of FIG. 2, the two first subgroups (Examples 2 and 3) were sintered at higher temperatures, and the life test failed because of no annealing treatment.

In Example 1, the chip was sintered at the lowest temperature.

As a result, life test failure trends from higher sintering temperatures are evident in most of the other tests illustrated here.

The cause of such a trend is further described below.

In Examples 1, 2 and 3, 18 capacitors of the second subgroup were post-sinter annealed at 1070 ° C. for about 3 hours.

The three second sub-groups of the chip were completed by processing silver paste at the ends of the ceramic substrate 20, exposing a set of alternating buried electrodes at both ends thereof, and receiving the ceramic substrate. Heated at 750 ° C. for a minute to form silver terminations.

Dielectric constant, temperature coefficient of dielectric constant and life test performance were measured.

The result is shown in the bottom face board in the table of FIG.

In the second subgroup subjected to the annealing treatment in the table of FIG. 2, one of the 18 capacitors of Example 1 after the annealing treatment failed in its life test as two of the capacitors of Example 3 after the annealing treatment.

Their failure occurred within 24 hours of life test.

After annealing, the dielectric constant (K) in Example 2-3 is greater than 4000, and the TCC is excellent within the X7R limit of +/- 15% over the temperature range of -55 ° C to 125 ° C for all capacitors. Do.

As such, the annealing treatment can be seen to be reduced in all capacitors of Examples 2 and 3.

Two or more groups of 36 of each capacitor tested in Examples 4 and 5 were prepared using the same starting powder as in the reference capacitors of Examples 1-3, with the exception of additives as reactivity inhibitors.

Referring to the table of FIG. 3, in Example 4, 0.8 wt% (0.42 mol%) of niobia + 0.8 wt% (0.7 mol%) of tantalum oxide was included as an inhibitor in the mixture.

On the other hand, the additive of the inhibitor in Example 5 included only 2 wt% (1.06 mol%) of tantalum oxide.

In each of these two examples the amount of inhibitor is the same in molar amount.

After sintering in closed crucibles, all capacitors failed the life test, and after annealing all capacitors passed.

However, both groups of these capacitors are inhibitors and niobium and tantalum have the same effect on the dielectric constant, DF and thermometer water.

It should be noted that in the table of FIG. 3 and the following table, the compositions did not measure density for the same pre-annealed and post-annealed capacitors.

This is because the density does not change by the annealing treatment.

The term "N.A" refers to the unavailable data.

Referring to the table of Figure 4 as follows.

The capacitors tested in Examples 6 and 7 are identical to their reference capacitors except that the palladium-silver electrode is replaced with a precious metal electrode other than silver (Ag).

The performance of these capacitors subjected to the front and back annealing treatment is the same as the front and back performance of the reference capacitors (Examples 1, 2 and 3).

It is clear from this data that free silver does not cause the poor life test before annealing.

The table of FIG. 5 is described below.

The capacitors tested in Examples 8 and 9, respectively, were prepared with an average particle size of 0.5 micron BaTiO ₃ obtained from the BaTiO ₃ suppliers used in the reference capacitors of Examples 1-3 and two other suppliers.

The inventors conducted a test several years ago to identify a powder that can be used in a commercially available fine powder BaTiO ₃ having the best balance of performance and cost.

The capacitor of Example 8 was implemented in the same manner as the reference capacitor of Example 3 before and after the annealing treatment.

However, the capacitor of Example 9 had a significantly lower failure rate in the life test than in the reference capacitor of Example 3.

It was judged that the starting material barium titanate contained impurities.

This non-predictive result is achieved by the use of an additive which prevents semiconductivity in barium titanate ceramics according to an embodiment having a barium titanate ceramic fired under reduced pressure, i. Thus, an unprecedented result was obtained.

Various tests of this type use non-stoichiometric small amounts of cation (such as Ti), or cations such as niobium and rare earth metals, or additives such as medium cations such as barium and titanium such as magnesium and calcium. It was.

The capacitors of Examples 10, 11, 12 and 13 were prepared by adding small amounts of excess titania.

The corresponding data is shown in the table of FIG.

The excess titania in the capacitors of Examples 10 and 11 reliably improved the life test results before annealing compared to the reference capacitor of Example 2, and the annealing treatment of Example 10 compared to Example 11 at different temperatures. Had little effect compared to the defective rate of the annealing treatment before.

The results of this example can be seen as consistent with the theory of semiconductivity.

Next, these data are shown in FIG.

Additives of various rare earth metal oxides were bonded to these capacitors prepared as in the multilayer capacitors used as the standards of Examples 1-3.

The yttrium oxide additions of Examples 14, 15, 16, and 17 were helpful, but not for capacitors (Examples 15 and 17) that were extinguished at high temperature, but for capacitors (Examples 14 and 16) sintered at 1110 ° C. In order to reduce the lifetime test failure rate before annealing, the purpose could not be achieved sufficiently.

In addition, in the annealing treatment of these capacitors, it was not possible to obtain the same certainty that the blanc ratio is zero like that of the reference capacitor.

The elbium oxide additions of Examples 18 and 19 and the iterobium additions of Examples 20 and 21 were in the same pattern as in yttrium.

This pattern was repeated, but less pronounced with the dysprosium (Dy) additions of Examples 22 and 23 and the gadolinium (G _d ) additions of Examples 24 and 25.

The rare earth metal oxide addition in the capacitor of the table of FIG. 8 was insufficient in effect, giving up the annealing treatment.

The capacitors of Examples 26-37 were prepared by adding small amounts of dopant amounts of calcium carbonate and magnesium carbonate.

As in Examples 26, 27 and 28, 0.44 mol% of CaO and its selected precursors were added to BaTiO ₃ , and in Example 26, the life test performance before annealing was sintered at 1110 ° C. Improved.

When the same composition was sintered at 1130 ° C., all of the capacitors not annealed in Example 26 passed the life test, and the dielectric constant K reached the maximum at 4206, and the temperature coefficient of K became the smoothest X7R. .

However, when the sintering temperature was increased to 1140 ° C., it failed a large percentage in the life test before annealing.

In Examples 29, 30 and 31, the amount of calcium carbonate was increased to 0.52 mol% relative to the amount of BaTiO ₃ , and the performance was excellent in the capacitors of Examples 32 and 30 sintered at 1130 ° C. and 1140 ° C., respectively. It was.

However, most of the capacitors of Example 31 failed before annealing at the sintering temperature of 1150 ° C.

In the capacitors of Examples 32, 33 and 34, the amount of calcium carbonate was further increased by 0.65 mol% relative to the amount of BaTiO ₃ .

As a result, the dielectric constant was lower than that of Example 29, but in Examples 32 and 33 sintered at sintering temperatures of 1130 DEG C and 1140 DEG C, respectively, there was no failure rate of the life test for the capacitor.

As an example, in Examples 26, 27, 29, 30, 32, 33 and 34, where the zero defect rate was obtained in the life test, the dielectric constant K increased by about 5% after annealing which was no longer necessary.

The amount of calcium cation in the starting powder mixture predicted to be effective in the calcium dopant data in the table of FIG. 8 is about 0.2-1.0 mol%.

In this case the annealing did not yield a significantly reduced smoothness of the K coefficient with temperature.

This is evident in the data of the table of FIG. 8.

Annealing in these cases has been classified as a means of choice for manufacturers of capacitors which, in some states, require slightly higher permittivity.

The table in FIG. 9 showing that calcium can be introduced in different forms is described below.

The capacitor of Example 38 was prepared by introducing calcium cation with 0.65 mol% of CaNb ₂ O ₇ .

This yields about 1/2 the desired amount of niobium (the amount of niobium cation in Examples 1,2 and 3), so this difference was caused by the addition of 0.4 mol% niobia.

The entire capacitor of Example 38 passed its life test.

The capacitance temperature coefficient (TCC) of the capacitance was slightly more smooth and the dielectric constant (K) was slightly lower.

The annealing capacitor exhibited the same properties.

Instead of removing the free cadmium from the calcined substrate to prevent defective rates, the post sinter annealing can be thought of simply as providing oxygen to remove oxygen vacancies from the grain cores.

The particle growth inhibitor in the manufacturing method of this X7R ceramic has a surface action with the surface of the barium titanate particles, and can be regarded as limiting particle growth by inhibiting reactivity.

Thus, in the ceramic body obtained as a result, the ceramic particles can be regarded as having an outer shell each containing a grain growth inhibitor and an inner core mainly containing no niobium.

In the table of Table 8, the effective amount of the reactive inhibitor in the starting powder mixture is about 0.5 to 1.5 wt% of niobia relative to barium titanate, which corresponds to niobium cation Nb ⁺⁵ 0.89 to 2.72 mol%. There is a need.

When sintered, it can be seen that some of niobium is bonded to the particles to generate free electrons.

These glass electrons improve conductivity and make the life test poor.

This transformed this ceramic into a semiconductor.

When annealed in air, the ceramic is stored as a highly resistant dielectric.

This storage is obtained by the following process.

The particles are estimated to have a half-spot of oxygen after sintering.

When post annealing in open air, oxygen is bound to the particles and free electrons in the particles are consumed.

As in the case of Example 9, free electrons are consumed at the time of sintering to increase the number of vacancies in oxygen.

The number of vacancies in oxygen is determined by temperature, oxygen pressure and the amount of acceptor dopant.

At low temperatures and high oxygen pressures, the number of vacancies in oxygen is largely determined by the number of acceptor dopants.

In increasing the insulation resistance and improving the life test of the ceramic, calcium (or magnesium) plays a functional role because some of the bonded calcium occupies the titanium and barium sites of the crystal lattice.

Calcium in the titanium site is obtained at the vacancies of oxygen as receptors.

However, neither Nb nor Ca releases free electrons when Nb and Ca are bound within their Ti sites.

Exactly one Ca cation needs to be present at the Ti site for all two Nb cations at the Ti site.

The presence of more Ca cation releases vacancies in oxygen, which do not significantly affect life test performance.

For reference, HMChan et al., "Compensatin Defects in highly donor-doped BaTiO ₃ ," Journal of the Amerion chemical society vol. 69, No6, pages 507-510, 1986.

From the data of Examples 26-34 in the table of FIG. 8, it can be seen that at higher sintering temperatures, more Nb cations can bind Ca cions that require more.

In the three-dimensional bar graph of FIG. 10, the failure rate (%) is shown in the life test of the multilayer capacitor according to the present invention (Examples 26-34) according to the sintering temperature for three different amounts of calcium in the dielectric ceramic. .

Examples 35, 36 and 37 in the table of FIG. 8 show data of a multilayer capacitor in which 0.44 mol% of magnesium dopant MgCo ₃ was added to the amount of BaTiO ₃ .

As a result, this resulted in three groups of capacitors, which were greatly improved in the life test results for the sintering temperatures of 1130 ° C. to 1150 ° C., but were ineffective as in the calcium dopant.

As such, magnesium can be combined in a suitable barium titanate of calcium additive to improve the insulation resistance as in Examples 35, 36 and 37.

However, it is known that only the binding Ca cation moiety is present at the Ti site, but less Mg cation as a whole can be seen to be bound at the Ti site.

As such, slight substitution of the mol amount of magnesium dopant cation as in calcium dopant cation can be seen to give the same result, that is, the same result in the life test failure rate relation to the sintering temperature.

According to the present invention, a cadmium silicate which can be sintered in a hermetically sealed crucible without a subsequent annealing process so that the temperature coefficient X7R having a dielectric constant K becomes a ceramic having a smooth temperature characteristic, a high dielectric constant, a high operating temperature and a high insulation resistance. A low calcined dielectric powder composition can be obtained.

According to the present invention, it is possible to prepare a dielectric ceramic substrate which can maintain a high insulation resistance in a high temperature operating state by constructing a calcined powder mixture.

According to the present invention, a multilayer ceramic capacitor having a high temperature constant X7R having a dielectric constant K can be obtained.

Claims (12)

In the method of producing a ceramic powder mixture, (a) at least 90 wt% of pure barium titanate powder with an average particle size of 0.4-0.7 microns, 1.5 to 2.5 wt% of cadmium silicate powder, and 0.89 to 2.72 mol% of reactive inhibitor cation relative to the amount of barium titanate To prepare a starting powder mixture consisting of a powder additive consisting of 0.2-1.0 mol% of cation, (b) The starting powder mixture is calcined gently at about 700 ° C. (Calcine) to form a powder consisting of agglomerates of the starting powder mixture, each of which contains barium titanate, as in the starting powder mixture, It mainly has the same composition of cadmium silicate, reactive inhibitor and calcium, and is composed of calcined powder mixture formed by calcined body which can be sintered by firing at 1120 ℃ ~ 1150 ℃ in a closed crucible, A method for producing a ceramic powder mixture, characterized by forming a dielectric ceramic capable of maintaining insulation resistance. The method of claim 1, Calcium cation is a calcium compound selected from CaO, a precursor of CaO, CaNb ₂ O _7, and a combination thereof, which is included in the powder additive thereof. The method of claim 1, Cadmium silicate is a method for producing a ceramic powder mixture, characterized in that 5 Cdo.2 SiO ₂ . The method of claim 1, The powder additive further comprises up to 0.2 mol% of manganese oxide relative to barium titanate. In the method of manufacturing a multilayer ceramic capacitor body having a high dielectric constant K of high temperature coefficient X7R, (a) at least 90 wt% of pure barium titanate powder with an average particle size of 0.4-0.7 microns, 1.5 to 2.5 wt% of cadmium silicate powder, and 0.89 to 2.72 mol% of reactive inhibitor cation relative to the amount of barium titanate A starting powder mixture consisting of 0.2-1.0 mol% of cation is mixed in an organic chromosome to produce a slurry. (b) preparing a layer of the slurry to dry the layer, forming a stack of the layer, and successively forming patterned films of palladium-silver ink between adjacent layers. Interleave, (c) The ceramic capacitor body is formed by sintering without post-sinter annealing by heating to a temperature of 1120 ° C. to 1150 ° C. in an enclosed crucible, so that the sintered ceramic of the capacitor body has a smoothness of dielectric constant temperature coefficient X7R. The dielectric constant K7 has a dielectric constant at temperature that meets the criteria and has an insulation resistance of at least 15 megohm-microfarads at 125 ° C for a 100-hour life test without annealing in open air. Method for producing a high multilayer ceramic capacitor body. The method of claim 5, A method for producing a multilayer ceramic capacitor body having a high temperature constant X7R of dielectric constant K, wherein the capacitor sintered ceramic has a dielectric constant of 3800 or more. The method of claim 5, Cadmium silicate is 5CdO.2SiO _{2 The} method of manufacturing a multilayer ceramic capacitor body having a high K coefficient of temperature coefficient X7R, characterized in that. The method of claim 5, A method of manufacturing a multilayer ceramic capacitor having a high dielectric constant K of high temperature coefficient X7R, characterized in that the average size of the sintered ceramic particles of the capacitor is 0.5 to 1.2 microns. A barium titanate body, 30 wt% of palladium and 70 wt% of silver, embedded in the body and formed at each of both ends of the body, interdigitated electrodes of the group, and the group at each end of the body In a multilayer ceramic capacitor having a high dielectric constant X7R having a high dielectric constant consisting of two conductive terminals connected to an insertion electrode of, the capacitor having an average size of particles formed only by sintering in a hermetically sealed crucible having a temperature of 1120 ° C. to 1150 ° C., 0.7 to 1.5 Dielectric constant characterized by at least 90wt% of micron barium titanate, 1.5-2.5wt% cadmium silicate, 0.89-2.72mol% reactive inhibitor cation, and 0.2-1.0mol% calcium cation relative to the amount of barium titanate The temperature coefficient of X7R is high multilayer ceramic capacitors. The method of claim 9, The capacitor has a sintered ceramic having a dielectric constant of 3800 or more, a multilayer ceramic capacitor having a high dielectric constant X7R. The method of claim 9, Cadmium silicate is a multi-layer ceramic capacitor with high dielectric constant X7R, characterized in that it is selected from 5CdO · 2SiO ₂ . The method of claim 9, A multilayer ceramic capacitor having a high dielectric constant temperature coefficient X7R, characterized in that the average size of the sintered ceramic particles of the capacitor is 0.5 to 1.2 microns.