KR20010044847A - Surge absorbeer - Google Patents

Surge absorbeer Download PDF

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Publication number
KR20010044847A
KR20010044847A KR1019990047874A KR19990047874A KR20010044847A KR 20010044847 A KR20010044847 A KR 20010044847A KR 1019990047874 A KR1019990047874 A KR 1019990047874A KR 19990047874 A KR19990047874 A KR 19990047874A KR 20010044847 A KR20010044847 A KR 20010044847A
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South Korea
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mixed
surge absorber
abnormal voltage
semiconductor
oxide
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KR1019990047874A
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Korean (ko)
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김정섭
박원재
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박태순
김정섭
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Priority to KR1019990047874A priority Critical patent/KR20010044847A/en
Publication of KR20010044847A publication Critical patent/KR20010044847A/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/20Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00Details of emergency protective circuit arrangements
    • H02H1/04Arrangements for preventing response to transient abnormal conditions, e.g. to lightning or to short duration over voltage or oscillations; Damping the influence of dc component by short circuits in ac networks

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Thermistors And Varistors (AREA)

Abstract

PURPOSE: A surge absorber is provided to ensure a superior function by using a property of a semiconductor. CONSTITUTION: ZnO, BiO, and SiO which are semiconductor chemical compounds in high purity powder are mixed in wt% ratio 90:5:5. A body(1) is formed through a plastic process, a binder process, a forming process and a heating process. A glass tube(3) covers the body. A lead line(2) is connected on both sides of the glass tube(3). If an abnormal voltage is ranging from 200V to 500V, conduction is carried out. ZnO, BiO2, CoO2, and SiO2 which are semiconductor chemical compounds are mixed in wt% ratio 80:5:5:10. If an abnormal voltage is ranging from 700V to 2000V, conduction is carried out.

Description

서지 압소버{SURGE ABSORBEER}Surge Absorber {SURGE ABSORBEER}

본 발명은 전자기기등에서 사용되는 전자회로에 있어서, 사용중에 자체적으로 발생하는 이상전압이나 외부에서 유기, 인가되는 이상전압으로 부터 전자회로를 보호할 수 있는 서지 압소버에 관한 것으로, 특히 반도체 소재를 이용함으로서 종래에 비하여 기능상의 효율성을 극대화 시킨 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surge absorber capable of protecting an electronic circuit from an abnormal voltage generated by itself during use or an abnormal voltage induced or applied externally. By maximizing the functional efficiency compared to the conventional.

종래의 서지 압소버는 내측에 공극을 갖는 세라믹체 표면에 카본도금과 같은 얇은 도전성피막을 행하고, 양단에 전극과 리드선을 고정한 유리관을 씌우되, 그 내부를 진공으로 한 것이다.In the conventional surge absorber, a thin conductive film such as carbon plating is applied to the surface of a ceramic body having voids therein, and both ends are covered with a glass tube in which electrodes and lead wires are fixed, and the inside thereof is vacuumed.

이와같은 서지 압소버는 서지 전압이 발생될 수 있는 회로기판상에 설치되며, 회로기판에 서지전압이 발생하게 되면 서지 압소버는 도통하게 되고, 결국 서지전압은 리드선을 따라 그라운드 되게 되어 회로기판을 보호할 수 있게 되는 것이다.Such a surge absorber is installed on a circuit board capable of generating a surge voltage. When a surge voltage is generated on the circuit board, the surge absorber becomes conductive, and eventually the surge voltage is grounded along the lead wire to protect the circuit board. It will be possible.

그러나 이와같은 종래의 제품들은 제조공정이 복잡할 뿐 아니라, 사용을 함에 따라 공극사이에 카본이 발생하고, 잔류 정전기가 남아 있게 되어 허용공차가 15% 내지 20%에 달할 정도로 그 효율이 떨어지게 되는 것이며, 또한 오래 사용하다 보면 자연히 진공도가 떨어지게 되고, 따라서 진공상태가 유지되지 아니하므로 불량율이 높아 제대로 그 기능을 발휘할 수 없게 되는 것이다.However, these conventional products are not only complicated in the manufacturing process, but as they are used, carbon is generated between the pores and residual static electricity remains, so that the tolerance is reduced to 15% to 20%. In addition, the longer the use, the lower the degree of vacuum naturally, and thus the vacuum state is not maintained, so that the failure rate is high, the function can not be properly exhibited.

본 발명은 종래 서지 압소버가 갖고 있는 기본적인 특징 즉, 공극을 구성하되 그 주위를 진공상태로 하여 구성되는 종래의 방식을 완전히 탈피한 것으로, 상기 종래방식을 채택하지 아니하고도 반도체가 갖고 있는 성질을 이용하여 종래 서지 압소버보다 그 기능을 훨씬 우수하게 한 것이다.The present invention completely escapes the conventional features of the conventional surge absorber, that is, constitutes a void but is surrounded by a vacuum state, and the characteristics of the semiconductor without adopting the conventional method. It is much better than the conventional surge absorber.

즉, 종래 서지 압소버는 LEAD와 LEAD간의 공간가공 및 외부절연피막형성, 내부진공상태등 제조공정의 난이점등이 있었으며, 또한 폭넓은 허용공차로 인하여 정밀회로에서 사용하기에는 무리가 있었다.In other words, the conventional surge absorber has difficulty in manufacturing process such as space processing between LEAD and LEAD, external insulating film formation, internal vacuum state, and also has difficulty in using in precision circuit due to wide tolerance.

따라서, 본 발명은 이를 해결하고자 발명된 것이다.Therefore, the present invention has been invented to solve this problem.

일반적으로, 반도체는 저항률이 도체보다 크고, 절연체보다 작은In general, semiconductors have higher resistivity than conductors and smaller than insulators.

10-6- 106〔Ω·m〕인 재료이다. 따라서 이와 같은 반도체는 원소 주기율표에 나타나 있는 반도체 원소들을 서로 혼합함으로서 반도체의 전기전도를 조절할 수가 있는 것인바, 원소주기율표상의 제3족 원소와 제5족 원소와의 금속간 화합물 (예컨대 GaAs), 제2족의 원소와 제6족의 원소들로서 이루어지는 화합물(예컨대 ZnS)등은 잘 알려진 반도체이다. 이들외에도 산화물 반도체로서 알려져 있는 금속산화물, 유기물 반도체로서 알려진 반도체적 성능을 가지고 있는 유기물 등 많은 종류의 반도체 재료가 있어 각각 적절하게 이용되고 있는 것이다.10 -6-10 6 [mV]. Therefore, such a semiconductor can control the electrical conductivity of the semiconductor by mixing the semiconductor elements shown in the periodic table of elements. Compounds composed of Group 2 elements and Group 6 elements (eg, ZnS) and the like are well known semiconductors. In addition to these, there are many kinds of semiconductor materials such as metal oxides known as oxide semiconductors and organic materials having semiconductor performance known as organic semiconductors.

한편, 본 발명의 서지 압소버도 이와같은 반도체 원소를 혼합하여 제조된 것으로, 반도체 관계의 원소인 3가, 4가, 5가, 6가 계열과 2가 및 백금족 계열의 분말을 성능에 따라 혼합하여 서지 압소버를 제작한 것이며, 합성되는 반도체 원소의종류 및 합성비율에 따라 도통시킬수 있는 전압을 조정할 수가 있어 이상전압 세기에 따라 선택적으로 사용될 수 있도록 한 것이다.On the other hand, the surge absorber of the present invention is also manufactured by mixing such semiconductor elements, and the powders of trivalent, tetravalent, pentavalent, hexavalent series and divalent and platinum group series which are semiconductor elements are mixed according to performance. Thus, the surge absorber is manufactured, and the voltage that can be conducted can be adjusted according to the type and composition ratio of the semiconductor element to be synthesized, so that it can be selectively used according to the abnormal voltage intensity.

도1 - 본 발명의 종단면도.1-longitudinal section view of the present invention;

본 발명은 분말상태 고순도의 반도체 화합물을 중량%로 혼합하고, 이를 가소공정, 바인더공정, 성형공정, 가열(소결)공정을 거쳐 몸체(1)를 형성하고, 이에 유리관(3)을 덧씌우고 양측에 리드선(2)이 접속되도록 한 서지 압소버이다.In the present invention, the powdery high purity semiconductor compound is mixed in a weight%, and the body 1 is formed through a calcination process, a binder process, a molding process, and a heating (sintering) process, and the glass tube 3 is covered with both sides. It is a surge absorber in which the lead wire 2 is connected.

상기에 있어 혼합되는 반도체 화합물의 종류 및 혼합비는 회로에 흐르는 이상전압의 세기에 따라 그 종류 및 혼합비가 달리 구성되는바, 이상전압의 세기가 200V 내지 500V 인 경우에는 반도체 화합물의 성분 및 혼합비는ZnO(산화아연)90%, BiO(산화비스머스)5%, SiO(산화규소)5%로 하여 분말상태로 혼합하며, 이상전압의 세기가 700V 내지 2000V 인 경우에는 ZnO 80%, BiO25%, CoO25%, SiO210% 분말상태로 혼합한다.As described above, the type and the mixing ratio of the mixed semiconductor compound are different depending on the strength of the abnormal voltage flowing in the circuit. When the intensity of the abnormal voltage is 200 V to 500 V, the component and the mixing ratio of the semiconductor compound are ZnO. (Zinc oxide) 90%, BiO (bismuth oxide) 5%, SiO (silicon oxide) 5% mixed in a powder state, when the strength of the abnormal voltage is 700V to 2000V ZnO 80%, BiO 2 5% , CoO 2 5%, SiO 2 10% are mixed in powder form.

이하 이상전압의 세기가 200V 내지 500V 인 경우에 사용되는 서지 압소버의 제작공정을 실시예를 통하여 살펴보는 바이다.Hereinafter, the manufacturing process of the surge absorber used when the intensity of the abnormal voltage is 200V to 500V will be described with reference to the embodiment.

실시예Example

1. 반도체 소재 준비1. Semiconductor material preparation

ZnO(산화아연), BiO(산화비스머스), SiO(산화규소) 고순도 분말을 준비한다.ZnO (zinc oxide), BiO (bismuth oxide), and SiO (silicon oxide) high purity powders were prepared.

2. 혼합공정2. Mixing process

ZnO(산화아연)90%, BiO(산화비스머스)5%, SiO(산화규소)5% 의 구성비로 BALL MILL 기에 넣고 혼합이 잘 되도록 장시간 혼합한다.ZnO (zinc oxide) 90%, BiO (bismuth oxide) 5%, SiO (silicon oxide) 5% in the composition of the ball mill and mixed for a long time to mix well.

3. 가소공정3. Plasticizing process

오븐(OVEN)을 통하여 약 300℃로 가열하여 혼합된 분말의 습기를 제거한다. 상기에 있어 습기가 제거된 분말을 미리 준비할 수도 있다.The moisture of the mixed powder is removed by heating to about 300 ° C. through an oven (OVEN). In the above, the powder from which the moisture was removed may be prepared in advance.

4. 바인더(BINDER)공정4. Binder process

혼합된 분말은 너무 고운 분말 상태이므로 프레스(PRESS)로 압착하여 일정한 형태로 성형할시 그 형상을 유지하기가 어려우며, 설령 성형 상태를 유지한다 하여도 부서지기가 쉬운 것이다. 따라서 바인더 재료인 폴리비닐알코올(Polyvinyl alcohol)분말과 스테아린산아연(Zinc stearate)분말을 섞어 성형하기 쉽도록 바인더한다.Since the mixed powder is too fine powder state, it is difficult to maintain the shape when it is pressed into a certain shape by pressing (PRESS), even if it maintains the molding state is easy to break. Therefore, the binder material is mixed with polyvinyl alcohol powder and zinc stearate powder for easy molding.

5. 성형공정5. Molding process

바인더된 혼합물을 프레스로 압착하여 필요한 형태로 성형한다.The binder mixture is pressed into a press to form the required shape.

6. 가열(소결)공정6. Heating (sintering) process

성형된 몸체를 약 1400℃로 가열하여, 몸체에 남아있는 바인더 성분인 폴리비닐알코올과 스테아린산아연을 태워버린다.The molded body is heated to about 1400 ° C. to burn off the polyvinyl alcohol and zinc stearate, the binder components remaining in the body.

7. 리드선, 캡, 유리관을 씌우는 공정7. Lead wire, cap, glass tube covering process

상기 공정은 서지 압소버를 제작할 때 행하는 통상적인 공정을 행하게 되며, 상기 공정 후 표면코팅, 마킹(MARKING), TAPING 등의 공정을 거쳐 모든 공정을 끝마친다.The process is to perform a conventional process for manufacturing a surge absorber, and after the process is finished all the process through the process of surface coating, marking (Marking), tapping and the like.

상기와 같은 공정을 거쳐 제작된 서지 압소버를 이상전압의 세기가 200V 내지 500V 인 경우에 사용하게 되면 그 효과는 종래의 서지 압소버에 비하여 월등하게 되는 것이다. 한편 이상전압의 세기가 700V 내지 2000V 인 경우에는 혼합되는 반도체 화합물의 종류 및 혼합비를 다음과 같이 하면 된다.When the surge absorber manufactured through the above process is used when the intensity of the abnormal voltage is 200V to 500V, the effect is superior to that of the conventional surge absorber. On the other hand, when the intensity of the abnormal voltage is 700V to 2000V, the type and the mixing ratio of the semiconductor compounds to be mixed may be as follows.

ZnO 80%, BiO25%, CoO25%, SiO210% 분말상태로 혼합하되 그 이후의 공정 즉, 가소공정, 바인더공정, 성형공정, 가열(소결)공정등은 앞에서 실시한 실시예와 동일하다.ZnO 80%, BiO 2 5%, CoO 2 5%, SiO 2 10% mixed in a powder state, but the subsequent steps, such as the plasticizing process, binder process, molding process, heating (sintering) process, etc. same.

본 발명은 전자기기등에서 사용되는 전자회로에 있어서, 사용중에 자체적으로 발생하는 이상전압이나 외부에서 유기, 인가되는 이상전압으로 부터 전자회로를 보호할 수 있는 서지 압소버에 관한 것으로, 특히 반도체 소재를 이용함으로서 종래에 비하여 기능상의 효율성을 극대화 시킨 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surge absorber capable of protecting an electronic circuit from an abnormal voltage generated by itself during use or an abnormal voltage induced or applied externally. By maximizing the functional efficiency compared to the conventional.

종래의 서지 압소버는 내측에 공극을 갖는 세라믹체 표면에 카본도금과 같은 얇은 도전성피막을 행하고, 양단에 전극과 리드선을 고정한 유리관을 씌우되, 그 내부를 진공으로 한 것이 많이 사용되었었다.In the conventional surge absorber, a thin conductive film such as carbon plating is applied to the surface of a ceramic body having voids therein, and a glass tube in which electrodes and lead wires are fixed on both ends thereof, but the inside thereof is vacuumed.

그러나 이와같은 종래의 제품들은 제조공정이 복잡할 뿐 아니라, 사용을 함에 따라 공극사이에 카본이 발생하고, 잔류 정전기가 남아 있게 되어 효율이 떨어지게 되는 것이며, 또한 오래 사용하다보면 자연히 진공상태가 떨어지게 되거나 외부의 충격에 의하여 진공상태가 파괴되므로 불량율이 높아 제대로 그 기능을 발휘할 수 없게 되는 것이다.However, these conventional products are not only complicated in the manufacturing process, but as they are used, carbon is generated between the pores, residual static electricity remains, and the efficiency decreases. Since the vacuum state is destroyed by an external impact, the failure rate is high, so that the function cannot be properly performed.

그러나 본 발명의 서지 압소버는 반도체 소재를 이용하여 제작한 것이므로, 공극이 필요없고, 진공상태도 유지할 필요가 없는 것이다. 따라서 고장이 날 우려가 전혀 없는 것이어서 수명이 반 영구적이며, 허용오차도 종래는 보통 15% 내지 20%에 달하였으나 본 발명은 5% 정도에 불과하여 그 효율적 기능도 우수한 것이며, 또한 제조공정도 단순하여 그 경제적 효과는 이루 말할 수 없는 아주 유용한 발명인 것이다.However, since the surge absorber of the present invention is manufactured using a semiconductor material, there is no need for voids and no need to maintain a vacuum. Therefore, there is no risk of failure at all, the life is semi-permanent, and the tolerance is usually 15% to 20%, but the present invention is only about 5%, and its efficient function is excellent, and the manufacturing process is simple. Therefore, the economic effect is an incredibly useful invention.

Claims (2)

분말상태의 고순도 반도체 화합물인 ZnO(산화아연), BiO(산화비스머스), SiO(산화규소)를 90 : 5 : 5 비율로 중량% 혼합하고, 이를 가소공정, 바인더공정, 성형공정, 가열(소결)공정을 거쳐 몸체(1)를 형성하고, 이에 유리관(3)을 덧씌우고 양측에 리드선(2)이 접속되도록 하여 이상전압의 세기가 200V 내지 500V인 경우에 도통될 수 있도록 한 서지 압소버.ZnO (zinc oxide), BiO (bismuth oxide), and SiO (silicon oxide), which are powdered high purity semiconductor compounds, are mixed in a weight ratio of 90: 5: 5 by weight, and are calcined, bindered, molded, heated ( Surge absorber which forms the body 1 through the sintering) process, covers the glass tube 3, and connects the lead wires 2 to both sides so that it can be conducted when the intensity of the abnormal voltage is 200V to 500V. . 제1항에 있어서, 혼합되는 반도체 화합물은 ZnO(산화아연), BiO2(산화비스머스), CoO2(산화코발트), SiO2(산화규소)를 80 : 5 : 5 : 10 비율로 중량% 혼합하여 이상전압의 세기가 700V 내지 2000V 인 경우에 도통될 수 있도록 한 서지 압소버.The semiconductor compound to be mixed comprises ZnO (zinc oxide), BiO 2 (bismuth oxide), CoO 2 (cobalt oxide), SiO 2 (silicon oxide) in a ratio of 80: 5: 5: 10 by weight. A surge absorber, which is mixed to enable conduction when the strength of the abnormal voltage is 700V to 2000V.
KR1019990047874A 1999-11-01 1999-11-01 Surge absorbeer KR20010044847A (en)

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