KR20010008472A - Control method and system in ups - Google Patents

Control method and system in ups Download PDF

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Publication number
KR20010008472A
KR20010008472A KR1019990026339A KR19990026339A KR20010008472A KR 20010008472 A KR20010008472 A KR 20010008472A KR 1019990026339 A KR1019990026339 A KR 1019990026339A KR 19990026339 A KR19990026339 A KR 19990026339A KR 20010008472 A KR20010008472 A KR 20010008472A
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South Korea
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cpu
ups
inverter
monitor
rectifier
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KR1019990026339A
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Korean (ko)
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이동욱
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이동욱
세방산업 주식회사
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Priority to KR1019990026339A priority Critical patent/KR20010008472A/en
Publication of KR20010008472A publication Critical patent/KR20010008472A/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • H02J9/04Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
    • H02J9/06Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
    • H02J9/061Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems for DC powered loads
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • H02J9/04Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
    • H02J9/06Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
    • H02J9/062Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems for AC powered loads

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  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Stand-By Power Supply Arrangements (AREA)
  • Inverter Devices (AREA)

Abstract

PURPOSE: A control method in a UPS and system thereof is provided to enable main components to be operated even if a CPU has a broken by installing separate CPUs in the main components. CONSTITUTION: A control system comprises first CPU(14) for controlling a rectifier(10), second CPU(24) for controlling an inverter(20), and third CPU(34) for controlling a monitor(30). Data communication among the rectifier(10), the inverter(20) and the monitor(30) is connected via RS-485 multi-drop technique. Even if the third CPU(34) is broken and the operational state of a UPS is not displayed on the monitor(30), a consecutive operation is possible to perform the function of the UPS. If the first CPU(14) of the rectifier(10) is broken, the inverter(20) is consecutively supplied with power from a separate storage battery and the breakdown state is displayed on the monitor(30). Then an operator can confirm the state of the UPS.

Description

유피에스에 있어서 제어방법 및 그 시스템 {CONTROL METHOD AND SYSTEM IN UPS}Control method in UPS and its system {CONTROL METHOD AND SYSTEM IN UPS}

본 발명은 유피에스에 있어서 제어방법 및 그 시스템에 관한 것으로서, 더 상세하게는 통상적인 전원 공급이 안되거나 정전이 될 때 순시에 간단(間斷)없이 전력을 자동으로 공급하는 유피에스(UPS)를 구성하는 중요 구성부인 정류부, 인버터 및 모니터에 각각 개별적인 중앙처리장치(CPU)가 설치되어 독립적으로 제어를 담당하는(Discrete Control) 유피에스에 있어서 제어방법 및 그 시스템에 관한 것이다.The present invention relates to a control method and a system in the UPS, and more particularly to the UPS (UPS) to automatically supply the power without instantaneous power when the power supply is not normal or power failure The present invention relates to a control method and a system of a discrete control unit (CPU), each of which is provided with a separate central processing unit (CPU) in the rectifying unit, the inverter, and the monitor, which are important components.

UPS란 Uninterruptible Power Supply의 약어로 통상적인 전원 공급이 안되거나 정전이 될 때 순시에 간단(間斷)없이 전력을 자동으로 공급하는 시스템으로 무정전 전원공급장치 또는 무정전 전원장치라고도 한다.UPS is an abbreviation of Uninterruptible Power Supply. It is an uninterruptible power supply system. It is an uninterruptible power supply or an uninterruptible power supply system.

UPS는 간단없이 지속적으로 전원을 공급해야 하는 작동중의 컴퓨터를 비롯한 전자기기류의 필수장치로서 전압이나 주파수의 변동 또는 순간 정전에도 안정된 전원을 공급해 컴퓨터의 데이터가 파괴 내지 소거되는 것을 방지, 보호하거나 각종 제어장치의 제어 기능상실 및 오작동 등을 방지하기 위한 장치이다.UPS is an essential device for electronic equipment including computers in operation that needs to be continuously and simply supplied. It provides stable power even in the event of voltage or frequency fluctuations or momentary power failures to prevent or protect data from being destroyed or erased. It is a device to prevent the loss of control function and malfunction of the control device.

또한 전압이 규정치보다 높거나 낮아 파형 왜율(歪率)이 규정치 내에 들지 않으면 컴퓨터가 정상적으로 작동할 수 없게 돼 데이터가 파괴되거나 소실되기 때문에 일반적으로 주파수가 50Hz 또는 60Hz인 정현파의 정전압이 요구되는데 상용전원의 불안정으로부터 컴퓨터의 데이터가 기기를 보호하기 위해 항시 무정전 상태로 전원을 공급하는 장치이다.In addition, if the voltage is higher or lower than the specified value, if the waveform distortion is not within the specified value, the computer will not operate normally and the data will be destroyed or lost. Therefore, a sine wave with a frequency of 50 Hz or 60 Hz is usually required. It is a device that supplies power to an uninterruptible state at all times to protect the data of the computer from the instability of the device.

이러한 UPS는 크게 3개의 주요 구성부 즉 상용 전원인 교류를 직류로 변환하는 정류부와 입출력 전압 전류나 유피에스의 상태 등을 화면에 디스플레이하게 하는 모니터와 직류를 교류로 변환하는 인버터로 구성된다.The UPS is mainly composed of three main components: a rectifier for converting AC, which is a commercial power source, to a direct current (DC), a monitor for displaying input / output voltage, current, and the state of the UPS on a screen, and an inverter for converting a direct current to an alternating current.

종래 이러한 구성부의 제어는 중앙 집중형이거나 마스터(master))-슬레이브(slave) 방식으로 되어 있었다.Control of such components has conventionally been centralized or master-slave.

이를 첨부된 도면 도 1a 및 도 1b를 참고로 하여 설명하면 다음과 같다.This will be described with reference to the accompanying drawings, FIGS. 1A and 1B.

도 1a, 도 1b는 종래 제어 시스템의 블록도이다.1A and 1B are block diagrams of a conventional control system.

먼저 중앙 집중형은 모니터(40)에 집중형 CPU(36)를 구비하여 상기 집중형 CPU(36)에 의해 모니터(30)와 인버터(20) 및 정류부(10)가 모두 제어되는 방식이다.First, the centralized type is provided with the centralized CPU 36 in the monitor 40, and the centralized CPU 36 controls both the monitor 30, the inverter 20, and the rectifier 10.

따라서 인버터(20)와 정류부(10) 사이에는 정보나 데이터의 통신이 서로 불가능하고 인버터(20) 및 정류부(10)에서 모니터(30)로 정보나 데이터의 통신의 불가능하였다.Therefore, communication between information and data is impossible between the inverter 20 and the rectifier 10, and communication of information or data from the inverter 20 and the rectifier 10 to the monitor 30 is impossible.

마스터-슬레이브 방식은 모니터(30)에는 마스터 CPU(32)를 구비하고 인버터(20) 및 정류부(10)에는 각각 슬레이브 CPU(22,12)를 구비하여 인버터(20) 및 정류부(10)가 슬레이브 CPU(22,12)에 의해 제어되되 전체적으로는 마스터 CPU(32)에 의해 제어되는 방식이다.In the master-slave method, the monitor 30 includes a master CPU 32 and the inverter 20 and the rectifier 10 have slave CPUs 22 and 12, respectively, so that the inverter 20 and the rectifier 10 are slaved. It is controlled by the CPUs 22 and 12 but is controlled by the master CPU 32 as a whole.

이때 모니터(30)는 물론 마스터 CPU(32)에 의해 제어된다.At this time, the monitor 30 is of course controlled by the master CPU 32.

마스터-슬레이브 방식도 중앙 집중형과 같이 인버터(20)와 정류부(10) 사이에는 직접 통신이 불가능하였고, 다만 인버터(20) 및 정류부(10)에서 모니터(30)로 정보나 데이터는 통신이 아닌 아날로그의 접점 신호 등에 의해 이루어졌다.In the master-slave system, as in the centralized type, direct communication between the inverter 20 and the rectifier 10 was not possible, except that information or data is not communicated from the inverter 20 and the rectifier 10 to the monitor 30. It was made by analog contact signal.

따라서 중앙 집중형의 경우에는 집중형 CPU(36)가 마스터-슬레이브 방식의 경우에는 마스터 CPU(32)가 고장이 나면 전체적인 제어가 불가능하게 되고 UPS 전체가 다운이 되어 다른 구성부도 동작이 되지 않고 각 구성부 간에 원활한 데이터 통신이 되지 않는 문제점이 있었다.Therefore, in the case of the centralized type, when the centralized CPU 36 is a master-slave type, when the master CPU 32 fails, the overall control is impossible and the whole UPS is down, and other components are not operated. There was a problem in that data communication between components is not smooth.

본 발명은 상술한 문제점을 해결하기 위하여 안출된 것으로서, 순시에 간단(間斷)없이 전력을 자동으로 공급하는 유피에스(UPS)를 구성하는 중요 구성부인 정류부, 인버터 및 모니터에 각각 개별적인 중앙처리장치(CPU)가 설치되어 독립적으로 제어를 담당함으로써 한 CPU가 고장시에도 다른 구성부는 계속 운전이 가능하고 각 구성부 간에는 원활한 데이터 통신이 이루어지는 유피에스에 있어서 제어방법 및 그 시스템을 제공하는 데 그 목적이 있는 것이다.SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and each of the central processing units (respectively) to the rectifying unit, the inverter, and the monitor, which are important components constituting the UPS (UPS), which automatically and automatically supply power without instantaneous ( The purpose of the present invention is to provide a control method and a system in the UPS, in which the other components can continue to operate even when one CPU fails, and a smooth data communication is performed between the components. It is.

상술한 목적을 달성하기 위하여 본 발명은 유피에스를 구성하는 정류부, 인버터 및 모니터에 각각 개별 CPU가 설치되어 상기 개별 CPU가 정류부, 인버터 및 모니터를 각각 독립적으로 분산 제어함을 특징으로 하는 유피에스에 있어서 제어방법을 제공하고자 한다.In order to achieve the above object, the present invention provides a separate CPU for each of the rectifier, the inverter, and the monitor constituting the UE, and each of the individual CPUs separately controls the rectifier, the inverter, and the monitor. In order to provide a control method.

상술한 목적을 달성하기 위하여, 정류부를 독립적으로 제어하는 개별 CPU와 인버터를 독립적으로 제어하는 개별 CPU와 모니터를 개별적으로 제어하는 개별 CPU로 구성되고, 상기 정류부와 인버터 및 모니터 사이에 데이터 통신은 RS-485 멀티-드롭 방식으로 연결됨을 특징으로 하는 유피에스에 있어서 제어시스템을 제공하고자 한다.In order to achieve the above object, it is composed of a separate CPU to control the rectifier independently, and a separate CPU to control the inverter independently and a separate CPU to control the monitor, the data communication between the rectifier and the inverter and the monitor is RS It is intended to provide a control system for the UPS characterized by being connected in -485 multi-drop mode.

도 1a, 도 1b는 종래 제어 시스템의 블록도,1A, 1B are block diagrams of a conventional control system,

도 2는 본 발명에 따른 제어 시스템의 블록도.2 is a block diagram of a control system according to the present invention.

〈도면의 주요부분에 대한 부호의 설명〉<Explanation of symbols for main parts of drawing>

10: 정류부, 12,22; 슬레이브 CPU, 14,24,34: 개별 CPU, 20: 인버터, 30: 모니터, 32: 마스터 CPU, 36: 집중형 CPU.10: rectifier 12,22; Slave CPU, 14, 24, 34: Individual CPU, 20: Inverter, 30: Monitor, 32: Master CPU, 36: Centralized CPU.

이하 본 발명을 첨부된 도면 도 2를 참고로 하여 설명하면 다음과 같다.Hereinafter, the present invention will be described with reference to FIG. 2.

도 2는 본 발명에 따른 제어 시스템의 블록도이다.2 is a block diagram of a control system according to the present invention.

먼저 본 발명의 기본적인 시스템을 살펴보면, 정류부(10)를 독립적으로 제어하는 개별 CPU(14)와 인버터(20)를 독립적으로 제어하는 개별 CPU(24)와 모니터(30)를 개별적으로 제어하는 개별 CPU(36)로 구성되고, 상기 정류부(10)와 인버터(20) 및 모니터(30) 사이에 데이터 통신은 RS-485 멀티-드롭 방식으로 연결됨을 특징으로 한다.First, referring to the basic system of the present invention, an individual CPU 14 controlling the rectifier 10 independently and an individual CPU 24 controlling the inverter 20 independently and an individual CPU controlling the monitor 30 individually 36, the data communication between the rectifier 10, the inverter 20 and the monitor 30 is characterized in that the RS-485 multi-drop method is connected.

이하 본 발명을 좀 더 상세히 설명하면, UPS를 구성하는 중요한 구성부인 정류부(10)는 상용 전원인 교류(AC)를 직류(DC)로 변환하고, 모니터(30)는 입출력 전압 전류나 유피에스의 상태 등을 화면에 디스플레이하게 하며, 인버터(20)는 직류를 교류로 변환하는 역할을 한다.Hereinafter, the present invention will be described in more detail. The rectifying unit 10, which is an important component constituting the UPS, converts AC, which is a commercial power source, into DC, and the monitor 30 is used for input / output voltage current or UPS. Display the status and the like on the screen, the inverter 20 serves to convert the direct current into alternating current.

이러한 3개의 중요한 구성부(10,20,30)에는 해당되는 구성부(10,20,30)를 독립적으로 제어할 수 있도록 각각 개별 CPU(14,24,34)가 설치되어 개별 CPU(14)는 다른 개별 CPU(24,34)에 영향을 받지 않고 정류부(10)를 제어한다.Each of these three important components 10, 20, 30 is provided with individual CPUs 14, 24, 34 so as to control the corresponding components 10, 20, 30 independently. Controls the rectifier 10 without being affected by other individual CPUs 24 and 34.

마찬가지로, 개별 CPU(24)는 다른 개별 CPU(14,34)에 영향을 받지 않고 인버터(20)를 제어하고 개별 CPU(34)는 다른 개별 CPU(14,24)에 영향을 받지 않고 모니터(30)를 제어한다.Similarly, individual CPUs 24 control inverter 20 unaffected by other individual CPUs 14,34 and individual CPUs 34 monitor 30 without being affected by other individual CPUs 14,24. ).

즉, 본 발명에 따른 유피에스에 있어서 중요 구성부의 제어 방법은 유피에스를 구성하는 정류부(10), 인버터(20) 및 모니터(30)에 각각 개별 CPU(14,24,34)가 설치되어 상기 개별 CPU(14,24,34)가 정류부(10), 인버터(20) 및 모니터(30)를 각각 독립적으로 분산 제어함을 특징으로 하는 것이다.That is, in the method according to the present invention, the control method of the important components is provided with a separate CPU (14, 24, 34) are respectively installed in the rectifier 10, the inverter 20 and the monitor 30 constituting the UPS. Individual CPUs 14, 24, and 34 are each distributed control of the rectifier 10, inverter 20 and the monitor 30 independently.

이때 각 구성부(10,20,30) 간의 연결은 RS-485 멀티-드롭(Multi-Drop) 방식으로 이루어져 데이터 통신은 디지털의 RS-485 직렬통신 방법으로 행해진다.At this time, the connection between the components 10, 20, 30 is made in the RS-485 multi-drop (Multi-Drop) method, the data communication is performed by the digital RS-485 serial communication method.

이와 같이 구성하면, 모니터(30)의 개별 CPU(34)가 고장이 나서 화면에 유피에스의 동작 상태가 디스플레이 되지 않더라도 인버터(20)와 정류부(10)는 계속 운전이 가능하여 무정전 전원 공급이라는 유피에스 역할을 계속 수행할 수 있는 것이고, 정류부(10)의 개별 CPU(14)가 고장이 나서 교류가 직류로 변환되지 않으면 인버터(20)는 별도의 축전지로부터 직류 전력을 받아 동작을 계속하면서 구성부(10,20,30) 상호 간에 통신이 가능하여 고장 상태가 즉시 화면에 나타나 유피에스 상태를 확인할 수 있는 것이며 그에 따른 조치를 신속히 취할 수 있는 것이다.In such a configuration, even if the individual CPU 34 of the monitor 30 fails and the operation state of the UE is not displayed on the screen, the inverter 20 and the rectifier 10 can continue to operate and thus provide an uninterruptible power supply. If the AC is not converted to direct current because the individual CPU 14 of the rectifier 10 fails, the inverter 20 receives DC power from a separate battery and continues operation. (10,20,30) It is possible to communicate with each other, so that the fault condition can be immediately displayed on the screen, so that the user can check the state of the UE, and the action can be taken promptly.

마찬가지로 인버터(20)의 개별 CPU(24)가 고장이 나서 직류가 교류로 변환되지 않으면 바이패스(BYPASS) 모드로 절체되어 입력측 상용전원이 출력측으로 직송(BYPASS)되도록 하고 구성부(10,20,30) 상호간에 통신이 가능하여 고장상태 확인 및 관련 조치를 취할 수 있게 되는 것이다.Similarly, if the individual CPU 24 of the inverter 20 fails and the direct current is not converted to alternating current, it is switched to the bypass mode to allow the input commercial power to be sent directly to the output. 30) It is possible to communicate with each other to check the fault condition and take relevant measures.

이상에서 살펴본 바와 같이 본 발명은 순시에 간단(間斷)없이 전력을 자동으로 공급하는 유피에스(UPS)를 구성하는 중요 구성부인 정류부, 인버터 및 모니터에 각각 개별적인 중앙처리장치(CPU)가 설치되어 독립적으로 제어를 담당함으로써 한 CPU가 고장시에도 다른 구성부는 계속 운전이 가능하고 각 구성부 간에 데이터 통신이 원활히 이루어지는 유용한 발명인 것이다.As described above, the present invention is independently provided with a separate central processing unit (CPU) installed in each of the rectifying unit, the inverter, and the monitor, which are important components constituting the UPS (UPS) which automatically and automatically supplies power without any instantaneous power. In this case, it is a useful invention that other components can continue to operate even when one CPU fails and data communication is smoothly performed between the components.

Claims (2)

유피에스를 구성하는 정류부(10), 인버터(20) 및 모니터(30)에 각각 개별 CPU(14,24,34)가 설치되어, 상기 개별 CPU(14,24,34)가 정류부(10), 인버터(20) 및 모니터(30)를 각각 독립적으로 분산 제어함을 특징으로 하는 유피에스에 있어서 제어방법.Individual CPUs 14, 24, and 34 are installed in the rectifier 10, the inverter 20, and the monitor 30 constituting the UPS, respectively, and the individual CPUs 14, 24, and 34 are provided in the rectifier 10, In the control method of the UPS, characterized in that the inverter 20 and the monitor (30) are independently distributed control. 정류부(10)를 독립적으로 제어하는 개별 CPU(14)와 인버터(20)를 독립적으로 제어하는 개별 CPU(24)와 모니터(30)를 개별적으로 제어하는 개별 CPU(36)로 구성되고, 상기 정류부(10)와 인버터(20) 및 모니터(30) 사이에 데이터 통신은 RS-485 멀티-드롭 방식으로 연결됨을 특징으로 하는 유피에스에 있어서 제어시스템.It consists of an individual CPU 14 for independently controlling the rectifier 10, an individual CPU 24 for independently controlling the inverter 20, and an individual CPU 36 for individually controlling the monitor 30. The control system of the UPS, characterized in that the data communication between the inverter (10) and the inverter (20) and the monitor (30) is connected in an RS-485 multi-drop manner.
KR1019990026339A 1999-07-01 1999-07-01 Control method and system in ups KR20010008472A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
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KR100660353B1 (en) * 2004-12-10 2006-12-21 주식회사 맥스컴 CPU expansion output port protective circuit by password signal law
KR100807263B1 (en) * 2006-06-16 2008-02-28 주식회사 씨피에스 Sensing rectification system of error generation

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JPH08237885A (en) * 1995-02-27 1996-09-13 Shin Kobe Electric Mach Co Ltd A.c. uninterruptible power supply
JPH1014129A (en) * 1996-06-17 1998-01-16 Nippon Signal Co Ltd:The Backup device of memory power source
JPH10257661A (en) * 1996-12-03 1998-09-25 Toshiba Corp Monitoring control system and storage recording program for executing the same

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08237885A (en) * 1995-02-27 1996-09-13 Shin Kobe Electric Mach Co Ltd A.c. uninterruptible power supply
JPH1014129A (en) * 1996-06-17 1998-01-16 Nippon Signal Co Ltd:The Backup device of memory power source
JPH10257661A (en) * 1996-12-03 1998-09-25 Toshiba Corp Monitoring control system and storage recording program for executing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100660353B1 (en) * 2004-12-10 2006-12-21 주식회사 맥스컴 CPU expansion output port protective circuit by password signal law
KR100807263B1 (en) * 2006-06-16 2008-02-28 주식회사 씨피에스 Sensing rectification system of error generation

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