KR20010007527A - Method of silicide formation in a semiconductor device and processor readable storage medium using the same - Google Patents

Abstract

PURPOSE: A method for forming a silicide within a semiconductor device and a processor reading storage medium using the same are provided to form a silicide layer contacted with a silicon substrate. CONSTITUTION: A silicon substrate is provided into a chamber.(502) An interlayer metal silicide layer is formed on the silicon substrate.(504) A precursor including a metal is provided to form a metal layer on the silicon substrate.(506) A precursor including a silicon is provided to form a metal silicide on the silicon substrate.(508) A proper precursor is provided to form the metal silicide contacted with the silicon substrate.(510) A conductive layer is formed on the interlayer metal silicide layer.(512)

Description

FIELD OF THE INVENTION A method of forming silicide in a semiconductor device, and a processor-readable storage medium using the same.

The present invention relates to a method of forming a silicide in a semiconductor device, and more particularly, to a method of forming a silicide layer in contact with a silicon substrate.

In the manufacture of integrated circuits, intermediate or transition layers are often used as metal barrier films to prevent metal from diffusing into the underlying region under the barrier layer and / or to improve the adhesion of the resulting layer. Such base regions include transistor gates, capacitor insulators, semiconductor substrates, metal lines, and many other structures represented in integrated circuits.

For example, when an electrode is being formed for the gate of a transistor, a diffusion barrier is often formed that contacts the gate electrode between the gate material and the metal. The diffusion barrier prevents the diffusion of metal into the gate material, which may be composed of polysilicon. Such metal diffusion is undesirable to alter the characteristics of the transistor or render it inoperable. For example, a combination of titanium / titanium nitride (Ti / TiN) is commonly used as the diffusion barrier.

Such barrier stacks are also used in tungsten metallization processes to provide contact with the source and drain of transistors. The baler stack prevents undesirable metal diffusion between the tungsten plug and the underlying silicon (Si) substrate. For example, a Ti layer is typically deposited over the contact area of the Si substrate, after which the Ti layer is converted to an intermediate titanium silicide (TiSix) layer, providing lower resistive contact with Si. For example, when Ti deposition is performed using plasma enhanced chemical vapor deposition (PECVD) at a temperature between 550-700 ° C., a reaction between the Ti film and the underlying silicon substrate occurs. As a result, titanium silicide (TiSix) is formed on the silicon substrate. Alternatively, if the Ti film is deposited using physical vapor deposition (PVD), the TiSix layer at the bottom of the contact may be formed in a separate rapid thermal (RTP) process prior to subsequent film processing. A TiN layer is then formed over the TiSix layer, followed by a tungsten (W) plug. In addition to being a barrier layer, the TiN layer serves two functions. It acts as a glue layer to 1) prevent chemical attack of TiSix by tungsten hexafluoride during W deposition, and 2) improve adhesion of the W plug.

Currently, integrated circuit devices have a characteristic size range of about 0.25 microns (μm). As the size of next-generation semiconductor devices progress in the sub 0.25 micron and sub-0.18 micron ranges, the devices will have relatively narrower junctions or trenches on the same substrate. In particular, part of the Si substrate must be sacrificed as the Si source for the intermediate TiSix layer to be formed. If the thickness of available Si decreases, the electrical properties of the substrate will degrade due to Si consumption and the devices formed on the substrate will be substandard or unusable.

Accordingly, there is a need in the art for alternative methods of forming silicide layers without involving substrate quality or device characteristics.

The present invention provides a method of forming a silicide layer in contact with a silicon substrate. The method includes forming a metal containing layer on a Si substrate, and exposing the metal containing layer to a silicon containing source different from the silicon substrate. The metal containing layer reacts with the silicon containing source to form a metal silicide layer having silicon mainly generated from the silicon containing source.

1 is a schematic diagram of an apparatus that may be used to practice an embodiment of the invention.

2 is a schematic cross-sectional view of a substrate structure at different stages of processing in accordance with one embodiment of the present invention.

3A-C are schematic cross-sectional views of a substrate structure at different stages of processing in accordance with another embodiment of the present invention.

4A-H are schematic cross-sectional views of a substrate structure at different stages of processing in accordance with another embodiment of the present invention.

5 illustrates a process sequence including silicide formation in accordance with an embodiment of the present invention.

Explanation of Signs of Major Parts of Drawings

100 chamber 106 power

110 Controller Unit 120 Showerhead

130 gas panel 150 pedestal

170 heater element 172 temperature sensor

190 wafers 200 substrates

The present invention generally provides a method of forming silicide contacts with improved device safety. According to the invention, a layer comprising silicon (Si), which may be an intermediate layer in a multilayer metallization structure, is formed on a substrate or silicon containing layer without consuming silicon (Si) from the base layer. In particular, the method includes forming a silicide layer comprising Si and a refractory metal on the substrate interface using an alternative Si-based source other than the underlying silicon containing layer or substrate. In one embodiment, titanium silicide (TiSix) is formed on a silicon substrate. In contrast to the prior art for silicide formation, the present invention can form TiSix without consuming a significant amount of Si from the substrate. The present invention is applicable to silicide formation, source or drain of transistors, or contact formation for polysilicon gate electrodes during various stages of integrated circuit fabrication.

Wafer processing system

1 is a schematic wafer processing system 10 that may be used to practice an embodiment of the present invention. System 10 includes a control unit 110, and a vacuum pump 102 along with other hardware components, such as processing chamber 100, gas panel 130, power source 106. One example of the processing chamber 100 is a chemical vapor deposition (CVD) chamber, described in Application No. 09 / 211,998 filed December 14, 1998 under the name “High Temperature Chemical Vapor Deposition Chamber”. . Some key features of the system 10 are briefly described below.

Chamber (100)

The processing chamber 100 generally includes a support pedestal 150 used to support a substrate, such as a semiconductor wafer 190 within the processing chamber 100. This pedestal 150 can be moved in the vertical direction in the chamber 100, in particular using a placement mechanism (not shown). Depending on the particular process, the wafer substrate 190 must be heated to some required temperature before being processed. In the chamber 100 shown, the wafer support pedestal 150 is heated by an embedded heater 170. For example, pedestal 150 may be resistively heated by applying a current to heater element 170 from AC power source 106. Thereafter, the wafer 190 may be heated by the pedestal 150 and maintained at a process temperature range of, for example, 450 to 750 ° C. A temperature sensor 172, such as a thermocouple, is also embedded in the wafer support pedestal 150 to monitor the temperature of the pedestal 150 in a conventional manner. For example, the measured temperature may be used in the feedback loop to control the power supply 106 for the heating element 170 as the wafer temperature may be controlled or maintained at the required temperature appropriate for the particular process application.

Proper control and regulation of the gas flow rate through the gas panel 130 is performed by a controller unit 110 such as a mass flow controller (not shown) and a computer. The showerhead 120 allows the process gas from the gas panel 130 to be uniformly distributed and introduced into the chamber 100. As shown, the control unit 110 includes a support circuit 114 that includes a central processing unit (CPU) 112, and a memory for storing associated control software 116. This control unit 110 is responsible for the automatic control of numerous steps required for wafer processing such as wafer transfer, gas flow control, temperature control and chamber discharge. Bidirectional communication between the control unit 110 and various components of the system 10 is through a number of signal cables, collectively referred to as a signal bus 118, a portion of which is shown in FIG. 1.

Vacuum pump 102 is used to evacuate process chamber 100 and maintain gas flow rate and pressure within chamber 100. The showerhead 120 into which the process gas is introduced into the chamber 100 is located above the wafer support pedestal 150. In some applications, the showerhead 120 is provided with two separate paths, or gas lines, which allow the two gases to be introduced separately without mixing into the chamber 100. For details of the dual gas showerhead 120, see US patent application Ser. No. 09 / 098,969 filed "Dual Gas Faceplate for Showerhead in a Semiconductor Wafer Processing System," filed June 16, 1998. It is published in the issue. This showerhead 120 is connected via a mass flow controller to a gas panel 130 that controls and supplies various gases used at different stages of the process sequence. During wafer processing, the purge gas supplier 104 provides a purge gas that is, for example, an inert gas around the bottom of the pedestal 150 to minimize the unnecessary deposition formed on the pedestal 150.

Silicide formation

2A-2C illustrate one embodiment of the present invention. In general, the substrate 200 is referred to as the material on which the film treatment is performed, and the substrate structure 250 is generally used to represent the substrate 200 along with another layer of material formed over the substrate 200. As used in the following description, the substrate 200 of FIGS. 2A-2C is generally referred to as a silicon containing layer or a substrate including, for example, a polysilicon layer (ie, a polysilicon gate electrode) or a silicon wafer. .

2A shows a cross-sectional view of a substrate structure 250 having, for example, a metal film 204 (the terms film and layer are used alternately) already formed on a silicon substrate 200. In this figure, the material layer 202 is conventionally formed and patterned oxide (ie, SiO ₂ ) to provide an opening 202H or contact holes that extend to the interface 200I of the substrate 200. It may be an insulating layer. The metal film 204 may generally be a refractory metal such as titanium (Ti), tantalum (Ta), or tungsten (W). In one embodiment, the metal film 204 is a Ti film and may be deposited over the substrate structure 250 by conventional Ti deposition processes such as plasma enhanced chemical vapor deposition (PECVD) or physical vapor deposition (PVD). In particular, the Ti film 204 is deposited to a thickness in the range of about 25 to 200 mm 3, preferably in the range of about 50 to about 100 mm 3. In one embodiment, for example, the thickness of the Ti film 204 is about 100 mm 3. However, this thickness may vary depending on the particular application and may be less than about 100 microns when the device is geometrically reduced.

The deposited Ti film 204 also includes a portion 204I that includes a portion of the substrate 200 at the interface 200I. As shown in FIG. 2A, due to the isometric nature of the deposited Ti film 204, the sidewalls 202S of the contact holes 202H are not applied by any Ti. The invention can also be practiced with conformal deposited Ti film 204. Although the Ti film deposition method is not critical to the practice of the present invention, the properties of the Ti film 204, ie the surface roughness, may influence the selection of the process conditions used in the dependent process steps.

After the Ti film 204 is formed, a silicide forming step is performed to convert a portion of the Ti film 204 into TiSix. In particular, in a preferred embodiment of the present invention, the Ti film 204 comprising a portion 204I at the interface 200I is a silane (SiH ₄ ), disilane (Si ₂ H ₆ ), Are exposed to a gaseous environment comprising precursor gas. The silicide forming step is particularly performed in the deposition chamber at a silicon-containing precursor flow rate in the range of about 20 to about 3000 sccm, in the range of about 0.5 to about 20 torr, and in the temperature range of about 500 to about 750 ° C., as used for Ti or TiN deposition. Can be. Among other things, inert gases such as argon (Ar), nitrogen (N ₂ ), helium (He) may be used alone or in combination with silicon-containing precursors. For example, for precursor gas (SiH ₆ ), preferred parameters are flow rates of less than about 3000 sccm, preferably from about 100 to about 2000 sccm, more preferably from about 500 sccm, and from about 0.5 to 20 torr, preferably Pressure of about 5 torr. The inert gas flow rate may vary depending on the partial pressure required for the silicon-containing precursor gas. Temperatures in the range of about 500 to about 750 ° C., preferably about 650 ° C., may be used. In general, the higher the temperature, the faster the reaction rate, but a lower process temperature may be necessary to account for thermal balance.

Depending on the process temperature, TiSix formation will occur in one or more steps. At temperatures above about 600 ° C., the TiSix layer 205 is formed in a single step from the reaction between the silicon-containing precursor gas and the portion 204I of the Ti layer 204, as shown in FIG. 2B. In this embodiment, when the silicon-containing precursor gas is introduced into the reaction chamber, a thermal reaction occurs between the Ti film 204 and the silicon-containing gas, whereby TiSix is formed. Process parameters are selected to enhance the reaction between the portion 204I of the Ti film 204 and the silicon-containing precursor gas, while minimizing possible reactions between the Ti film 204I and the silicon-containing layer or substrate at the bottom. For example, gas environments that include partial pressures or higher proportions of silicon-containing precursor gas, or lower substrate temperatures, tend to favor reactions between the Ti film 204 and silicon-containing gas. As such, the TiSix layer 205 includes silicon that arises primarily from the silicon containing precursor gas.

The thickness of the TiSix layer 205 is generally about 2.5 times the thickness of the Ti layer 204I. Of course, TiSix is also formed on other portions of the Ti film 204, as shown by the TiSix layer 207 located over the insulating layer 202. However, the present invention relates to the formation of a silicide layer in contact with a silicon-based material that may be degraded in the silicide formation step using prior art methods. According to the method of the present invention, the amount of Si introduced into the Ti portion 204I by the Si containing precursor gas at the interface 200I should be sufficient for the Ti portion 204I to be converted to TiSix. Although the Ti film 204 disposed over the insulating layer 202 is shown fully converted to the TiSix layer 207 in FIG. 2B, it is not required to practice the embodiment of the present invention. The TiSix layer 205 thus formed has the desired physical and electrical properties for use as an intermediate layer in a multilayer metallization stack. As such, the TiSix layer 205 is formed without depleting silicon from the base substrate 200.

In another embodiment, the intermediate TiSix layer 205 may be formed using a plasma process. For example, the plasma may be generated from a silicon containing precursor gas, optionally with one or more inert gases. Plasma may be generated using a plasma processing chamber that is variously available from a variety of power sources including, for example, radio frequency (RF), microwaves, among others. In this embodiment, the process temperature range may be about 300 to about 500 ° C., and the total pressure may be about 0.5 to 20 torr. The flow rate of the silicon-containing precursor gas may be less than about 3000 sccm, preferably about 100 to about 2000 sccm, more preferably about 100 sccm. Since the plasma process may be performed at a temperature lower than the temperature used in the thermal reaction, it is expected that the reaction between the Ti film 204 and the underlying silicon substrate 200 can be suppressed in advance.

After formation of the intermediate TiSix layer 205, the deposition process of the barrier layer, that is, the conductive layer, such as the refractory metal nitride film 206, may be continued, as shown in FIG. 2C. For example, the titanium nitride (TiN) film 206 may be formed by CVD using a reaction between titanium tetrachloride (TiCl ₄ ) and ammonia (NH ₃ ) in the chamber 100 of FIG. 1. As shown, an inert gas, such as helium (He) and nitrogen (N ₂ ), is introduced into the chamber 100 with TiCl ₄ through one path (gas line) of the showerhead 120. NH ₃ along with N ₂ is introduced into the chamber 100 through a second path of the showerhead 120. A bottom inert gas purge flow rate of about 2000 sccm is also established through the gas supply 104 and individual gas lines provided at the bottom of the chamber 100. In particular, the reaction may be carried out at a TiCl ₄ gas phase flow between about 5 to about 40 sccm and an N ₂ flow rate between about 500 to about 5000 sccm with an inert gas flow rate between about 500 to 5000 sccm. A total pressure between about 3 to about 30 torr and a pedestal temperature higher than about 450 ° C. (ie, a temperature between about 600 to 700 ° C.) may be used. Under these process conditions, the TiN film 206 exhibits step coverage of about 3.5: 1 (the aspect ratio defined by the ratio between the depth (d) and width (w) of the opening 202H where TiN deposition occurs).

In general, if another refractory metal silicide (ie, TaSix or WSix) is used as the intermediate silicide layer, the barrier layer 206 is preferably a corresponding metal nitride such as tantalum nitride or tungsten nitride. Using techniques known in the art, additional metal layers, such as aluminum or tungsten, are formed in subsequent metal deposition steps (not shown) of the IC fabrication sequence to provide metal connections to the silicon substrate 200 at the contact openings 202H. May be

As noted above, depending on the process temperature, silicide formation may also be achieved in a two step procedure if, for example, a silicon-containing precursor gas is introduced at a substrate temperature of less than about 600 ° C. This embodiment is shown in Figures 3A-3C.

FIG. 3A shows the same substrate structure as the structure shown in FIG. 2A, where the Ti film 204 is an insulating layer 202. A portion 204I of the Ti film 204 abuts the silicon substrate 200 at the interface 200I. According to this embodiment, the Si layer 302 is then formed over the structure of FIG. 3A by chemical vapor deposition using a Si containing precursor. For example, using pyrolysis of Si-containing gas (ie, SiH ₄ at 500 ° C.), the conformal Si layer 302 is formed by the side separation 202S of the contact hole 202H, as shown in FIG. 3B. As well as a portion 204I may be deposited over the Ti film 204.

Si layer 302 may be deposited from a SiH ₄ flow rate of less than about 3000 sccm, preferably from about 100 to about 2000 sccm, more preferably from about 500 sccm. SiH ₄ partial pressures between about 0.5 to about 20 torr, preferably about 5 torr, may be used. One or more inert gases (ie Ar, N ₂ or He, among others) may also be used with the SiH ₄ gas. The Si layer 302 is usually deposited to about twice the thickness of the Ti film portion 204I. For example, in a Ti film about 25 to about 200 microns thick, Si layer 302 is deposited to about 50 to about 400 microns thick. This Si: Ti ratio of about 2: 1 tends to ensure that the Ti film portion 204I is completely converted to TiSix in subsequent reactions.

In practicing the present invention, the Si layer 302 is amorphous in order to minimize the reaction of the Ti film portion 204I with the underlying Si substrate 200 while enhancing the subsequent reaction with the Ti film portion 204I. Is preferably. As such, the process parameter precursor gas is preferably selected to form amorphous Si. For example, a temperature between about 300 ° C. and about 600 ° C. may be used to deposit the amorphous Si layer 302 using a SiH ₄ precursor gas using process parameters known in the art. If Si ₂ H ₆ is used as the silicon-containing precursor gas, a temperature between about 200 and about 400 ° C. may be used. Alternatively, Si layer 302 may also be deposited from a plasma reaction using silicon containing precursor gas and process parameters known in the art. Also, among other things, different plasma sources, such as RF, remote plasma, ECR, may be used to practice the present invention.

As shown in FIG. 3C, a subsequent step is performed to initiate a reaction between the Si layer 302 and the Ti film 204, whereby a TiSix layer 305 is formed. For example, this reaction step can be performed by heating the substrate structure of FIG. 3B to a temperature of about 600 ° C. or higher. In accordance with the present invention, all portions 204I of the Ti film 204 are preferably converted to TiSix layer 305 in contact with the interface 200I of the underlying silicon substrate 200. Depending on the thickness of the Ti film 204 and the particular Ti deposition process, a complete conversion from Ti to TiSix may or may not occur in another portion of the Ti film 204 that contacts the layer 202 outside of the contact hole 202H. have. As mentioned above, this invention relates to the method of forming the silicide layer which contact | connects a Si containing layer. As such, the process parameters are adjusted with a two-step procedure for complete conversion of the portion of the Ti film 204, ie, the portion 204I, in contact with the Si containing layer. As noted above, the Si layer 302 is preferably amorphous, and the reaction rate between the Si layer 302 and the Ti film portion 204I will be higher as compared between the Ti film portion 204I and the Si substrate 200. . If the Si substrate 200 comprises polysilicon (instead of single crystal silicon), it can also be expected that a portion of the Ti film 204I reacts with the Si layer 302. As such, the silicide layer 305 can be formed from the bottom side Si substrate 200 without depleting Si.

Subsequent processing may continue with the formation of a barrier layer, such as TiN, on a conductive layer (not shown), ie, TiSix layer 305, using the process previously described with FIG. 2C. An additional metallization step may be performed to provide a metal connection to the Si substrate 200 at the contact opening 202H. As shown in FIG. 3C, part of the Si layer 302 will not react at the sidewall 202S of the contact opening 202H, but will not significantly affect the performance of the metal connection.

4A-4H illustrate alternative embodiments of the invention wherein TiSix (or metal silicides such as refractory metal silicides) is formed by reaction between chemisorption Ti containing species and Si containing precursors. In this embodiment, after patterning the insulating layer 202 to form the contact holes 202H extending to the silicon substrate 200, along the sidewalls 202S and the underside 202B of the contact holes 202H and Including the surface of the insulating layer 202 in the silicon substrate 200, Ti-containing species are chemisorbed or absorbed onto the substrate structure. This can be accomplished, for example, by exposing the substrate structure to a Ti containing precursor such as TiCl ₄ . For example, a TiCl ₄ flow rate of about 50 to about 1000 mg / min, preferably about 50 mg / min, and a pressure of about 0.5 to about 20 torr may be used. Among other things, inert gases such as nitrogen, argon, and helium are used as the carrier gas for introducing TiCl ₄ into the chamber. While the temperature of the silicon substrate 200 is preferably maintained at about 450 ° C., a temperature range of about 400 ° C. to about 700 ° C. is also possible.

The substrate structure is exposed to the TiCl ₄ flow for a long enough time such that the surface of the silicon substrate 200 is saturated with a monolayer of TiCl ₄ , or more generally Ti containing species such as TiCly distribution, where y is 0-4. TiCl, TiCl ₂ , TiCl ₃ are also referred to as subchlorides. If necessary, a reactive gas such as hydrogen, which can react or be extracted with chlorine 롸, may be introduced into the substrate together with TiCl ₄ to enhance the absorption of the subchloride titanium. The H ₂ flow rate is maintained at about 500 to about 5000 sccm, preferably about 1000 sccm. Subchloride formation is also preferred by using higher substrate temperatures. Accordingly, the thin chemisorption layer 402 including TiCly is formed to substantially apply the exposed portion (interface portion 202I) of the silicon substrate 200, as shown in FIG. 4A.

The purge step (not shown) is performed using Ar at a flow rate of about 3000 sccm and a pressure of about 5 Torr. The purge is performed to remove the residual gas phase Ti containing precursor (ie TiCl _{4 which} is not chemisorbed on any surface) for a sufficiently long time, ie about 10 seconds. Among other things, other inert gases such as He or N ₂ are also suitable. Generally, a flow rate of about 1000 to about 10000 sccm and a pressure of about 2 to about 20 torr may be used. Depending on the specific chamber volume and conditions, the purge time may vary. It is necessary to select a purge gas flow rate high enough to obtain a suitable purge in a relatively short time period. In one embodiment, a purge time of about 10 seconds is used.

After the purge step, the substrate structure 450 with the chemisorption layer 402 of TiCly is exposed to the Si containing environment 420 as shown in FIG. 4B. The Si containing environment 420 includes, among other things, Si containing precursors such as SiH ₄ , Si ₂ H ₆ , dichlorosilane (SiCl ₂ H ₂ ). For example, a SiH ₄ flow rate of about 100 to about 5000 sccm, preferably 100 sccm, and a pressure of about 0.5 to about 20 torr, preferably about 5 torr may be used. In addition, one or more inert gases may be present with the Si containing precursor in the Si containing environment 410. At a temperature of about 450 ° C., or a temperature range of about 400 ° C. to about 700 ° C., a reaction between the TiCly chemisorption layer 410 and SiH ₄ occurs, conforming to the insulating layer 202, as shown in FIG. 4C. TiSix layer 404, contact holes 202H, and Si substrate 200 are formed. This conformal TiSix layer 404 is in particular a thin layer, the thickness of which is limited by the thickness of the adsorbed TiClx layer 402. In the Si containing environment 420, the Si containing precursor flow must be sufficient to saturate the substrate surface, or at least a portion of the TiClx layer 402 formed over the interface 200I of the silicon substrate 200 must fully react. do. At a temperature of about 450 ° C., the reaction proceeds at a rate of less than about 1 Pa per cycle, ie 0.4 Pa / cycle. By appropriately controlling the process parameters, i.e., SiH ₄ pressure, flow rate and temperature, the TiSix layer 404 can be formed in contact with the interface 200I of the Si substrate 200 without depleting a significant amount of Si from the substrate 200. It may be. In particular, due to the higher partial pressure or flow rate and lower temperature of the Si containing precursor, the reaction between the TiClx adsorbed with the Si containing precursor is preferred in contrast to the reaction with the Si substrate 200. Alternatively, activated Si containing precursors, such as those generated by using a relatively low power plasma, may also be used.

After forming the TiSix layer 404, the purge step (not shown in FIG. 4) again decomposes to remove the remaining Si-containing precursor from the chamber. Purge gas flow rate and pressure conditions are similar to those used to purge Ti containing precursors.

To obtain a synthetic TiSix layer of desired thickness, TiCly chemisorption, chamber purge, SiH ₄ gas exposure, and chamber purge steps may be repeated as necessary. For example, by repeating about 200 to about 500 cycles, a synthetic TiSix layer may be formed for contacting applications.

In another aspect of the invention, a catalyst may be introduced to obtain the necessary membrane properties during the process sequence. For example, after introduction of the first precursor (TiCl ₄ ) to form an adsorbed TiCly layer, a catalyst, such as a Zn containing precursor, may be introduced into the chamber. Zn-containing precursors may be used to remove chlorine (Cl) from the adsorbed TiCly layer, so that subchlorides enhance formation. After the chamber is purged with a catalyst, a second precursor, such as SiH ₄ , may be introduced and react with the subchloride to form a silicide layer as described above. Since SiH ₄ reacts more easily with sub-chlorides than TiCl ₄ , a lower substrate temperature can be used for TiSix formation due to the Zn-containing catalyst, so that in contrast to Si substrate 200, the reaction with SiH ₄ Is preferred.

In another aspect of the present invention, other compounds including Ti and Si, except TiSix, may be used to form the silicide layer. For example, a ternary compound comprising Ti, Si and nitrogen (N) may be formed by adding the N-containing precursor to the process sequence described above. In one embodiment, the Ti containing species may be adsorbed onto the substrate surface, as shown in FIG. 4A. The chamber is then purged and a second precursor, ie, Si containing species, is introduced into the chamber similar to that shown in FIG. 4B. The reaction between the Ti containing layer and the Si containing species forms a TiSix layer 404, and more generally, a reaction product layer is formed, similar to that shown in FIG. 4C.

After purging the chamber, a third precursor, i.e., nitrogen (N) containing species, is introduced into the chamber. 4D shows the TiSix layer 404 exposed to the N containing environment 422, which may contain other gases, such as inert gases, except for the N containing species. As shown in FIG. 4E, the reaction between the TiSix layer 404 and the N-containing species forms a layer 406 comprising a ternary compound such as TiSixNz. Although each element of the ternary compound may be introduced by a separate precursor, in some cases it is possible for a single precursor to supply more than one element to form the desired compound.

In general, various precursor types may be introduced in different orders within the process sequence. In particular, the order in which the precursors are introduced in the process or reaction sequence is chosen to optimize the required reactants in consideration of factors such as the adsorption properties or reaction rates of the intermediate species or precursors formed during the reaction sequence.

After forming the TiSix layer 404, more generally, after forming the metal silicide layer 406 (including the non-binary compound as shown in FIG. 4E), the formation of the multilayer metallization stack is completed. Subsequent process steps may be performed to accomplish this. 4F, for example, illustrates the formation of conductive layer 408 over metal silicide layer 406. Depending on the particular application, the conductive layer 408 may be a nitride layer (TiN) or may be a refractory metal nitride having suitable barrier properties. For example, TiN layer 408 may be formed by thermal or plasma CVD using a reaction between titanium tetrachloride (TiCl ₄ ) and ammonia (NH ₃ ) using process parameters known in the art.

Alternatively, conductive layer 408 may be formed from a suitable precursor using process steps similar to those described in FIGS. 4A-4E. For example, if the conductive layer 408 is TiN, TiClx may be adsorbed or chemisorbed on the metal silicide layer 406 by providing TiCl ₄ with process parameters similar to those described above. After purging excess TiCl ₄ from the chamber, the adsorbed or chemisorbed TiClx reacts with NH ₃ , which is introduced at a flow rate of about 100 to about 3000 sccm. This allows a thin TiN layer to be formed in the opening 202H with excellent step coverage. Additional cycles (of adsorption and reaction with appropriate purge) are performed to form thicker synthetic TiN layers, if necessary. Alternatively, the TiN layer 408 may be formed in a combination of adsorption reaction schemes with CVD TiN.

In another embodiment, the conductive layer 408 is a mixed layer, such as, for example, a linear / barrier layer comprising, among other things, refractory metals such as Ti, TiN, tantalum (Ta), tantalum nitride (TaN) and metal nitrides. It may be.

Thereafter, a metal layer 410 is formed over the conductive layer 408 as shown in FIG. 4G. For example, the metal layer 410 may comprise tungsten (W) or aluminum (Al). As shown, a CVD reaction between tungsten hexafluoride (WF ₆ ) and hydrogen (H ₂ ) may be used to form the tungsten metal layer 410 with process parameters known in the art. In a subsequent step, a portion of the metal layer 410, the conductive nitride layer 408 and the metal silicide layer 406 outside the contact hole 202H are removed by a planarization technique such as chemical mechanical polishing, as shown in FIG. 4H. As shown, a metal plug structure 415 is generated. It should be noted that the specific metallization process steps or sequences described are for illustration only. Other process sequences using different material layers or processing techniques may also be used in silicide formation in accordance with embodiments of the present invention.

5 shows a process sequence 500 that includes the various steps of the present invention to form an intermediate silicide layer without substrate degradation. This processing step may be performed in a typical CVD or PVD chamber similar to that used for Ti or TiN deposition. As shown in step 502, a Si containing substrate (or Si based layer) is provided in the process chamber. Depending on the particular stage of the IC process, the Si containing substrate may or may not have a layer of material already deposited on the substrate. This material layer may be, for example, an oxide layer having contact holes extending to the interface of the Si based substrate (thus exposing a portion of the Si based substrate). The present invention relates to the formation of a silicide layer in contact with a Si-containing substrate.

In step 504, an intermediate silicide layer, ie a metal silicide layer, is formed in contact with the Si containing substrate. According to embodiments of the present invention, this silicide formation may be achieved by different ways using various precursors.

In step 506, a conductive layer is first formed over the Si containing substrate. For example, this conductive layer may be another refractory metal formed from a suitable metal containing precursor or a metal layer such as Ti. In step 508, a Si containing source or precursor is provided to react with the deposited metal of step 506 to form an intermediate silicide layer. This intermediate layer is, for example, a TiSix layer formed from a technique selected from one of the following techniques. That is, a technique of exposing the Ti layer to an ambient around Si (ie, SiH ₄ , Si ₂ H ₆ ); Solid-solid reaction technology between the deposited Ti layer (ie, amorphous or polysilicon) Si layer and deposited Ti from a Si containing precursor such as SiH ₄ , Si ₂ H ₆ ; admit. Alternatively, other suitable precursors may be used, among other things, to form an intermediate metal silicide layer, such as tantalum silicide, tungsten silicide.

Alternatively, as shown in step 510, the intermediate metal silicide layer of step 504 may be formed from a suitable precursor, ie, a (thermal or plasma shaped) reaction between the metal halide compound and the silicon containing gas. . In the case of TiSix layers, precursors such as TiCl ₄ and SiH ₄ may be used. According to one embodiment of the invention, the first precursor is adsorbed onto the Si containing substrate as a single layer or a thin layer. The adsorbed first layer is then exposed to a second precursor to form a silicide layer. Optionally, the formation of the silicide layer may be modified by introducing a catalyst to facilitate the desired reaction or by adding a third precursor for further reaction (not shown in FIG. 5).

In accordance with an embodiment of the present invention, conditions for various silicide formation treatments are selected such that the metal silicide layer is primarily formed from reactions involving Si containing sources or precursors different from the Si containing substrate. As such, the metal silicide layer is formed of silicon essentially generated from the Si containing source, and is also consumed in a negligible or small amount of Si from the bottom substrate.

In step 512, a conductive layer is formed over the intermediate metal silicide layer formed in step 504 by providing a suitable precursor to the substrate in the chamber. Such a conductive layer may be a metal nitride (TiN) used as a barrier layer or a linear / barrier layer combined in a metallization stack. Thus, further processing steps (not shown) may be performed to deposit another suitable conductive metal (W, Al) over the conductive barrier layer to enable subsequent formation of conductive paths or wiring in the semiconductor device.

Thus, by providing an external Si-containing source, embodiments of the present invention allow the silicide layer to be formed in contact with the Si-containing substrate, without unnecessary waste of the underlying Si-containing substrate material. As such, the present invention provides a method for forming silicide in a semiconductor device having improved stability and performance characteristics.

While various preferred embodiments, including the teachings of the present invention, have been shown and described in detail, those skilled in the art may modify several embodiments that still incorporate the teachings of the present invention.

By providing an external Si containing source, embodiments of the present invention allow the silicide layer to be formed in contact with the Si containing substrate and there is no unnecessary consumption of the underlying Si containing substrate material. As such, the present invention provides a method for forming silicide in a semiconductor device having improved stability and performance characteristics.

Claims (21)

As a method of forming a silicide layer in contact with a silicon substrate, (a) forming a metal containing layer in contact with the silicon substrate; (b) exposing the metal containing layer to a different silicon containing source than the silicon substrate; And (c) reacting the metal containing layer with the silicon containing source to form a metal silicide layer that occurs primarily from the silicon containing source. The method of claim 1, wherein the metal-containing layer of step (a) is an adsorption layer formed by exposing the silicon substrate to a metal-containing precursor. The method of claim 2, (a1) performing the steps (a and b) in a chamber; And (a2) further comprising purging the chamber between steps (a) and (b). 4. The method of claim 3 wherein the metal containing precursor is TiCl ₄ . 4. The method of claim 3, wherein said silicon containing source of step (b) is selected from the group comprising silane, disilane, and dicrolosilane. The method of claim 3, wherein (d) after step (c), purging the chamber; (e) forming another adsorbing metal containing layer by exposing the previously formed metal silicide layer to the metal containing precursor in the chamber; (f) after step (e), purging the chamber; (g) forming another metal silicide layer on the previously formed metal silicide layer by exposing the another adsorption metal containing layer to a silicide containing environment; And (h) repeating steps (d) to (g) for additional cycles to form a composite metal silicide layer having a desired overall thickness. The method of claim 3, wherein (a2) after the purge step (a1), exposing the metal containing layer to a precursor comprising a catalyst for the metal silicide formation step (c); And (a3) further comprising purging the chamber between steps (a2) and (b). The method of claim 3, wherein (d) after step (c), purging the chamber; And (e) forming a layer comprising ternary metal silicide by exposing the metal silicide layer of step (c) to a nitrogen containing environment. The method of claim 4, wherein the adsorption layer is formed of TiCl ₄ at a flow rate of about 50 to about 1000 mg / min. 5. The method of claim 4, wherein step (c) is performed with the silicon containing source at a flow rate less than about 5000 sccm. 5. The method of claim 4, wherein step (c) is performed at a partial pressure of said silicon containing source between about 0.5 to about 20 torr. 5. The method of claim 4, wherein step (c) is performed at a temperature between about 400 and about 700 ° C. The method of claim 2, (d) forming a conductive layer of metal nitride on the metal silicide layer. The method of claim 1 wherein the metal containing layer is a metal layer. 15. The method of claim 14, wherein the metal layer is a refractory metal selected from the group consisting of titanium, tantalum, tungsten. 15. The method of claim 14, wherein the silicon containing source is selected from the group consisting of silane, disilane, dichlorosilane. 15. The method of claim 14, wherein the silicon containing source is an amorphous silicon layer formed over the metal containing layer. 18. The method of claim 17, wherein the amorphous silicon layer is formed by pyrolyzing silane (SiH ₄ ). A processor readable storage medium comprising the processor readable code for controlling a processing chamber to perform a method of forming a silicide layer in contact with a silicon substrate when code is executed, the method comprising: (a) forming a metal containing layer in contact with the silicon substrate; (b) exposing the metal containing layer to a different silicon containing source than the silicon substrate; And (c) reacting the metal containing layer with the silicon containing source to form a metal silicide layer that occurs predominantly from the silicon containing source. 20. The processor readable storage medium of claim 19, wherein said metal-containing layer of step (a) is an adsorption layer formed by exposing said silicon substrate to a metal-containing precursor. 20. The processor readable storage of claim 19, wherein the metal containing layer is selected from the group consisting of titanium, tantalum, and tungsten, and the silicon containing source is selected from the group consisting of silane, disilane, and dichlorosilane. media.