KR20010004100A - Plasma display panel capable of preventing brightness lowering in sustain period - Google Patents

Abstract

PURPOSE: A plasma display panel capable of preventing the deterioration of the brightness during a sustain period is provided to prevent the brightness of a discharge cell from being deteriorated due to a voltage applied to an address electrode during the sustain period. CONSTITUTION: A first bus electrode(32A) for a scan is formed on a first transparent electrode. A second bus electrode(32B) for a scan and sustain is formed on a second transparent electrode. An address electrode(41) has a protruded portion(A) which overlaps with the second bus electrode(32B). The address electrode(41) overlaps with the second electrode(32B) and don't overlap with the first electrode(32A). During the sustain period, only one side portion of a cell is affected by an electric field due to a voltage applied to the address electrode(41). A discharge path of electrons extend as far as an upper limit of a front panel. Accordingly, the number of times of an impact of electrons increase so that an amount of an ultraviolet ray increases and the brightness becomes higher.

Description

Plasma display panel that can prevent the deterioration of brightness during the maintenance section {PLASMA DISPLAY PANEL CAPABLE OF PREVENTING BRIGHTNESS LOWERING IN SUSTAIN PERIOD}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a plasma display panel capable of preventing a decrease in luminance of discharge cells due to a voltage applied to an address electrode in a sustain period.

Plasma display panels (hereinafter referred to as PDPs) are devices that display characters or graphics using light emitted from plasma generated during gas discharge. PDP has the advantage of being most suitable for large-scaled display among various flat panel display devices such as liquid crystal display (LCD), field emission display (FED), and electroluminescence display (ELD) which are being actively studied.

That is, the plasma display panel can be enlarged to 40 "or more, and CRT level colorization is possible because the ultraviolet light generated by the discharge uses a photoluminescence mechanism that emits visible light by stimulating the fluorescent film. As a self-emissive display, it has many unique advantages not found in other flat panel devices, such as a wide viewing angle of more than 160 °. BACKGROUND ART As a large display device for a multimedia, it is considered to be prominent, and interest in this has recently increased.

PDP uses two glass substrates with a thickness of 3 mm to apply an appropriate electrode and phosphor on each substrate, and forms plasma in the space therebetween while maintaining the distance between the two substrates at about 0.1 mm to 0.2 mm. Since the method is adopted, the size of the flat plate can be increased.

In addition, in the PDP, the gas discharge has a strong non-linearity in which discharge does not occur even when a voltage is applied between electrodes, and a super large panel having a memory function that is essential for driving a large display. Even in this case, a high quality image can be expressed without deteriorating the luminance.

Plasma display panels have a direct current (DC type) in which the electrode for generating plasma is directly exposed to the plasma so that conduction current flows directly through the electrode, and the electrode is covered with a dielectric and is not directly exposed. ) Is divided into the alternating current type (AC type).

FIG. 1A is a plan view illustrating the alignment of the transparent electrode 11, the bus electrode 12, the address electrode 21, and the partition wall 22 of the conventional plasma display panel.

In the conventional AC type PDP back plate 20, the address electrodes 21 are formed in a stripe form between the partition walls 22. The address electrode 21 formed as described above overlaps the two bus electrodes of the front plate and addresses the scan electrode of the two bus electrodes 12 of the front plate in an address section. A sustain voltage is applied to the address electrode 21 to protect the phosphor by preventing cations generated during discharge from colliding with the address electrode.

FIG. 1B is a cross-sectional view of a conventional plasma display panel structure in which an electric field E is formed as a voltage is applied to an address electrode during a sustain period.

When voltage is applied to the address electrode in the sustain period, electrons are limited to the front plate 10 so that the discharge path B of the electrons is small, the amount of electrons generated during discharge is small, and thus the amount of UV generated is small. There is a problem that the brightness is lowered. Reference numeral 13 in FIG. 1B denotes a transparent dielectric layer.

The present invention has been made to solve the above problems is to provide a plasma display panel that can prevent the brightness of the discharge cell is lowered due to the voltage applied to the address electrode during the sustain period.

FIG. 1A is a plan view showing alignment states of a transparent electrode, a bus electrode, an address electrode, and a partition of a conventional plasma display panel; FIG.

FIG. 1B is a cross-sectional view showing an electric field form with a voltage applied to an address electrode in a conventional plasma display panel structure; FIG.

FIG. 2A is a plan view showing alignment states of a transparent electrode, a bus electrode, an address electrode, and a partition wall of a plasma display panel according to a first embodiment of the present invention; FIG.

FIG. 2B is a cross-sectional view showing an electric field form with a voltage applied to an address electrode in the plasma display panel structure according to the first embodiment of the present invention; FIG.

3 and 4 are plan views showing alignment states of a transparent electrode, a bus electrode, an address electrode, and a partition wall of the plasma display panel according to the second and third embodiments of the present invention;

* Explanation of reference numerals for the main parts of the drawings

31: ITO electrode 32A, 32B: bus electrode

41, 41A, 41B: address electrode 42: partition wall

The present invention for achieving the above object is the front plate, the first transparent electrode and the second transparent electrode formed on the front plate, the first bus electrode formed on the first transparent electrode and participates in scanning and maintenance and 10. A plasma display panel comprising a second bus electrode formed on the second transparent electrode and participating in a holding, comprising: a back plate; First and second barrier walls formed on the rear plate to define discharge cells; And an address electrode formed on the rear plate under the first partition and having a protrusion overlapping the first bus electrode.

The protrusions of neighboring cells may be connected in series.

The plasma display panel may further include a second address electrode formed on the rear plate under the second partition wall, wherein the protrusion of the first address electrode and the protrusion of the second address electrode are adjacent to each other of the neighboring cell. It may overlap with each one bus electrode.

The present invention prevents the address electrode from overlapping the first bus electrode participating in scanning in the address period of the two bus electrodes on the front panel and the second bus electrode participating only in the maintenance, so that the address electrode in the sustain period It is characteristic to prevent the brightness of a discharge cell from falling by the voltage applied to it.

Hereinafter, an electrode structure of a plasma display panel according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2A is a plan view showing alignment states of a transparent electrode, a bus electrode, an address electrode, and a partition wall of a plasma display panel according to a first embodiment of the present invention, and participates in scanning among two bus electrodes 31A and 31B of the front panel. The address electrode 41 having the protrusion A overlapping with the bus electrode 31B is arranged under the partition 42.

Protrusions (A) It can be formed in various shapes such as square, cylinder, triangle.

In this way, the address electrode 41 overlaps with the bus electrode 31B participating in the scan and does not overlap with the bus electrode 31A participating only in the sustaining section, so there is no problem in addressing. The electric field is affected by the voltage applied to the address electrode.

Accordingly, as shown in FIG. 2B, the electron discharge path C extends to the upper end of the front plate and lengthens. Therefore, as the discharge path becomes longer, the number of collisions between ions and electrons increases, thereby increasing the amount of UV generated and increasing luminance. In FIG. 2B, reference numeral 30 denotes a front plate, 31 a ITO electrode, and 40 a back plate.

2A shows a state in which the protrusions A of the address electrodes 41 are connected in series in neighboring cells.

In contrast, as shown in FIG. 3, the first address electrode 41A and the second address electrode 42B are formed under the first partition 42A and the second partition 42B that divide one cell, respectively, to form a neighbor. The protrusion A of the address electrode may not be connected in the cell.

In addition, as shown in FIG. 4, the protrusion A of the address electrode 41 may extend to an area between neighboring cells.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.

According to the present invention as described above, even when a voltage is applied to the address electrode during the sustain period, the discharge path can be prevented from being reduced. Accordingly, it is possible to effectively prevent the lowering of the brightness of the discharge cells in the organic section.

Claims (3)

A front plate, a first transparent electrode and a second transparent electrode formed on the front plate, a first bus electrode formed on the first transparent electrode and participating in scanning and maintenance, and formed on the second transparent electrode. In the plasma display panel including a participating second bus electrode, Backplate; First and second barrier walls formed on the rear plate to define discharge cells; And An address electrode formed on the rear plate under the first partition wall and having a protrusion overlapping the first bus electrode. Plasma display panel comprising a. The method of claim 1, And the protrusions of neighboring cells are connected in series. The method of claim 1, A second address electrode formed on the rear plate under the second partition wall; And a protrusion of the first address electrode and a protrusion of the second address electrode overlap each other with the first bus electrode of a neighboring cell.