KR20000059381A - Static electricity protection cell of bipolar intergrated circit and fabricating method thereof - Google Patents

Abstract

PURPOSE: An electrostatic protection cell of a bipolar integrated circuit and fabrication method thereof is to allow an electrostatic protection cell to have a superior electrostatic characteristic with a minimum area. CONSTITUTION: An electrostatic protection cell of a bipolar integrated circuit comprises: a first buried layer formed within a substrate(SUB); a second buried layer formed on the first layer within the substrate; a contact formed on the second buried layer; a pad formed on the contact; and an isolation layer for isolating the first and second layers from another cell on the substrate, the first layer being partially overlapped with the isolation layer. A fabrication method of an electrostatic protection cell of a bipolar integrated circuit comprises the steps of: forming a first layer buried within a substrate; forming a first isolation layer partially overlapped with the first layer; forming a second isolation layer having the same conductive type with the first isolation layer; and forming a second buried layer on the first buried layer.

Description

Static electricity protection cell of bipolar integrated circuit and manufacturing method thereof {Static electricity protection cell of bipolar intergrated circit and fabricating method}

The present invention relates to an electrostatic protection cell of a bipolar integrated circuit and a method for manufacturing the same, and more particularly, to a semiconductor chip area minimization and maximization of productivity and to an electrostatic protection cell of a bipolar integrated circuit having excellent electrostatic protection characteristics and a method of manufacturing the same. will be.

Electrostatic protection cells, which eliminate accidental electrostatic shock, do not have a uniform form in the case of bipolar integrated circuits, and have been designed in different forms by designers.

1 is a view for explaining the operation of the electrostatic protection cell of a general bipolar integrated circuit, the first diode (D1) is a static electricity when the positive voltage flows into the pad 10 based on the power supply voltage (VCC). It is an electrostatic protection diode for absorbing, and the second diode D2 is an electrostatic protection diode for absorbing static electricity when negative static electricity flows into the pad 10 based on the ground GND.

As shown in FIG. 1, when the diodes D1 and D2 are subjected to an electrostatic voltage equal to or higher than the turn-on voltage, the diodes are turned on so that currents caused by the electrostatic voltages do not flow into the integrated circuit 12. D2) is discharged to the power supply voltage (VCC) and the ground (GND), it is possible to protect the elements in the integrated circuit from static electricity.

However, when implementing the electrostatic protection cell as described above, the second diode D2 is conventionally formed using a junction between an N-type buried layer and a P-type substrate, and after forming the first diode D1, a metal is formed. Since the power supply voltage VCC must be applied to the first diode D1 using a line, the electrostatic protection cell occupies a large chip area in the integrated circuit and the electrostatic protection characteristics are deteriorated.

It is an object of the present invention to provide an electrostatic protection cell of a bipolar integrated circuit having excellent electrostatic characteristics and capable of minimizing semiconductor chip area and maximizing productivity.

Another object of the present invention is to provide a method for manufacturing an electrostatic protection cell of a bipolar integrated circuit having excellent electrostatic characteristics and minimizing semiconductor chip area and maximizing productivity.

1 is a view for explaining the operation of the electrostatic protection cell of a general bipolar integrated circuit.

2A to 2D illustrate a method of manufacturing an electrostatic protection cell of a bipolar integrated circuit according to an embodiment of the present invention.

3 is a front view and a cross-sectional view of an electrostatic protection cell of a bipolar integrated circuit according to an embodiment of the present invention.

4 is a side view and a cross-sectional view of an electrostatic protection cell of a bipolar integrated circuit according to an embodiment of the present invention.

<Explanation of symbols for main parts of drawing>

CONT ... contact, EMIT ... emitter,

EPI ... epitaxial layer, INSU ... insulation layer

ISO ... second isolation layer, MET ... metal,

NPBL ... burying layer, NPBL_PBTM ... junction,

NTUB ... tub, PAD ... pad,

PASS ... protective layer, PBTM ... first isolation layer,

SINK ... Think, SUB ... substrate.

In order to achieve the above object, the electrostatic protection cell of the bipolar integrated circuit according to the present invention includes a first layer which is a buried layer formed on a substrate; A second layer formed on the first layer; A contact formed on the second layer; A pad formed on the contact; And an isolation layer for separating the buried first layer and the second layer from other cells on the substrate, wherein a predetermined portion of the first layer, the buried layer, is formed to form an electrostatic protection diode; It is characterized by overlapping.

Preferably, the first layer and the second layer are N-type layers, and the isolation layer is a P-type layer.

In addition, the second layer, it is preferable to include a high concentration of the N-type emitter, a high concentration of the N-type tub and a high concentration of the N-type sink for improving the electrostatic protection function.

In order to achieve the above object, the electrostatic protection cell manufacturing method of a bipolar integrated circuit according to the present invention includes (1) implanting a first type of ions on a substrate of a wafer and then performing diffusion to form a first layer as a buried layer. Implanting ions of the second type and then diffusing to form an isolation layer overlapping with a predetermined portion of the first layer, which is a buried layer; (2) implanting the second type of ions to form an additional isolation layer on the isolation layer, and implanting the first type of ions to form a second layer on the first layer; And (3) forming a pad by performing a contact and metal process on the second layer and forming a protective film, and then removing the protective film on the metal layer.

In the step (2), the ions of the first type are N-type ions, and the ions of the second type are P-type ions.

In addition, in the step (2), the second layer is preferably a high concentration N type sink, a high concentration N type tub, and a high concentration N type emitter.

Hereinafter, an electrostatic protection cell and a method of manufacturing the bipolar integrated circuit according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2D illustrate a method of manufacturing an electrostatic protection cell of a bipolar integrated circuit according to an embodiment of the present invention. 2A to 2D, the upper view is a plan view of ion implantation as a plan view, and the lower view is a cross-sectional view taken at the cutting line A-A 'in the upper plan view to show a vertical structure.

In the first step of FIG. 2A, after implanting a high concentration of N-type ions onto the substrate SUB of the wafer, diffusion is performed to form a buried layer NPBL, and after implanting P-type ions, the diffusion is buried. A P-type first isolation layer PBTM and an epitaxial layer EPI overlapping with a predetermined portion of the layer NPBL are formed. In this case, the buried layer NPBL and the first isolation layer PBTM are formed to overlap each other except for the portion where the resistance is formed. In FIG. 2A, reference numeral NPBL_PBTM denotes a junction where the buried layer NPBL and the first isolation layer PBTM overlap.

In the second step of FIG. 2B, an additional second isolation layer ISO is formed on the first isolation layer PBTM by implanting P-type ions, and implanted with N-type ions on the buried layer NPBL. High concentration N-type sink SINK and high concentration N-type tub NTUB are formed. In the embodiment of the present invention, two isolation layers are formed. However, the present invention is not limited thereto, and only one isolation layer may be formed.

In the third step of FIG. 2C, N-type ions are implanted to form an N-type emitter EMIT on the N-type tub NTUB. Emitter (EMIT) is a high concentration N-type layer, together with the N-type tub (NTUB) and N-type sink (SINK) can reduce the resistance component from the pad (PAD of Fig. 2d) to the buried layer (NPBL) to prevent static electricity It plays a role in improving characteristics.

In the fourth step of FIG. 2D, the contact CONT is formed on the emitter EMIT, the metal MET process is performed, the passivation layer PASS is formed, and then the passivation layer PASS on the metal MET is removed. To form a pad PAD. Reference numeral INSU is an insulating film.

3 and 4 show the overall structure of the electrostatic protection cell of the bipolar integrated circuit according to the embodiment of the present invention formed by the manufacturing method as described above.

3 is a front view and FIG. 4 is a side view. 3A is a plan view, and FIG. 3B is a cut line B-B 'in the drawing of FIG. 3A to show the vertical structure of the electrostatic protection cell. 4A is a plan view, and FIG. 4B is cut along the cutting line C-C 'in the drawing of FIG. 4A to show the vertical structure of the electrostatic protection cell. It is sectional drawing when.

3 and 4, the electrostatic protection cell of the bipolar integrated circuit according to the embodiment of the present invention includes a high concentration of N-type emitter (EMIT) and a high concentration of N-type tub (NTUB) under the pad PAD. And high concentration N type sink (SINK) and buried layer (NPBL), and buried layer (NPBL), emitter (EMIT), tub (NTUB), and sink (SINK) on the substrate (SUB). A first isolation layer (PBTM) and a second isolation layer (ISO) are provided for separation. The predetermined portion of the first isolation layer PBTM overlaps the buried layer NPBL. Reference numeral NPBL_PBTM denotes a junction where the buried layer NPBL and the first isolation layer PBTM overlap.

In the electrostatic protection cell of the bipolar integrated circuit according to the embodiment of the present invention configured as described above, the buried layer NPBL and the first isolation layer PBTM bonded by the junction portion NPBL_PBTM function as a static electricity protection diode. When the positive voltage flows into the pad PAD, since the reverse breakdown voltage of the junction, that is, the voltage higher than the breakdown voltage flows into the pad PAD, the junction breaks down and the positive voltage introduced into the pad PAD is reduced. Static electricity is supplied to the power supply voltage (VCC) or ground (GND) through the emitter (EMIT), the tub (TUB), the sink (SINK), the buried layer (NPBL), the first isolation layer (PBTM) and the second isolation layer (ISO). ) To protect the interior of the integrated circuit from positive static electricity.

On the other hand, when a negative voltage static electricity flows into the pad PAD, a conductive voltage or more is applied to the junction of the buried layer NPBL and the first isolation layer PBTM, so that the junction is conducted and obtained as the pad PAD. The static electricity of the negative voltage is supplied through the emitter EMIT, the tub, the sink, the sink, the NPBL, the first isolation layer PBTM and the second isolation layer ISO. It can be pulled out to ground (GND) to protect the integrated circuit from negative static electricity.

That is, in the present invention, the reverse breakdown voltage of the buried layer NPBL and the first isolation layer PBTM is designed to be lower than the breakdown voltage of the integrated circuit device, thereby bonding the buried layer NPBL and the isolation layer PBTM. In addition to the electrostatic protection function of the negative voltage of the first diode D2 of FIG. 1, the electrostatic protection function of the positive voltage of the first diode D1 of FIG.

Therefore, in the present invention, since it is not necessary to form the first diode D1 shown in FIG. 1, it is not necessary to form a metal line in order to apply the power supply voltage VCC to the first diode D1. The area occupied by an electrostatic protection cell in an integrated circuit can be reduced, and electrostatic protection characteristics can be improved. In the present invention, by forming a high concentration of the N-type emitter (EMIT), tub (NTUB), sink (SINK) on the N-type buried layer (NPBL) to reduce the static components of the path through which static electricity escapes electrostatic protection The characteristics can be further improved.

As described above, the electrostatic protection cell of the bipolar integrated circuit and the method of manufacturing the same according to the present invention can minimize the semiconductor chip area and maximize the productivity, and have an excellent electrostatic protection property for protecting internal devices from static electricity.

Claims (6)

A first layer, which is a buried layer formed on the substrate; A second layer formed on the first layer; A contact formed on the second layer; A pad formed on the contact; And An isolation layer for separating the buried first layer and the second layer from other cells on the substrate; The electrostatic protection cell of a bipolar integrated circuit, wherein a predetermined portion of the first layer, which is a buried layer, overlaps with the isolation layer to form an electrostatic protection diode. The electrostatic protection cell of a bipolar integrated circuit according to claim 1, wherein the first layer and the second layer are N-type layers, and the isolation layer is a P-type layer. The bipolar integrated circuit of claim 2, wherein the second layer comprises a high concentration of an N-type emitter, a high concentration of an N-type tub, and a high concentration of an N-type sink to improve static electricity protection. . (1) After implanting a first type of ions on a wafer substrate, diffusion is carried out to form a first layer, which is a buried layer; Forming an isolation layer overlapping a predetermined portion of the layer; (2) implanting the second type of ions to form an additional isolation layer on the isolation layer, and implanting the first type of ions to form a second layer on the first layer; And (3) forming a pad by performing a contact and metal process on the second layer and forming a protective film, and then removing the protective film on the metal layer to form a pad. . 5. The method of claim 4, wherein in the step (2), the ions of the first type are N-type ions, and the ions of the second type are P-type ions. 6. The method of claim 5, wherein in the step (2), the second layer is a high concentration of an N type sink, a high concentration of an N type tub, and a high concentration of an N type emitter.