KR20000056040A - Cell bus switch test apparatus polling based ATM and method thereof - Google Patents

Abstract

PURPOSE: A method for testing a cell bus switch of a polling-based asynchronous transfer mode(ATM) is provided to efficiently perform a look-up test of the cell bus switch by connecting with an ATM network to supply in-band communication in the ATM cell bus switch utilized for ATM cell switching in a digital subscriber line-access multiplexer(DSLAM). CONSTITUTION: A method for testing a cell bus switch of a polling-based asynchronous transfer mode(ATM) comprises the steps of: initializing a register of a cubit when a test process is started; deciding whether the cubit has to be enabled to complete the test process if the cubit is disabled, and if the cubit is enabled, deciding whether an interrupt-based test has to be performed; if so, enabling an interrupt mask of a central processing unit(CPU) utilized in a corresponding board, and performing an interrupt-based loop back test; and if the interrupt-based test is not selected, performing a polling-based loop back test.

Description

Cell bus switch test apparatus and method for polling based asynchronous transmission mode

The present invention relates to an apparatus and method for testing a cell bus switch of a polling based ATM that can be used in an asymmetric digital subscriber line (ADSL), a digital subscriber line-access multiplexer (DSLAM), an ATM, a cell bus switching device, and the like. In particular, it enables verification of the performance of cell bus switching devices as well as quick basic functional verification of the boards and systems on which they are mounted.

In general, ADSL is a new technology that replaces an existing data modem. It is a technology that can simultaneously provide voice and high-speed data services by using a telephone line installed between a telephone company and a subscriber.

Among them, DSLAM is a device installed in the exchange office. It separates voice and data signals received from subscribers, matches voice signals to circuit switching devices such as TDX-10, and matches data to dedicated data exchange devices.

The present invention provides an ATM cell bus switch device used for ATM cell switching in such a DSLAM system, and provides in-band communication for control based on a connection to an ATM network. It is an object of the present invention to provide an apparatus and method for testing a cell bus switch in a polling-based asynchronous transmission mode that can reduce costs by bringing substitution effect and enabling fast performance verification.

1 is a block diagram showing a configuration according to the present invention

2 is an operational flow diagram illustrating a sequence for a loop-back test for a qubit, ATM cell bus device of the present invention.

FIG. 3 is an operational flowchart illustrating a detailed algorithm of the poll-based loop back test in FIG.

<Explanation of symbols for main parts of drawing>

1-N: ATU-C module 10: ATU-OC3 module

20: ATU-M module

In order to achieve the above object, the present invention allows each board mounted in the system to be equipped with a device for ATM cell switch, and the device supports a utopia or ALI-25 physical layer cell interface, and an inlet-side (Inlet-). Side) is configured to provide various ATM related functions such as address translation and routing header insertion.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a cell bus switching block diagram of a DSLAM of the present invention, comprising a plurality of ATU-C modems, a qubit, and a local processor to perform data transmission / reception with the ATU-M module 20 ( 1-N), an ATU-OC3 module 10 connected to a 155 Mbps ATM network to process STM-3 frames, and an ATU-M module performing data transmission / reception with the ATU-C module 1-N. In the figure, reference numeral 30 denotes a cell bus and 40 a control bus.

Referring to the operation of the present invention configured as described above is as follows.

First, FIG. 2 shows a sequence for a loop-back test for a qubit and ATM cell bus device. When the test process starts, the qubit register is initialized (step S1), and the user determines whether or not to enable the qubit. If the user disables the qubit, the test process ends (step S3).

However, if the user enables the qubit, it is determined whether to use the interrupt-based test method (step S4).

When the interrupt based test method is selected in step S4, the interrupt mask of the CPU used in the corresponding board is enabled, and then the interrupt based loop-back test is performed (steps S5 and S6).

However, if the user does not use the interrupt-based test method in step S4, the polling-based loopback test is to be used. Therefore, the interrupt mask operation is omitted and the polling-based loopback test is performed (step S7).

FIG. 3 illustrates a detailed algorithm of a loop back test based on polling, which is a step S7 of FIG. 2.

First, at the start of the test, the Rx cell queue is cleared (step S11), it is repeatedly checked (step S12), and a slot ID in which the board to be tested is mounted (step S13).

Then set the qubit register parameters with inVPI = 0, inVCI = 7, outCPI = 0, outVCI = 7 to enable loop back (step S14), and the user parameters required for testing the ATM cell payload pattern, test type and test iterations. Receive the input (step S15).

Next, the pattern value is updated to make the payload and the pattern the same (step S16), and the cell is recorded in the Tx cell queue (step S17).

Here, if the cell write for the Tx cell queue fails, an error message is output and then terminated (steps S18 and S19). If the cell write for the Tx cell succeeds, the Rx cell queue is read (step S20).

If the cell read for the Rx cell queue fails, an error message is output and ends (steps S21 and S22).

If the pattern match is failed after comparing the recorded cell with the read cell, an error condition is output and the next step is performed (steps S23 and S24). If the pattern match is successful, the loop-back is successful. If the number of repetitions is repeated and the number of repetitions is repeated, the test is terminated (step S25). If the number of repetitions is not completed, the process proceeds to step S16.

As described above, the present invention can effectively perform a look-up test of an ATM cell bus switching device, as well as a quick basic function verification for a board and a system equipped with the device.

Claims (3)

It consists of ATU-C modem, qubit, and local processor, which is connected to 155Mbps ATM network and multiple ATU-C modules (1-N) to perform data transmission / reception with ATU-M module 20. STM-3 Polling-based asynchronous, characterized in that it comprises an ATU-OC3 module 10 for processing a frame, and the ATU-M module 20 for performing data transmission and reception with the ATU-C module (1-N) Cell bus switch test device in transmission mode. A first step of initializing the register of the qubit at the start of a test process; A second step of determining whether to enable the qubit and ending the test process when the qubit is disabled, and determining whether to use the interrupt-based test method when the qubit is disabled; A third step of performing an interrupt based loop-back test after enabling an interrupt mask of a CPU used in a corresponding board when an interrupt based test method is selected in the second step; And a fourth step of performing a polling-based loopback test if the interrupt-based test method is not selected in the second step. The method of claim 2, wherein the polling-based loopback test of the fourth step, A first step of clearing and repeatedly checking the Rx cell queue at the start of the test, A second step of inputting a slot ID equipped with a board to be tested, setting a cubit register parameter, inputting a user parameter, updating a pattern value, and writing a cell to a Tx cell queue; Determining a cell write failure for the Tx cell queue and reading the Rx cell queue upon success; Determining a cell read failure for the Rx cell queue and comparing the read cell with the read cell upon success; And a fifth step of terminating the test when the pattern match is successful by comparing the cell recorded in the fourth step with the read cell.