KR20000046540A - Apparatus for confirming user cell transmission in atm switch network - Google Patents

Abstract

PURPOSE: An apparatus for confirming a user cell transmission in an ATM switch network is provided to easily monitor a transmission status of the user cell through interface module. CONSTITUTION: A physical layer(P) makes an ATM cell of a synchronous transmission frame from terminal for outputting, and makes a synchronous transmission frame of input ATM cell for providing to the corresponding terminal. An ATM layer(12) modifies the ATM cell from the physical layer to user cells for outputting by adding a predetermined header, detects a user cell for testing in the user cells for modifying to IPC cell and outputting, modifies input user cell to the ATM cell for providing to the physical layer. A processor(13) transmits the user cell for testing, monitors the transmission status by comparing input IPC cell with data of cell for testing. A switch link interface(11) provides an ATM switch with input user cell through output terminal, and provides the processor with input IPC cell.

Description

Device for Confirming User Cell Transmission in Asynchronous Transfer Mode Switch Network

The present invention relates to an asynchronous transfer mode (hereinafter referred to as ATM), and more particularly, to an apparatus capable of checking a transmission state of a user cell.

An interface module as shown in FIG. 1 is used to mediate communication between subscribers using an ATM switch.

In the illustrated example of FIG. 1, the E1 scheme is illustrated. In the interface module 10, one switch link interface 11, an ATM layer 12, a processor 13, and sixteen physical layers P1-1 are shown. P16), and four subscriber stations M1-M64 are connected to the physical layers P1-P16, respectively.

The physical layer P1-P16 inputs an E1 frame, i.e., a synchronous transmission frame, from the terminals M1-M64, converts the input frame into an ATM cell, and transmits it to the ATM layer 12, and ATM from the ATM layer 12. The cell is converted into an E1 frame and transmitted to the corresponding terminal (M1-M64).

The ATM layer 12 adds, for example, a predetermined header of 3 bytes to the ATM cells applied from the physical layers P1-P16 and provides it to the switch link interface 11. This header has information for use inside the ATM switch 20. In addition, the ATM layer 12 receives the ATM cell from the switch link interface 11, removes the header from the received cell, and provides it to the physical layers P1-P16.

The switch link interface 11 adds an 8 byte dummy to the user cell from the ATM layer 12 and provides it to the ATM switch 20. In addition, the switch link interface 11 is connected to the processor 13 through the transmission and reception buffers 14 and 15, and communicates with the processor 13 using an interprocessor cell (hereinafter referred to as an IPC cell). That is, the normal interface module 10 is configured to perform state management, signaling processing, etc. of the physical layers P1-P16, and the physical layers P1-P16 at the request of the processor 30 through the ATM switch 20. The state information of) should be transmitted to the processor 30. Accordingly, the processor 13 in the interface module 10 performs interprocessor communication (IPC) with the processor 30 through the ATM switch 20. Here, a cell used for interprocessor communication is collectively called an IPC cell, and the IPC cell has the same format as the user cell described above. Thus, the processor 13 in the interface module 10 needs to distinguish between the user cell of the subscriber and the IPC cell. That is, the user cell provided from the ATM switch 20 should be provided to the ATM layer 12, but the IPC cell should be provided to the processor 13.

As such, in order to distinguish the user cell from the IPC cell, a cell type (CET) section in the cell header is conventionally used as shown in FIG. 2. That is, when CET is 00, it is classified as a user cell, and when CET is 11, it is classified as an IPC cell. The other sections in FIG. 2 are easily known by those skilled in the art, and thus descriptions thereof are omitted.

Accordingly, the switch link interface 11 provides a user cell and an IPC cell input through the ATM layer 12 and the transmission buffer 14 to the ATM switch 20, and the ATM cell from the ATM switch 20 is CET. The user cell is divided into a user cell and an IPC cell by using the user cell, and the IPC cell is provided to the processor 13 using the reception buffer 15.

Meanwhile, in the above-described ATM switch network, it is necessary to test whether user cells input through the terminals M1-M64 are correctly transmitted through the transmission path, that is, the interface module 10. In response to this need, a conventional method of checking a transmission state using an OAM (Operation, Administration Maintenance) cell has been adopted.However, in this method, only a connection state and the like can be checked, but a payload change during transmission can be checked. There was a problem that could not.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and an object of the present invention is to provide an apparatus capable of simply checking the transmission state of a user cell using a processor in an interface module.

In order to achieve the above object, the present invention provides a device for checking the transmission status of a user cell in an ATM switch network, and physically processes and outputs an ATM cell from a terminal input through a first terminal. A physical layer which processes an ATM cell input through the terminal and provides the terminal to the physical layer; A predetermined header is added to the ATM cell from the physical layer, and is converted into a user cell and outputted. The test user cell among the user cells is detected and changed into an IPC cell, and the input user cell is changed into an ATM cell. ; A processor for transmitting a test user cell and monitoring a transmission state of the user cell by comparing an input IPC cell with data of the transmitted test cell; The input user cell is provided to the ATM switch through the output stage, and the input IPC cell is provided with a switch link interface provided to the processor, and upon confirmation of transmission of the user cell, the physical layer processes the ATM cell from the ATM layer. Re-entering into the first terminal, the switch link interface is configured to re-enter the user cell output through the output terminal.

1 is a schematic block diagram of a conventional asynchronous delivery mode switch network;

2 is a state diagram of a cell used in an asynchronous delivery mode switch network;

3 is a schematic block diagram of an apparatus for confirming user cell transmission in an asynchronous delivery mode switch network according to the present invention;

4 is a diagram illustrating a configuration of an ATM layer in a user cell transmission confirmation apparatus in an asynchronous delivery mode switch network according to the present invention.

<Explanation of symbols for main parts of drawing>

10: interface module 11: switch link interface

12: ATM Layer 13: Processor

14: receive buffer 15: transmit buffer

20: ATM switch 30: processor

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

3 is a schematic block diagram of an apparatus for confirming user cell transmission according to the present invention. For convenience of description, only one physical layer P is connected to the ATM layer 12. However, as shown in FIG. Connected will be readily appreciated by one of ordinary skill in the art.

As shown in Fig. 4, the ATM layer 12 in the interface module has further added certain functional blocks for carrying out the present invention, which are described in detail below.

3 will be described in detail. First, the switch link interface 11 is connected such that its output terminal is fed back to the input terminal, and the physical layer P is also configured such that the output terminal is fed back to the input terminal. This configuration is necessary for the following reasons. That is, the processor 13 in the interface module 10 in the present invention generates a test user cell and applies it to the switch link interface 11. Here, since the switch link interface 11 transmits the user cell from the physical layer P to the conventional ATM switch 20 as described above, the test user cell from the processor 13 is also transferred to the ATM switch 20. I want to send. However, since the present invention is for checking the transmission state of the user cell in the interface module 10, the test user cell output from the switch interface link 11 by configuring the switch interface link 11 as shown in FIG. It was fed back to receive the switch interface link 11. At this time, since the switch interface link 11 transmits the user cell from the ATM switch 20 to the physical layer P, the test user cell is also transmitted to the physical layer P. That is, in the present invention, the output terminal of the switch link interface 11 is connected to be fed back to the input terminal in order to transmit the test user cell of the processor 13 to the ATM layer 12.

On the other hand, the physical layer (P) layer also transmits the user cell from the ATM layer 12 to the terminal, but in the present invention has a configuration of Figure 3, the user cell for testing from the ATM layer 12 is fed back, The input test user cell is sent back to the ATM layer 12. That is, in the present invention, the output terminal of the physical layer P is fed back to the input terminal in order to return the test user cell of the ATM layer 12 back to the ATM layer 12.

Meanwhile, the processor 13 of the present invention should form a connection with the corresponding physical layer through the VPI and the VCI when transmitting the test user cell. The CET should be set to 00 to specify that the user cell is added. It shall be specified that the cell is a test cell. In order to indicate the test user cell, a test signal must be inserted into the test user cell, and the insertion section may use a payload section in the cell. That is, according to the present invention, predetermined information indicating that the test cell is included in a predetermined section of the payload in the cell is included.

The switch link interface 11 may attempt to transmit an 8-bit dummy to the input user cell and then transmit it to the ATM switch 12 through the output terminal. However, as described above, the output terminal is connected to the input terminal of the switch link interface 11. As will be seen, the test user cell will be re-entered into the switch link interface 11. In this case, since the CET of the input cell is 00, the switch link interface 11 recognizes the user cell, erases the 8-bit dummy, and transmits the dummy data to the ATM layer 12.

The ATM layer 12 is composed of a transmitting ATM layer processing unit 121 and a receiving ATM layer processing unit 122, as shown in FIG. 4, and a test user cell from the switch link interface 11 includes a transmitting ATM layer processing unit ( 121).

The transmitting ATM layer processing unit 121 erases the header from the test user cell to make an ATM cell and transmits the same to the physical layer P. FIG. That is, it can be seen that the function of the transmitting ATM layer processing unit 121 is the same as in the related art. The physical layer P converts this ATM cell into a synchronous transmission frame and then outputs it to the terminal. However, since the output terminal and the input terminal are connected, the synchronous transmission frame is input again to the physical layer P, and the physical layer P is this synchronization. ATM frames are converted into ATM cells and provided to the receiving ATM layer processing unit 122 of the ATM layer 12.

As shown in FIG. 4, the receiving ATM layer processing unit 122 includes a test user cell detector 1221, an ATM layer processing unit 1222, and a header converting unit 1223.

Here, the test user cell detector 122 detects whether the test user ATM cell or a general user ATM cell by using the state of the test signal included in the payload section of the ATM cell, and when the test user cell, the test signal header converter Provided at (1223).

The ATM cell that has passed through the trial user cell detector 1221 is provided to the ATM layer processor 1222, which adds a header to the input ATM cell. It can be seen that the function of the ATM layer processor 1222 is the same as that of the conventional ATM layer 12.

The user cell from the ATM layer processor 1222 is provided to the header converter 1223. When the detection signal from the test user cell detector 1221 is applied, CET of the user cell is " 0 " Change from "to" 11 "to convert to an IPC cell. In other words, the test user cell is changed from the header converter 1223 to the IPC cell.

The user cell or IPC cell of the ATM layer 12 is provided to the switch link interface 11, and the user cell or IPC cell provided to the switch link interface 11 is fed back and returned to the switch link interface again. In the case of IPC tax, it is provided to the processor 13 through the reception buffer, and the user cell is transferred to the ATM layer. In this case, since the IPC cell is provided from the ATM layer 12, the switch link interface 11 provides the IPC cell to the processor 13 through the transmission buffer 15. In this case, the switch link interface 11 generally calculates and writes the CRC-32 in the last 4 bytes of the cell when the IPC cell is transmitted. On the contrary, when the IPC is received, the CRC-32 of the cell is calculated and received. The CRC-32 is compared and the normal and abnormal are displayed on the last bit of the cell and transmitted to the processor 13. However, in the above-described case, that is, when the processor 13 transmits the test user cell, the calculated CRC-32 value does not exist in the test user cell, and thus the test user cell is calculated even in the changed IPC cell. There is no CRC-32 value. However, since the switch link interface 11 also checks the CRC-32 for this IPC cell (by the test user cell), it indicates to the last bit of the cell that the IPC cell is abnormal and transmits it to the processor 13. Therefore, since the processor 13 may determine that the IPC cell is abnormal and discard it, the processor 13 of the present invention determines whether there is a test signal in the payload section of the IPC cell, and when there is a test signal, it is abnormal. It should be configured not to discard the IPC cell.

That is, in the present invention, since the cell transmitted by the processor 13 to the test user cell is changed into an IPC cell and provided back to the processor 13, the processor 13 compares the data of the transmitted test user cell and the received IPC cell to the ATM layer. (12), it is possible to check the state of the transmission path of the cell through the physical layer (P).

As described above, the present invention has an effect of easily monitoring the transmission state of the user cell through the interface module.

Claims (3)

A device for checking the transmission status of a user cell in an asynchronous transfer mode (ATM) switch network. A physical layer for outputting the synchronous transmission frame from the terminal into ATM cells and synchronously transmitting the input ATM cell to the corresponding terminal; A predetermined header is added to the ATM cell from the physical layer, and is converted into a user cell, and outputted. The test user cell among the user cells is detected and changed into an IPC cell. The input user cell is changed into an ATM cell and provided to the physical layer. An ATM layer; A processor for transmitting a test user cell and monitoring the transmission state of the user cell by comparing an input IPC cell with data of the transmitted test cell; The input user cell is provided to the ATM switch through the output stage, and the input IPC cell has a switch link interface provided to the processor. Upon confirming transmission of the user cell, the physical layer converts an ATM cell from the ATM layer into a synchronous transmission frame, and then re-enters this synchronous transmission frame, and the switch link interface outputs the user cell output through the output terminal. User cell transmission confirmation device in an asynchronous delivery mode switch network configured to re-enter. The apparatus of claim 1, wherein the processor is configured to indicate that the user cell is a test user cell in a payload section of a cell. The method of claim 2, wherein the ATM layer, A transmitting ATM layer processor for transmitting an ATM cell to the physical layer by erasing a header from a test user cell applied from the switch link interface; A user cell detector for outputting a detection signal when the user ATM cell is a test user ATM cell by using a test signal included in a payload section in the user ATM cell input from the physical layer; An ATM layer processing unit for adding a predetermined header to the user ATM cell from the physical layer to form a user cell; And a header converter for changing a user cell from an ATM layer processor to the IPC cell when the detection signal is applied.